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Электронный компонент: TD9944

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12/13/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
S
1
D
1
G
1
D
1
S
2
D
2
G
2
D
2
1
2
3
4
8
7
6
5
SO-8
top view
TD9944
Low Threshold
Dual N-Channel Enhancement-Mode
Vertical DMOS FETs
BV
DSS
/
R
DS(ON)
V
GS(th)
I
D(ON)
BV
DGS
(max)
(max)
(min)
SO-8
240V
6.0
2.0V
1.0A
TD9944TG
Ordering Information
Absolute Maximum Ratings
Drain-to-Source Voltage
BV
DSS
Drain-to-Gate Voltage
BV
DGS
Gate-to-Source Voltage
20V
Operating and Storage Temperature
-55C to +150C
Soldering Temperature*
300C
*
Distance of 1.6 mm from case for 10 seconds.
Features
Dual N-channel devices
Low threshold -- 2.0V max.
High input impedance
Low input capacitance -- 125pF max.
Fast switching speeds
Low on resistance
Free from secondary breakdown
Low input and output leakage
Low Threshold DMOS Technology
These dual low threshold enhancement-mode (normally-off)
transistors utilize a vertical DMOS structure and Supertex's well-
proven silicon-gate manufacturing process. This combination
produces devices with the power handling capabilities of bipolar
transistors and with the high input impedance and positive
temperature coefficient inherent in MOS devices. Characteristic
of all MOS structures, these devices are free from thermal
runaway and thermally induced secondary breakdown.
Supertex's vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
Applications
Logic level interfaces ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
Pin Configuration
Order Number/Package
Note: See Package Outline section for dimensions.
2
TD9944
Symbol
Parameter
Min
Typ
Max
Unit
Conditions
BV
DSS
Drain-to-Source Breakdown Voltage
240
V
V
GS
= 0V, I
D
= 2mA
V
GS(th)
Gate Threshold Voltage
0.6
2.0
V
V
GS
= V
DS
, I
D
= 1mA
V
GS(th)
Change in V
GS(th)
with Temperature
-5.0
mV/C
V
GS
= V
DS
, I
D
= 1mA
I
GSS
Gate Body Leakage
100
nA
V
GS
= 20V, V
DS
= 0V
I
DSS
Zero Gate Voltage Drain Current
10
A
V
GS
= 0V, V
DS
= Max Rating
1.0
mA
V
GS
= 0V, V
DS
= 0.8 Max Rating
T
A
= 125C
I
D(ON)
ON-State Drain Current
0.5
1.9
V
GS
= 4.5V, V
DS
= 25V
1.0
2.8
V
GS
= 10V, V
DS
= 25V
R
DS(ON)
4.0
6.0
V
GS
= 4.5V, I
D
= 250mA
4.0
6.0
V
GS
= 10V, I
D
= 0.5A
R
DS(ON)
Change in R
DS(ON)
with Temperature
1.4
%/C
V
GS
= 10V, I
D
= 0.5A
G
FS
Forward Transconductance
300
600
m
V
DS
= 25V, I
D
= 0.5A
C
ISS
Input Capacitance
65
125
C
OSS
Common Source Output Capacitance
35
70
pF
C
RSS
Reverse Transfer Capacitance
10
25
t
d(ON)
Turn-ON Delay Time
10
t
r
Rise Time
10
t
d(OFF)
Turn-OFF Delay Time
20
t
f
Fall Time
20
V
SD
Diode Forward Voltage Drop
1.8
V
V
GS
= 0V, I
SD
= 1.0A
t
rr
Reverse Recovery Time
300
ns
V
GS
= 0V, I
SD
= 1.0A
Notes:
1. All D.C. parameters 100% tested at 25C unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
A
Electrical Characteristics
(each device, @ 25C unless otherwise specified)
Static Drain-to-Source
ON-State Resistance
V
GS
= 0V, V
DS
= 25V
f = 1 MHz
V
DD
= 25V,
ns
I
D
= 1.0A,
R
GEN
= 25
90%
10%
90%
90%
10%
10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
10V
V
DD
R
gen
0V
0V
Switching Waveforms and Test Circuit
3
TD9944
Typical Performance Curves
T
j
GS(th)
V
(normalized)
DS(ON)
R
(normalized)
V
DS
(th)
and R
Variation with Temperature
C)
(
On-Resistance vs. Drain Current
(amperes)
D
(ohms)
DS(ON)
R
Variation with Temperature
DSS
DSS
BV
(normalized)
C)
(
T
j
Transfer Characteristics
V
GS
(volts)
I
(amperes)
D
I
BV
0
2
4
6
8
10
3.0
2.5
2.0
1.5
1.0
0.5
0
-50
0
50
100
150
1.1
1.0
10
8
6
4
2
0
1.4
1.2
1.0
0.8
0.6
-50
0
50
100
150
V
GS
= 4.5V
V
GS
= 10V
T
= -55C
A
V
DS
= 25V
150C
0
1
2
3
5
4
0.9
2.4
2.0
1.6
1.2
0.8
0.4
(th)
V @ 1mA
R
DS(ON)
@ 10V, 0.5A
25C
Output Characteristics
4.0
3.2
2.4
1.6
0.8
0
V
DS
(volts)
I
(amperes)
D
Saturation Characteristics
2.5
2.0
1.5
1.0
0.5
0
V
DS
(volts)
I
(amperes)
D
0
10
20
30
50
40
V
GS
= 10V
8V
6V
4V
2V
0
2
4
6
10
8
V
GS
= 10V
2V
6V
4V
3V
3V
8V
4
Maximum Rated Safe Operating Area
1
1000
100
10
0.1
1.0
10
0.01
V
DS
(volts)
I
(amperes)
D
Thermal Response Characteristics
Thermal Resistance (normalized)
1.0
0.8
0.6
0.4
0.2
0.001
10
0.01
0.1
1
t
p
(seconds)
Transconductance vs. Drain Current
1.0
0.8
0.6
0.4
0.2
0
0
4.0
0.8
1.6
2.4
3.2
G
FS
(siemens)
I
D
(amperes)
Power Dissipation vs. AmbientTemperature
0
150
100
50
2.0
0
125
75
25
T
C
C)
(
D
P
(watts)
TO-243AA
T
A
= -55C
V
DS
= 25V
TO-243AA (pulsed)
T
A
= 25C
T
A
= 150C
TO-243AA (DC)
1.0
TO-243AA
P
T
D
C
= 0.55W
= 25 C
0
T
A
= 25C
Gate Drive Dynamic Characteristics
Q (nanocoulombs)
G
V
GS
(volts)
Capacitance vs. Drain-to-Source Voltage
200
C (picofarads)
V
DS
(volts)
0
10
20
30
40
150
100
0
10
8
6
4
2
0
0.4
0.8
1.2
1.6
2.0
63pF
V
DS
= 40V
V
DS
= 10V
f = 1MHz
C
ISS
C
OSS
C
RSS
150 pF
50
0
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 FAX: (408) 222-4895
www.supertex.com
12/13/010
2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
TD9944
Typical Performance Curves