7-31
7
TN0104
Low Threshold
N-Channel Enhancement-Mode
Vertical DMOS FETs
Note: See Package Outline section for dimensions.
Package Options
Low Threshold DMOS Technology
These low threshold enhancement-mode (normally-off) transis-
tors utilize a vertical DMOS structure and Supertex's well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transistors
and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally-induced secondary breakdown.
Supertex's vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
Features
Low threshold --1.6V max.
High input impedance
Low input capacitance
Fast switching speeds
Low on resistance
Free from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
Applications
Logic level interfaces ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
TO-243AA
(SOT-89)
G
D
S
D
TO-92
S G D
BV
DSS
/
R
DS(ON)
V
GS(th)
I
D(ON)
BV
DGS
(max)
(max)
(min)
TO-92
TO-243AA*
Die
40V
1.8
1.6V
2.0A
TN0104N3
--
TN0104ND
40V
2.0
1.6V
2.0A
--
TN0104N8
--
*
Same as SOT-89. Product supplied on 2000 piece carrier tape reels.
MIL visual screening available
Order Number / Package
Ordering Information
Absolute Maximum Ratings
Drain-to-Source Voltage
BV
DSS
Drain-to-Gate Voltage
BV
DGS
Gate-to-Source Voltage
20V
Operating and Storage Temperature
-55
C to +150
C
Soldering Temperature*
300
C
*
For TO-39 and TO-92, distance of 1.6 mm from case for 10 seconds.
Product marking for TO-243AA:
Where *=2-week alpha date code
TN1L*
7-32
Symbol
Parameter
Min
Typ
Max
Unit
Conditions
BV
DSS
40
V
GS(th)
Gate Threshold Voltage
0.6
1.6
V
V
GS
= V
DS
, I
D
= 500
A
V
GS(th)
Change in V
GS(th)
with Temperature
-3.8
-5.0
mV/
C
V
GS
= V
DS
, I
D
= 1.0mA
I
GSS
Gate Body Leakage
0.1
100
nA
V
GS
=
20V, V
DS
= 0V
I
DSS
Zero Gate Voltage Drain Current
1
A
V
GS
=0V, V
DS
= Max Rating
V
GS
= 0V, V
DS
= 0.8 Max Rating
T
A
= 125
C
I
D(ON)
ON-State Drain Current
0.35
V
GS
= 3V, V
DS
= 20V
0.5
1.1
V
GS
= 5V, V
DS
= 20V
2.0
2.6
V
GS
= 10V, V
DS
= 20V
R
DS(ON)
5.0
V
GS
= 3V, I
D
= 50mA
2.3
2.5
V
GS
= 5V, I
D
= 250mA
TO-92
1.5
1.8
V
GS
= 10V, I
D
= 1A
TO-243AA
2.0
V
GS
= 10V, I
D
= 1A
R
DS(ON)
Change in R
DS(ON)
with Temperature
0.7
1.0
%/
C
V
GS
=10V, I
D
= 1A,
G
FS
Forward Transconductance
0.34
0.45
V
DS
= 20V, I
D
= 0.5A
C
ISS
Input Capacitance
70
C
OSS
Common Source Output Capacitance
50
pF
C
RSS
Reverse Transfer Capacitance
15
t
d(ON)
Turn-ON Delay Time
3.0
5.0
t
r
Rise Time
7.0
8.0
t
d(OFF)
Turn-OFF Delay Time
6.0
9.0
t
f
Fall Time
5.0
8.0
V
SD
Diode Forward
TO-92
1.2
1.8
V
GS
= 0V, I
SD
= 1.0A
TO-243AA
2.0
V
GS
= 0V, I
SD
= 0.5A
t
rr
Reverse Recovery Time
300
ns
V
GS
= 0V, I
SD
= 1A
Notes:
1. All D.C. parameters 100% tested at 25
C unless otherwise stated. (Pulse test: 300
s pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Thermal Characteristics
V
V
GS
= 0V, I
D
= 1.0mA
Drain-to-Source
Breakdown Voltage
100
A
A
Static Drain-to-Source
ON-State Resistance
All Packages
V
Electrical Characteristics
(@ 25
C unless otherwise specified)
Voltage Drop
ns
V
DD
= 20V, I
D
= 1A
R
GEN
= 25
Package
I
D
(continuous)*
I
D
(pulsed)
Power Dissipation
jc
ja
I
DR
*
I
DRM
@ T
C
= 25
C
C/W
C/W
TO-92
0.80A
2.40A
1.0W
125
170
0.80A
2.40A
TO-243AA
1.40A
2.90A
1.6W
15
78
1.40A
2.90A
90%
10%
90%
90%
10%
10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
10V
V
DD
R
gen
0V
0V
Switching Waveforms and Test Circuit
*
I
D
(continuous) is limited by max rated T
j
.
T
A
= 25
C. Mounted on FR5 Board, 25mm x 25mm x 1.57mm. Signficant P
D
increase possible on ceramic substrate.
V
GS
= 0V, V
DS
= 20V
f = 1 MHz
TN0104
7-33
7
Typical Performance Curves
Output Characteristics
3.75
3.0
2.25
1.5
0.75
0
0
10
20
30
50
40
V
DS
(volts)
I
(amperes)
D
Saturation Characteristics
3.75
3.0
2.25
1.5
0.75
0
0
2
4
6
10
8
V
DS
(volts)
I
(amperes)
D
Maximum Rated Safe Operating Area
0.1
100
10
1
0.1
1.0
10
0.01
V
DS
(volts)
I
(amperes)
D
Thermal Response Characteristics
Thermal Resistance (normalized)
1.0
0.8
0.6
0.4
0.2
0
0.001
10
0.01
0.1
1
t
p
(seconds)
Transconductance vs. Drain Current
0.75
0.60
0.45
0.30
0.15
0
0
2.5
0.5
1.0
1.5
2.0
G
FS
(siemens)
I
D
(amperes)
Power Dissipation vs. Case Temperature
0
150
100
50
5
4
3
2
1
125
75
25
T
C
C)
(
D
P
(watts)
TO-92
T
= -55
A
C
T
= 25
A
C
T
A
= 125 C
6V
4V
2V
0
TO-243AA (DC)
(TA = 25
C)
8V
6V
2V
V
DS
= -25V
V
DS
= 25V
VGS = 10V
4V
VGS = 10V
8V
TO-243AA
(TA = 25
C)
TO-39 (DC)
TO-92 (DC)
TO-243AA
T
A
= 25
C
P
D
= 1.6W
TO-92
P
D
= 1W
T
C
= 25
C
TN0104
7-34
Gate Drive Dynamic Characteristics
Q (nanocoulombs)
G
V
GS
(volts)
T
j
GS(th)
V
(normalized)
DS(ON)
R
(normalized)
V
DS
(th)
and R
Variation with Temperature
C)
(
On-Resistance vs. Drain Current
(amperes)
D
(ohms)
DS(ON)
R
Variation with Temperature
DSS
DSS
BV
(normalized)
C)
(
T
j
Transfer Characteristics
V
GS
(volts)
I
(amperes)
D
Capacitance vs. Drain-to-Source Voltage
100
C (picofarads)
V
DS
(volts)
I
BV
0
10
20
30
40
75
50
25
0
2
4
6
8
10
3.0
2.4
1.8
1.2
0.6
-50
0
50
100
150
1.3
1.2
1.1
1.0
0.9
0.8
10
8
6
4
2
0
0
2
1
1.4
1.2
1.0
0.8
0.6
0.4
1.4
1.2
1.0
0.8
0.6
0.4
10
8
6
4
2
0
0.5
0.65
0.8
0.95
1.1
1.25
-50
0
50
100
150
55pF
V
DS
= 10V
V
GS
= 5V
V
GS
= 10V
T
A
= -55 C
f = 1MHz
C
ISS
C
OSS
C
RSS
40V
25 C
125 C
0
V
DS
= 25V
50pF
V
(th)
@ 0.5mA
R
DS(ON)
@ 5V, 0.25A
0
Typical Performance Curves
TN0104
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