1
11/12/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
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VN0550
BV
DSS
/
R
DS(ON)
I
D(ON)
BV
DGS
(max)
(min)
TO-92
500V
60
150mA
VN0550N3
Order Number / Package
Advanced DMOS Technology
These enhancement-mode (normally-off) transistors utilize a
vertical DMOS structure and Supertex's well-proven silicon-gate
manufacturing process. This combination produces devices with
the power handling capabilities of bipolar transistors and with the
high input impedance and positive temperature coefficient inher-
ent in MOS devices. Characteristic of all MOS structures, these
devices are free from thermal runaway and thermally-induced
secondary breakdown.
Supertex's vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
Package Option
Note: See Package Outline section for dimensions.
N-Channel Enhancement-Mode
Vertical DMOS FETs
Features
Free from secondary breakdown
Low power drive requirement
Ease of paralleling
Low C
ISS
and fast switching speeds
Excellent thermal stability
Integral Source-Drain diode
High input impedance and high gain
Complementary N- and P-channel devices
Applications
Motor controls
Converters
Amplifiers
Switches
Power supply circuits
Drivers (relays, hammers, solenoids, lamps,
memories, displays, bipolar transistors, etc.)
Absolute Maximum Ratings
Drain-to-Source Voltage
BV
DSS
Drain-to-Gate Voltage
BV
DGS
Gate-to-Source Voltage
20V
Operating and Storage Temperature
-55
C to +150
C
Soldering Temperature*
300
C
*
Distance of 1.6 mm from case for 10 seconds.
Ordering Information
TO-92
S G D
2
VN0550
Switching Waveforms and Test Circuit
90%
10%
90%
90%
10%
10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
10V
V
DD
R
gen
0V
0V
Package
I
D
(continuous)*
I
D
(pulsed)
Power Dissipation
jc
ja
I
DR
*
I
DRM
@ T
C
= 25
C
C/W
C/W
TO-92
78mA
250mA
1.0W
125
170
78mA
250mA
*
I
D
(continuous) is limited by max rated T
j
.
Thermal Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
Conditions
BV
DSS
VN0550
500
V
V
GS
= 0V, I
D
= 1mA
V
GS(th)
Gate Threshold Voltage
2
4
V
V
GS
= V
DS
, I
D
= 1mA
V
GS(th)
Change in V
GS(th)
with Temperature
-3.8
-5.0
mV/
C
V
GS
= V
DS
, I
D
= 1mA
I
GSS
Gate Body Leakage
100
nA
V
GS
=
20V, V
DS
= 0V
I
DSS
Zero Gate Voltage Drain Current
10
A
V
GS
= 0V, V
DS
= Max Rating
1
mA
V
GS
= 0V, V
DS
= 0.8 Max Rating
T
A
= 125
C
I
D(ON)
ON-State Drain Current
100
V
GS
= 5V, V
DS
= 25V
150
350
V
GS
= 10V, V
DS
= 25V
R
DS(ON)
45
V
GS
= 5V, I
D
= 50mA
40
60
V
GS
= 10V, I
D
= 50mA
R
DS(ON)
Change in R
DS(ON)
with Temperature
1
1.7
%/
C
V
GS
= 10V, I
D
= 50mA
G
FS
Forward Transconductance
50
100
m
V
DS
= 25V, I
D
= 50mA
C
ISS
Input Capacitance
45
55
C
OSS
Common Source Output Capacitance
8
10
pF
C
RSS
Reverse Transfer Capacitance
2
5
t
d(ON)
Turn-ON Delay Time
10
t
r
Rise Time
15
t
d(OFF)
Turn-OFF Delay Time
10
t
f
Fall Time
10
V
SD
Diode Forward Voltage Drop
0.8
V
V
GS
= 0V, I
SD
= 0.5A
t
rr
Reverse Recovery Time
300
ns
V
GS
= 0V, I
SD
= 0.5A
Notes:
1. All D.C. parameters 100% tested at 25
C unless otherwise stated. (Pulse test: 300
s pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Electrical Characteristics
(@ 25
C unless otherwise specified)
Drain-to-Source
Breakdown Voltage
Static Drain-to-Source
ON-State Resistance
mA
V
GS
= 0V, V
DS
= 25V
f = 1 MHz
V
DD
= 25V,
I
D
= 150mA,
R
GEN
= 25
ns
3
VN0550
Typical Performance Curves
Output Characteristics
0.5
0.4
0.3
0.2
0.1
0
V
DS
(volts)
I
D
(amperes)
Saturation Characteristics
0.25
0.20
0.15
0.10
0.05
0
V
DS
(volts)
I
D
(amperes)
Maximum Rated Safe Operating Area
1
1000
100
10
0.01
0.1
1.0
0.001
V
DS
(volts)
I
D
(amperes)
Thermal Response Characteristics
Thermal
Resistance
(normalized)
1.0
0.8
0.6
0.4
0.2
0.001
10
0.01
0.1
1
t
p
(seconds)
Transconductance vs. Drain Current
0.40
0.32
0.24
0.16
0.08
0
0
0.5
0.1
0.2
0.3
0.4
G
FS
(siemens)
I
D
(amperes)
Power Dissipation vs. Case Temperature
0
150
100
50
2.0
125
75
25
T
C
(C)
P
D
(watts)
TO-92
P
D
= 1W
T
C
= 25C
TO-92
T
A
= -55C
T
A
= 25C
T
A
= 125C
V
DS
= 25V
0
10
20
30
50
40
VGS = 10V
8V
6V
4V
0
2
4
6
10
8
V
GS
= 10V
6V
8V
4V
0
TO-92 (DC)
TC = 25C
1.0
0
4
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 FAX: (408) 222-4895
www.supertex.com
11/12/01
2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
VN0550
Typical Performance Curves
C
OSS
Gate Drive Dynamic Characteristics
Q
G
(nanocoulombs)
V
GS
(volts)
T
j
(
C)
V
GS(th)
(normalized)
V
DS
(th)
and R
Variation with Temperature
On-Resistance vs. Drain Current
R
DS(ON)
(ohms)
BV
DSS
(normalized)
T
j
(
C)
Transfer Characteristics
V
GS
(volts)
I
D
(amperes)
Capacitance vs. Drain-to-Source Voltage
100
75
50
25
0
C (picofarads)
V
DS
(volts)
I
D
(amperes)
BV
DSS
Variation with Temperature
0
10
20
30
40
0
2
4
6
8
10
0.5
0.4
0.3
0.2
0.1
0
-50
0
50
100
150
1.1
1.0
0.9
100
80
60
40
20
0
1.4
1.2
1.0
0.8
0.6
10
8
6
4
2
0
0.2
0.4
0.6
0.8
1.0
-50
0
50
100
150
50 pF
V
DS
= 40V
V
DS
= 10V
105 pF
V
(th)
@ 1mA
V
GS
= 5V
V
GS
= 10V
T
= -55
A
C
V
DS
= 25V
C
ISS
C
RSS
25
C
150
C
0
0.1
0.2
0.3
0.5
0.4
R
DS(ON)
@ 10V, 50mA
f = 1MHz
112 pF
1.8
1.4
1.0
0.6
0.2
0
R
DS(ON)
(normalized)
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