78Q8392L
Low Power Ethernet
Coaxial Transceiver
February 1998
DESCRIPTION
The 78Q8392L Ethernet Transceiver is a low power
BiCMOS coax line transmitter/receiver. The device
includes analog transmit and receive buffers, a 10
MHz on-board oscillator, timing logic for jabber and
heartbeat functions, output drivers and bandgap
reference, in addition to a current reference and
collision detector.
This transceiver provides the interface between the
single-ended coaxial cable signals and the
Manchester-encoded differential logic signals.
Primary functional blocks include the receiver,
transmitter, collision detection and jabber timer. This
IC may be used in either internal or external MAU
environments.
The 78Q8392L is available in 16-pin plastic and 28-
pin PLCC packages.
FEATURES
Very low power consumption
Compliant with Ethernet II, IEEE 802.3
10Base5 and 10Base2
Integrates all transceiver functions except
signal and power isolation
Innovative design minimizes external
components count and power consumption
Jabber timer function integrated on chip
Externally selectable CED heartbeat allows
operation with IEEE 802.3 compatible
repeaters
Squelch circuitry at all inputs rejects noise
Power-on reset and test modes
Advanced BiCMOS process
CONNECT DIAGRAM
510 5%
x 4
CD+
CD
RX+
RX
TX+
TX-
COLLISION
SIGNAL
TO DTE
DATA TO
DTE
DATA FROM
DTE
VEE
VEE
GND
RR-
RR+
9V
4
1
13
2
3
6
12
11
7
8
78
TXO
15
HBE
9
VEE
5
CDS
16
RXI
14
COAX
10
78Q8392L
Low Power Ethernet
Coaxial Transceiver
2
FUNCTIONAL DESCRIPTION
The 78Q8392L incorporates six basic functions of
the Ethernet Transceiver, including receiving,
transmitting, collision signaling, collision detection,
jabber timing, and the heartbeat function. Refer to
Figure 1 for a general system block diagram.
RECEIVER FUNCTIONS
The receiver senses signals through the RXI input,
which minimizes reflections on the transmission
media using a low capacitance, high resistance input
buffer amplifier. The CDS ground input attaches
directly to the input buffer from the coaxial shield to
eliminate ground loop noise.
In addition to the input buffer, the receiver data path
consists of an equalizer, data slicer, receiver squelch
circuitry, and an output line driver.
The equalizer improves the cable-induced jitter; the
data slicer restores equalized received signals to fast
transition signals with binary levels to drive the
receiver line driver; and the receiver line driver drives
the AUI cable through an isolation transformer that
connects to the AUI interface.
Noise on the transmission media is rejected by the
receiver squelch circuitry, which determines valid
data via three criteria: Average DC level, pulse width
and transition period. The DC voltage level is
detected and compared to a set level in the receiver
comparator circuit. The pulse width must be greater
than 20 ns to pass the narrow pulse filter; the
transition timer outputs a true level on the RX Data
Valid line provided the time between transitions is
less than about 200 ns. As long as a valid RXI signal
is detected, the output line driver remains enabled.
The transition timer disables the line driver when
there are no further transitions on the data medium,
and the RX+, RX- pins go to a zero differential
voltage state (Figure 3).
TRANSMITTER FUNCTIONS
The transmitter data path consists of a transmit input
buffer, pulse-shaping filter, transmit squelch
circuitry and transmit output line driver. The
self-biasing transmit input buffer receives data
through an isolation transformer and translates the
AUI differential analog signal to square pulse suitable
for driving the pulse shaping filter.
The filter outputs a correctly shaped and bandlimited
signal to the transmit output driver, which drives the
transmission medium through a high impedance
current source. When the transmitter is off, the
capacitance of the transmit driver is isolated from the
transmission media by an external diode with a low
capacitance node. The shield of the transmission
media serves as the ground return for the transmitter
function.
A transmit squelch circuit, which consists of a pulse
threshold detector, a pulse width detector, and a
pulse duration timer, is used to suppress noise, as
well as crosstalk on the AUI cable. The squelch
circuitry disables the transmit driver if the signal at
TX+ or TX- is smaller than the pulse threshold. Pulse
noise is rejected by a pulse width detector that
passes only pulses with durations greater than 20 ns.
The pulse duration timer disables the transmit driver
if no pulses are received for two-bit periods following
valid pulses. At the end of a transmission, the pulse
duration timer disables the transmitter and triggers
the blanking timer, used to block "dribble" bits.
COLLISION DETECTION
A collision occurs when two or more transmitters
simultaneously transmit on the transmission media. A
collision is detected by comparing the average DC
level of the transmission media to a collision
threshold. The received signal at RXI is buffered and
sent through a low pass filter, then compared in the
collision threshold circuit. If the average DC level
exceeds a collision threshold, a 10 MHz signal is
output on the CD pins.
COLLISION SIGNALING
When collision signaling is enabled, a 10 MHz signal
is sent from the CD pins through an isolation
transformer to the DTE. When the function is
disabled, this output goes to a zero differential state.
The 10 MHz output from the CD pins indicates a
collision on the transmission media, a heartbeat
function, or that the transmitter is in jabber mode.
78Q8392L
Low Power Ethernet
Coaxial Transceiver
3
JABBER FUNCTION
When valid data on the TX pins detected, the jabber
timer is started. If there is valid data for more than 20
ns, a latch is set which disables the transmitter
output and enables the 10 MHz output on the CD
pins. The latch is reset within 0.5 seconds after the
valid data is removed from the transmitter input
(TX). This action resets the jabber timer and
disables the 10 MHz CD output. The TX inputs
must remain inactive during the 0.5 second reset
period.
HEARTBEAT FUNCTION
The 10 MHz CD outputs are enabled for about 1 s
at approximately 1.1 s after the end of each
transmission. The heartbeat signal tells the DTE that
the circuit is functioning. This is implemented by
starting the heartbeat timer when the valid data
signal indicates the end of a transmission. This
function is disabled when HBE pin is tied to V
EE.
FIGURE 1: 78Q8392L General System Block Diagram
DATA MEDIA
RECEIVER
INPUT
BUFFER
RXI
CDS
EQUALIZER
SQUELCH
COMPARATOR
LP FILTER
SQUELSH
THRESHOLD
RX+
RX-
TXO
TRANSMIT
OUTPUT DRIVER
PULSE
SHAPING
FILTER
TX+
TX-
TRANSMIT INPUT
BUFFER
BANDGAP
REFERENCE
AND CURRENT
REFERENCE
10 MHz
OSC
RR+
RR-
CD+
CD-
SLICER
TRANSITION
PERIOD
TAMER
NARROW
PULSE
FILTER
RX DATA
VALID
ENABLE
SLICER
TX ON
CONTROL LOGIC
JABBER TIMER
BLANKING TIMER
HEART BEAT TIMER
TX DATA VALID
END TRANSMIT
TX DISABLE
ENABLE
TX < -250 mV
TX > -250 mV
COMPARATOR
TX DISABLE
CD ON
COLLISION
THRESHOLD
COLLISION
COMPARATOR
BUFFERED TX
TRANSITION
PERIOD
TIMER
TRANSITION
END
TIMER
NARROW
PULSE
FILTER
SIGNAL
PRESET
DETECT
78Q8392L
Low Power Ethernet
Coaxial Transceiver
4
PIN DESCRIPTION
NAME
TYPE
DESCRIPTION
CD+*/CD-
O
Collision Output. Balanced differential line driver outputs from the collision detect
circuitry. The 10 MHz signal from the internal oscillator is transferred to these outputs
in the event of collision, excessive transmission (jabber), or during CD Heartbeat
condition. These outputs are open emitters; pulldown resistors to VEE are required.
When operating into a 78
transmission line, these resistors should be 510
. In
Cheapernet applications, where the 78
drop cable is not used, higher resistor
values (up to 1.5k) may be used to save power.
RX+*/RX-
O
Receive Output. Balanced differential line driver outputs from the Receiver. These
outputs also require 510
pulldown resistors.
TX+*/TX-
I
Transmit Input. Balanced differential line receiver inputs to the Transmitter. The
common mode voltage for these inputs is determined internally and must not be
externally established. Signals meeting Transmitter squelch requirements are
waveshaped and output at TXO.
HBE
I
Heartbeat Enable. This input enables CD Heartbeat when grounded or left opened,
disables it when connected to VEE.
RR+/RR-
I
External Resistor. A fixed 1 k
1% resistor connected between these pins
establishes internal operating currents.
RXI
I
Receive Input. Connects directly to the coaxial cable. Signals meeting Receiver
squelch requirements are equalized for inter-symbol distortion, amplified, and output
at RX+ and RX- pin.
TXO
O
Transmit Output. Connects via an isolation diode to the coaxial cable.
CDS
I
Collision Detect Sense. Ground sense connection for the collision detect circuit. This
pin should be connected separately to the shield to avoid ground drops from altering
the receive mode collision threshold.
GND
S
Positive Supply Pin.
VEE
S
Negative Supply Pins. These pins should be connected to a large metal frame area
on the PC board to handle heat dissipation, and bypassed to the GND pin with a 0.1
F capacitor as close to the package as possible.
*IEEE names for CD = CI, RX = DI, TX = DO
Notes: Pin type: I-input; O-output; S-power supply
78Q8392L
Low Power Ethernet
Coaxial Transceiver
5
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings indicate limits beyond which permanent damage may occur. Continuous operation at
these limits is not recommended; operations should be limited to those conditions specified under recommended
operating characteristics.
PARAMETER
RATING
Supply Voltage
-10V
Input Voltage
0 to V
EE
Storage Temperature
-65 to 150
C
Soldering (Reflow or Dip)
235
C for 10 sec
Package power dissipation
1.0 watts @ 25
C
DC OPERATING CHARACTERISTICS
0
C
T (ambient)
+70
C, VEE = -9V 5%
PARAMETER
CONDITION
MIN
NOM
MAX
UNIT
I
EE1
Supply current out of
V
EE
pin - non-transmitting
6
8
mA
I
EE2
Supply current out of
V
EE
pin - transmitting
50
65
mA
I
RXI
Receive input bias
current (RXI)
See Note 3
-2
+25
A
I
TDC
Transmit output dc
current level (TXO)
See Note 4
37
41
45
mA
I
TAC
Transmit output ac
current level (TXO)
See Notes 4 & 5
28
I
TDC
mA
V
CD
Collision threshold
(Receive mode)
See Note 9
-1.58
-1.52
-1.404
V
V
OD
Differential output voltage
(RX, CD)
See Notes 3 & 7
550
1200
mV
V
OC
Common mode output
voltage (RX, CD)
See Note 3, 6 & 7
-3.0
-2.5
-2.0
V
V
OB
Differential output voltage
imbalance (RX, CD)
See Notes 3, 7 & 8
40
mV
V
TS
Transmitter squelch
threshold (TX)
-340
-260
-200
mV
C
X
Input capacitance (RXI)
1.2
pF
R
RXI
Shunt resistance
non-transmitting (RXI)
See Note 3
100
150
k
R
TXO
Shunt resistance
transmitting (TXO)
See Note 4
200
k
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