U4080B
Preliminary Information
TELEFUNKEN Semiconductors
Rev. A1, 20-May-96
1 (15)
Voice-Switched Circuit for Handsfree Operation
Description
The voice switched speakerphone integrated circuit,
U4080B, incorporates a variety of functions (see below).
The versality of the device is further enhanced by the
provision of a large number of pins giving access to
internal circuit points.
Features
D Operates on telephone lines, integrated reference
voltage regulation
D Output power: 100 mW at a 25-
load with peak
limitation
D Chip select pin for active/standby operation
D Linear volume control
D Monitoring system for background sound level
D Wide operating dynamic range through signal
compression
Block Diagram / Application Circuit
Figure 1. Block diagram and application circuit
U4080B
TELEFUNKEN Semiconductors
Rev. A1, 20-May-96
Preliminary Information
2 (15)
Pin Description
Pin
Symbol
Function
1
R1
Load resistance.
Provides reference current for the
transmit and receive attenuators.
2
RTG
Transmit attenuator nominal gain
resistor.
Transmit channel gain is inversely
proportional to the resistance RTG
connected to Pin 2.
3
TI
Transmit attenuator input.
Input resistance is 5 k
4
TO
Transmit attenuator output.
Drives the input of the transmit level
detector and the external circuit which
drives the telephone line.
5
TLI
Transmit level detector input.
Sets the detector level. Sensitivity to
transmit channel signals increases
when the value of the resistor
decreases.
6
TLO
Transmit level detector output.
The external RC-element sets the time
the comparator will hold the system in
the transmit mode after speech ceases.
7
RLI
Receive level detector input.
An external resistance connected to the
pin sets the detection level. Sensitivity
to receive channel signals increases
when the resistor decreases.
8
RLO
Receive level detector output.
RC-element connected at the pin sets
the time the comparator will hold the
system in the receive mode after the
receive signal expires.
9
MIC
Microphone amplifier input.
Input impedance is 10 k
and the bias
voltage is approximately equal to V
B.
10
MICO
Microphone amplifier output.
Gain is set internally at 34 dB
(50 V/V).
11
CP1
RC circuit for holding background
noise level.
The transmit detector compares the
CP1 voltage with the speech signal
from CP2.
12
CP2
Capacitor for detecting the speech
signal for comparison with the
background noise held at Pin 11 (CP1).
13
TDI
Transmit detector input.
The microphone amplifier output is
coupled to the TDI pin through an
external resistor.
Pin
Symbol
Function
14
GND1
High current ground pin for the speaker
amplifier output stage.
GND1 voltage should be within 10 mV
of the ground voltage of Pin 22.
15
SAO
Speaker amplifier output.
It will source and sink up to 100 mA
when ac coupled to the speaker. Gain is
set internally at 34 dB (50 V/V).
16
V+
DC supply.
17
AGC
A capacitor from this pin to V
B
stabilizes the speaker amplifier gain
control loop, and additionally controls
the attack and decay time of this
circuit. The gain control loop limits the
speaker amp input to prevent clipping
at SAO. The internal resistance at the
AGC pin is nominally 110 k
.
18
CS
Digital chip select input.
Logic O: VCC regulator is enabled
when
x 0.7 V; Logic 1: Standby mode
drawing 0.5 mA when
y 1.6 V
19
SAI
Speaker amplifier input.
Input impedance is ca. 20 k
.
20
VCC
Regulated output voltage (5.4 V).
It powers all circuits except the speaker
amplifier output. This voltage can be
used for an external circuit i.e., a
microprocessor where a filter capacitor
is required.
21
V
B
Output voltage.
V
B
is approximately VCC/2 and serves
as an analog ground to the speaker-
phone system.
22
GND2
Integrated circuit ground
(except for the speaker amplifier).
23
TDO
Transmit detector output.
An external RC circuit holds the
system in the transmit mode during
pauses between words or phrases.
24
VCI
Volume control input.
A variable resistor connected to this
pin provides receive mode volume
control.
25
ACF
Attenuator control filter.
A connected capacitor reduces noise
transients as the attenuator control
switches levels of attenuation.
U4080B
Preliminary Information
TELEFUNKEN Semiconductors
Rev. A1, 20-May-96
3 (15)
Pin
Symbol
Function
26
RECO
Receive output attenuator.
This pin is normally ac coupled to the
input of the speaker amplifier
(Pin 19 SAI)
27
RECI
Receive input attenuator.
Input resistance is nominally 5 k
.
28
RG
Resistor connected from Pin 28 to
ground determines the nominal gain of
the receive attenuator. The receive
channel gain is directly proportional to
the RG resistance.
Absolute Maximum Ratings
Reference point Pin 22, T
amb
= 25
C, unless otherwise specified
Parameters
Symbol
Value
Unit
Supply voltage
Pin 16
V+
14
V
Digital chip select input voltage
Pin 18
V
18
14
V
Speaker amplifier ground voltage Pin 14
V
14
3
V
Volume control input voltage
Pin 24
V
24
V
CC
C
Storage temperature range
T
stg
40 to + 125
C
Junction temperature
T
j
125
C
Ambient temperature range
T
amb
20 to + 60
Power dissipation T
amb
= 60
C
P
tot
1.3
W
Thermal Resistance
Parameters
Symbol
Value
Unit
Junction ambient
R
thJA
50
K/W
U4080B
TELEFUNKEN Semiconductors
Rev. A1, 20-May-96
Preliminary Information
4 (15)
Electrical Characteristics
V
16
= + 7.5 V, V
18
= 0.7 V, figure 1, T
amb
= 25
C, unless other specified
Parameters
Test Conditions / Pins
Symbol
Min.
Typ.
Max.
Unit
Supply voltages
Supply current
V
16
= 11 V, V
18
= 0.7 V
V
16
= 11 V, V
18
= 1.6 V
Pin 16
Pin 16
I+
I+
9.0
800
mA
Regulated output voltage
Pin 20
V
CC
4.9
5.4
5.9
V
Line regulation (deviation)
6.5 V
x V
I
x 11 V
DV
CC
65
150
mV
Output resistance
I
CC
= 3 mA
R
O
6.0
20
Dropout voltage
V
16
= 5 V
V
CCSat
80
300
mV
Output voltage
Pin 21
V
B
2.5
2.9
3.3
V
Output resistance
I
B
= 1.7 mA
Pin 21
R
O
250
Attenuators
Receive attenuator gain
f = 1 kHz, R
mode'
V
24
= V
B
V
27
= 250 mV
rms
Pin 26, 27
G
R
2.0
6.0
10
dB
Gain range
R to T modes
DG
R
40
44
48
dB
Idle mode, V
27
= 250 V
rms
G
RI
20
16
12
dB
RECO voltage (R mode)
V
RECO
1.8
2.3
3.2
V
Delta RECO voltage
DV
RECO
100
mV
RECO sink current
(R mode)
I
RECOL
75
mA
RECO source current
(R mode)
I
RECOH
1.0
3.0
mA
RECI input resistance
R
RECI
3.5
5.0
8.0
k
Volume control range
(R attenuator gain, R mode)
0.6 V
B
x V24 x V
B
V
CR
24.5
22.5
32.5
dB
Transmit attenuator gain
Pins 3 and 4
f = 1 kHz, T
mode'
V
3
= 250 mV
rms
G
T
4.0
6.0
8.0
dB
Gain range T to R mode
DG
T
40
44
48
dB
Idle mode, V
3
= 250 mV
rms
G
TI
16.5
13
8.5
dB
TO voltage (T mode)
V
TO
1.8
2.3
3.2
V
Delta TO voltage
switch from T to R mode
DV
TO
100
mV
TO sink current, T mode
I
TOL
75
mA
TO source current, T mode
I
TOH
1.0
3.0
mA
TI input resistance
R
TI
3.5
5.0
8.0
k
U4080B
Preliminary Information
TELEFUNKEN Semiconductors
Rev. A1, 20-May-96
5 (15)
Unit
Max.
Typ.
Min.
Symbol
Test Conditions / Pins
Parameters
Speaker amplifier
Pins 15 and 19
Gain, V
19
= 20 mV
rms
G
SA
33
34
35
dB
Input impedance
R
I
15
22
37
k
Output voltage (Pin 19 =
cap coupled to GND)
V
O
2.4
3.0
3.6
V
High output voltage
V
19
= 0.1 V,
V
15
= 100 mA
V
OH
5.5
V
Low output voltage
V
19
= 0.1 V,
V
15
= +100 mA
V
OL
600
mA
Log amplifiers
Receive level detector
leakage current
V
8
= V
B
+ 1.0 V
Pin 8
I
LR
2.0
mA
Transmit level detector
leakage current
V
6
= V
B
+ 1.0 V
Pin 6
I
LT
2.0
mA
Transmit-Receive
switching threshold
V
8
/V
6
at 20
A to switch
Pins 5 and 7
T-R comparator
Pin 25
I
TH
0.8
1.2
Transmit detector
Pin 23
DC voltage: Idle mode
T mode
V
23
V
23
0
4.0
V
Distortion
Pins 15 and 27
R mode: RECI to SAO
V
27
= 10 mV
rms'
, f = 1 kHz
d
1.5
%
T mode: MIC to TO
V
9
= 5 mV
rms'
f = 1 kHz
d
2.0
%
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