54AC11241, 74AC11241
OCTAL BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS032A JULY 1987 REVISED APRIL 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Copyright
1993, Texas Instruments Incorporated
21
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin V
CC
and GND Configurations
Minimize High-Speed Switching Noise
EPIC
t
(Enhanced-Performance Implanted
CMOS) 1-
m
m Process
500-mA Typical Latch-Up Immunity
at 125
C
Package Options Include Plastic Small-
Outline Packages, Plastic Shrink
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
description
This octal buffer or line driver is designed
specifically to improve both the performance
and density of three-state memory address
drivers, clock drivers, and bus-oriented receivers
and transmitters. Taken together with the
AC11240 and AC11244, these devices provide
the choice of selected combinations of inverting
and noninverting outputs, symmetrical G (active-
low output control) inputs, and complementary
G and G inputs. This device features a high
fan-out.
The 54AC11241 is characterized for operation
over the full military temperature range of 55
C
to 125
C. The 74AC11241 is characterized for
operation from 40
C to 85
C.
FUNCTION TABLE
OUTPUT
CONTROL
1G
DATA
INPUT
1A
OUTPUT
1Y
OUTPUT
CONTROL
2G
DATA
INPUT
2A
OUTPUT
2Y
H
X
Z
L
X
Z
L
L
L
H
L
L
L
H
H
H
H
H
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
1Y1
1Y2
1Y3
1Y4
GND
GND
GND
GND
2Y1
2Y2
2Y3
2Y4
1G
1A1
1A2
1A3
1A4
V
CC
V
CC
2A1
2A2
2A3
2A4
2G
54AC11241 . . . JT PACKAGE
74AC11241 . . . DB, DW OR NT PACKAGE
(TOP VIEW)
3 2 1
13 14
5
6
7
8
9
10
11
1A2
1A1
1G
NC
1Y1
1Y2
1Y3
4
15 16 17 18
GND
GND
NC
GND
GND
2Y1
1A3
1A4
NC
54AC11241 . . . FK PACKAGE
(TOP VIEW)
28 27 26
25
24
23
22
21
20
19
12
1Y4
2A1
2A2
CC
V
CC
V
NC No internal connection
2A3
2A4
2G
NC
2Y4
2Y3
2Y2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
EPIC is a trademark of Texas Instruments Incorporated.
54AC11241, 74AC11241
OCTAL BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS032A JULY 1987 REVISED APRIL 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
22
logic symbol
logic diagram (positive logic)
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
1G
24
1A1
1A2
1A3
1A4
23
22
21
20
1Y1
1Y2
1Y3
1Y4
1
2
3
4
2G
13
2A1
2A2
2A3
2A4
17
16
15
14
2Y1
2Y2
2Y3
2Y4
9
10
11
12
2A4
2A3
2A2
2A1
2G
1A4
1A3
1A2
1A1
1G
2Y4
2Y3
2Y2
2Y1
1Y4
1Y3
1Y2
1Y1
12
11
10
9
4
3
2
1
14
15
16
17
13
EN
20
21
22
23
24
EN
Pin numbers shown are for the DW, JT, and NT packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1)
0.5 V to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, V
O
(see Note 1)
0.5 V to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
)
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(V
O
= 0 to V
CC
)
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND
200 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
54AC11241, 74AC11241
OCTAL BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS032A JULY 1987 REVISED APRIL 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
23
recommended operating conditions
54AC11241
74AC11241
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
UNIT
VCC
Supply voltage
3
5
5.5
3
5
5.5
V
VCC = 3 V
2.1
2.1
VIH
High-level input voltage
VCC = 4.5 V
3.15
3.15
V
VCC = 5.5 V
3.85
3.85
VCC = 3 V
0.9
9.9
VIL
Low-level input voltage
VCC = 4.5 V
1.35
1.35
V
VCC = 5.5 V
1.65
1.65
VI
Input voltage
0
VCC
0
VCC
V
VO
Output voltage
0
VCC
0
VCC
V
VCC = 3 V
4
4
IOH
High-level output current
VCC = 4.5 V
24
24
mA
VCC = 5.5 V
24
24
VCC = 3 V
12
12
IOL
Low-level output current
VCC = 4.5 V
24
24
mA
VCC = 5.5 V
24
24
D
t /
D
v
Input transition rise or fall rate
Data
0
10
0
10
ns/ V
D
t /
D
v
Input transition rise or fall rate
G
0
5
0
5
ns/ V
TA
Operating free-air temperature
55
125
40
85
C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25
C
54AC11241
74AC11241
UNIT
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
3 V
2.9
2.9
2.9
IOH = 50
m
A
4.5 V
4.4
4.7
4.4
5.5 V
5.4
5.4
5.4
VOH
IOH = 4 mA
3 V
2.58
2.4
2.48
V
VOH
IOH = 24 mA
4.5 V
3.94
3.7
3.8
V
IOH = 24 mA
5.5 V
4.94
4.7
4.8
IOH = 50 mA
{
5.5 V
3.85
IOH = 75 mA
{
5.5 V
3.85
3 V
0.1
0.1
0.1
IOL = 50
m
A
4.5 V
0.1
0.1
0.1
5.5 V
0.1
0.1
0.1
VOL
IOL = 12 mA
3 V
0.36
0.5
0.44
V
VOL
IOL = 24 mA
4.5 V
0.36
0.5
0.44
V
IOL = 24 mA
5.5 V
0.36
0.5
0.44
IOL = 50 mA
{
5.5 V
1.65
IOL = 75 mA
{
5.5 V
1.65
IOZ
VO = VCC or GND
5.5 V
0.5
10
5
m
A
II
VI = VCC or GND
5.5 V
0.1
1
1
m
A
ICC
VI = VCC or GND, IO = 0
5.5 V
8
160
80
m
A
Ci
VI = VCC or GND
5 V
4
pF
Co
VO = VCC or GND
5 V
10
pF
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
54AC11241, 74AC11241
OCTAL BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS032A JULY 1987 REVISED APRIL 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
24
switching characteristics over recommended operating free-air temperature range,
V
CC
= 3.3 V
0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
TA = 25
C
54AC11241
74AC11241
UNIT
PARAMETER
(INPUT)
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
tPLH
A
Y
1.5
7
10
1.5
12.2
1.5
11.4
ns
tPHL
A
Y
1.5
6.2
8.4
1.5
10.2
1.5
9.2
ns
tPZH
G or G
Y
1.5
7.8
11.4
1.5
13.8
1.5
12.9
ns
tPZL
G or G
Y
1.5
7.7
10.6
1.5
12.6
1.5
11.7
ns
tPHZ
G or G
Y
1.5
5.8
7.6
1.5
8.2
1.5
7.9
ns
tPLZ
G or G
Y
1.5
7.1
9.3
1.5
10.3
1.5
9.9
ns
switching characteristics over recommended operating free-air temperature range,
V
CC
= 5 V
0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
TA = 25
C
54AC11241
74AC11241
UNIT
PARAMETER
(INPUT)
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
tPLH
A
Y
1.5
4.9
7.1
1.5
8.5
1.5
8
ns
tPHL
A
Y
1.5
4.5
6.3
1.5
7.2
1.5
6.8
ns
tPZH
G or G
Y
1.5
5.4
8
1.5
9.7
1.5
9
ns
tPZL
G or G
Y
1.5
5.3
7.6
1.5
9
1.5
8.4
ns
tPHZ
G or G
Y
1.5
4.9
6.6
1.5
7.2
1.5
6.9
ns
tPLZ
G or G
Y
1.5
5.6
7.5
1.5
8.3
1.5
8
ns
operating characteristics, V
CC
= 5 V, T
A
= 25
C
PARAMETER
TEST CONDITIONS
TYP
UNIT
C d
Power dissipation capacitance per buffer
Outputs enabled
CL = 50 pF
f = 1 MHz
26
pF
Cpd Power dissipation capacitance per buffer
Outputs disabled
CL = 50 pF, f = 1 MHz
10
pF
54AC11241, 74AC11241
OCTAL BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS032A JULY 1987 REVISED APRIL 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
25
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
2
VCC
500
500
tPLH
tPHL
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2
VCC
(see Note C)
Output
Waveform 2
S1 at GND
(see Note C)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
50%
50%
50%
50%
[
VCC
VCC
0 V
50% VCC
50% VCC
VOH
VOL
0 V
50% VCC
20% VCC
50% VCC
80% VCC
[
0 V
VCC
GND
Open
Input
(see Note B)
Output
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2
VCC
GND
TEST
S1
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR
10 MHz, ZO = 50
, tr = 3 ns, tf = 3 ns.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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