54ACT16474, 74ACT16474
18-BIT REGISTERED BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS238A MAY 1992 REVISED APRIL 1996
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Members of the Texas Instruments
Widebus
TM
Family
D
Inputs Are TTL-Voltage Compatible
D
3-State Outputs Drive Bus Lines Directly
D
Flow-Through Architecture Optimizes
PCB Layout
D
Distributed V
CC
and GND Pin
Configurations Minimize High-Speed
Switching Noise
D
EPIC
TM
(Enhanced-Performance Implanted
CMOS) 1-
m Process
D
500-mA Typical Latch-Up Immunity at
125
C
D
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) Packages Using
25-mil Center-to-Center Pin Spacings and
380-mil Fine-Pitch Ceramic Flat (WD)
Packages Using 25-mil Center-to-Center
Pin Spacings
description
The 'ACT16474 are noninverting 18-bit registered
bus transceivers composed of two 9-bit sections
with separate control signals. For either 9-bit
transceiver section, data flow in the A-to-B mode
is controlled by output-enable (1OEAB or 2OEAB)
and clock (1CLKAB or 2CLKAB) inputs. When
1OEAB or 2OEAB is low, the corresponding
outputs are active (high or low) and take on either
the current data on low-to-high transition of
1CLKAB or 2CLKAB or the previously stored data
if 1CLKAB or 2CLKAB is low.
When 1OEAB or 2OEAB is high, the corresponding outputs are in the high-impedance state. 1OEAB or 2OEAB
does not affect the operation on the internal registers. Previously stored data can be retained or new data can
be entered while the outputs are in the high-impedance state.
Data flow from B to A is similar, but uses 1OEBA and/or 2OEBA and 1CLKBA and/or 2CLKBA.
The 74ACT16474 is packaged in TI's shrink small-outline package, which provides twice the I/O pin count and
functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16474 is characterized for operation over the full military temperature range of 55
C to 125
C. The
74ACT16474 is characterized for operation from 40
C to 85
C.
Copyright
1996, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
1
2
3
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5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OEAB
1CLKAB
1A1
GND
1A2
1A3
V
CC
1A4
1A5
1A6
GND
1A7
1A8
1A9
2A1
2A2
2A3
GND
2A4
2A5
2A6
V
CC
2A7
2A8
GND
2A9
2CLKAB
2OEAB
1OEBA
1CLKBA
1B1
GND
1B2
1B3
V
CC
1B4
1B5
1B6
GND
1B7
1B8
1B9
2B1
2B2
2B3
GND
2B4
2B5
2B6
V
CC
2B7
2B8
GND
2B9
2CLKBA
2OEBA
54ACT16474 . . . WD PACKAGE
74ACT16474 . . . DL PACKAGE
(TOP VIEW)
54ACT16474, 74ACT16474
18-BIT REGISTERED BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS238A MAY 1992 REVISED APRIL 1996
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
FUNCTION TABLE
INPUTS
OUTPUT
CLKAB
OEAB
A
B
X
H
X
Z
L
L
X
B0
L
H
H
L
L
L
A-to-B data flow is shown: B-to-A flow is
similar but uses CLKBA, and OEBA.
Output level before the indicated steady-
state input conditions were established
logic symbol
1OEBA
1OEAB
2OEBA
2OEAB
2
1CLKAB
C1
1A1
3
1D
4
1A2
5
1A3
6
1A4
8
1A5
9
1A6
10
1A7
12
1A8
13
1B1
54
5D
1B2
52
1B3
51
1B4
49
1B5
48
1B6
47
1B7
45
1B8
44
EN2
1
30
2CLKBA
C7
EN8
29
27
2CLKAB
C5
EN6
28
55
1CLKBA
C3
EN4
56
2A1
15
5D
8
2A2
16
2A3
17
2A4
19
2A5
20
2A6
21
2A7
23
2A8
24
2B1
42
7D
2B2
41
2B3
40
2B4
38
2B5
37
2B6
36
2B7
34
2B8
33
2
1B9
43
1A9
14
2B9
31
2A9
26
6
1
1
1
1
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
54ACT16474, 74ACT16474
18-BIT REGISTERED BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS238A MAY 1992 REVISED APRIL 1996
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic diagram (positive logic)
1A1
55
3
2
1
56
1OEBA
1OEAB
1CLKAB
1CLKBA
To Eight Other Channels
1B1
2A1
30
15
27
28
29
2B1
2OEBA
2OEAB
2CLKAB
2CLKBA
C1
C1
1D
1D
C1
C1
1D
1D
42
54
To Eight Other Channels
54ACT16474, 74ACT16474
18-BIT REGISTERED BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS238A MAY 1992 REVISED APRIL 1996
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
0.5 to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1)
0.5 to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
O
(see Note 1)
0.5 to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
)
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(V
O
= 0 to V
CC
)
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND
450 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum package power dissipation at T
A
= 55
C (in still air) (see Note 2): DL package
1.4 W
. . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150
C and a board trace length of 750 mils.
recommended operating conditions (see Note 3)
54ACT16474
74ACT16474
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
UNIT
VCC
Supply voltage
4.5
5
5.5
4.5
5
5.5
V
VIH
High-level input voltage
2
2
V
VIL
Low-level input voltage
0.8
0.8
V
VI
Input voltage
0
VCC
0
VCC
V
VO
Output voltage
0
VCC
0
VCC
V
IOH
High-level output current
24
24
mA
IOL
Low-level output current
24
24
mA
t/
v
Input transition rise or fall rate
0
10
0
10
ns/V
TA
Operating free-air temperature
55
125
40
85
C
NOTE 3: Unused pins (input or I/O) must be held high or low to prevent them from floating.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
54ACT16474, 74ACT16474
18-BIT REGISTERED BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS238A MAY 1992 REVISED APRIL 1996
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25
C
54ACT16474
74ACT16474
UNIT
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
IOH = 50
A
4.5 V
4.4
4.4
4.4
IOH = 50
A
5.5 V
5.4
5.4
5.4
VOH
IOH = 24 mA
4.5 V
3.94
3.8
3.8
V
IOH = 24 mA
5.5 V
4.94
4.8
4.8
IOH = 75 mA
5.5 V
3.85
3.85
IOL = 50
A
4.5 V
0.1
0.1
0.1
IOL = 50
A
5.5 V
0.1
0.1
0.1
VOL
IOL = 24 mA
4.5 V
0.36
0.44
0.44
V
IOL = 24 mA
5.5 V
0.36
0.44
0.44
IOL = 75 mA
5.5 V
1.65
1.65
II
Control inputs
VI = VCC or GND
5.5 V
0.1
1
1
A
IOZ
A or B ports
VO = VCC or GND
5.5 V
0.5
5
5
A
ICC
VI = VCC or GND,
IO = 0
5.5 V
8
80
80
A
ICC
One input at 3.4 V,
Other inputs at VCC or GND
5.5 V
0.9
1
1
mA
Ci
Control inputs
VI = VCC or GND
5 V
3
pF
Cio
A or B ports
VO = VCC or GND
5 V
11.5
pF
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
For I/O ports, the parameter IOZ includes the input leakage current.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
timing requirements over recommended operating free-air temperature range,
V
CC
= 5 V
0.5 V (unless otherwise noted) (see Figure 1)
TA = 25
C
54ACT16474
74ACT16474
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
fclock
Clock frequency
0
75
0
75
0
75
MHz
t
Pulse duration
CLK high
4
4
4
ns
tw
Pulse duration
CLK low
6.6
6.6
6.6
ns
tsu
Setup time
Data before CLK
5.5
5.5
5.5
ns
th
Hold time
Data after CLK
1
1
1
ns
switching characteristics over recommended operating free-air temperature range,
V
CC
= 5 V
0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
TA = 25
C
54ACT16474
74ACT16474
UNIT
PARAMETER
(INPUT)
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
fmax
75
75
75
MHz
tPLH
CLK
A or B
4
8
10.2
4
11.5
4
11.5
ns
tPHL
CLK
A or B
4.2
8
10.2
4.2
11.4
4.2
11.4
ns
tPZH
OE
A or B
3
7.8
10.3
3
11.7
3
11.7
ns
tPZL
OE
A or B
3.7
9.2
11.6
3.7
13.1
3.7
13.1
ns
tPHZ
OE
A or B
4.8
7.1
8.8
4.8
9.5
4.8
9.5
ns
tPLZ
OE
A or B
4.4
6.6
8.4
4.4
9
4.4
9
ns
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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