SN54AC08, SN74AC08
QUADRUPLE 2 INPUT POSITIVE AND GATES
SCAS536D - SEPTEMBER 1995 - REVISED OCTOBER 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
2-V to 6-V V
CC
Operation
D
Inputs Accept Voltages to 6 V
D
Max t
pd
of 7.5 ns at 5 V
SN54AC08 . . . J OR W PACKAGE
SN74AC08 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
1Y
2A
2B
2Y
GND
V
CC
4B
4A
4Y
3B
3A
3Y
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
4A
NC
4Y
NC
3B
1Y
NC
2A
NC
2B
SN54AC08 . . . FK PACKAGE
(TOP VIEW)
1B
1A
NC
3Y
3A
V
2Y
GND
NC
NC - No internal connection
CC
4B
description/ordering information
The 'AC08 devices are quadruple 2-input positive-AND gates. These devices perform the Boolean function
Y = A
B or Y = A + B in positive logic.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP - N
Tube
SN74AC08N
SN74AC08N
SOIC - D
Tube
SN74AC08D
AC08
SOIC - D
Tape and reel
SN74AC08DR
AC08
-40
C to 85
C
SOP - NS
Tape and reel
SN74AC08NSR
AC08
-40 C to 85 C
SSOP - DB
Tape and reel
SN74AC08DBR
AC08
TSSOP - PW
Tube
SN74AC08PW
AC08
TSSOP - PW
Tape and reel
SN74AC08PWR
AC08
CDIP - J
Tube
SNJ54AC08J
SNJ54AC08J
-55
C to 125
C
CFP - W
Tube
SNJ54AC08W
SNJ54AC08W
-55 C to 125 C
LCCC - FK
Tube
SNJ54AC08FK
SNJ54AC08FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
A
B
OUTPUT
Y
H
H
H
L
X
L
X
L
L
Copyright
2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
On products compliant to MIL PRF 38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54AC08, SN74AC08
QUADRUPLE 2 INPUT POSITIVE AND GATES
SCAS536D - SEPTEMBER 1995 - REVISED OCTOBER 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic diagram, each gate (positive logic)
Y
A
B
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
-0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1)
-0.5 V to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, V
O
(see Note 1)
-0.5 V to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(V
O
= 0 to V
CC
)
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND
200 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 2): D package
86
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DB package
96
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package
80
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package
76
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package
113
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
-65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54AC08
SN74AC08
UNIT
MIN
MAX
MIN
MAX
UNIT
VCC
Supply voltage
2
6
2
6
V
VCC = 3 V
2.1
2.1
VIH
High-level input voltage
VCC = 4.5 V
3.15
3.15
V
VIH
High-level input voltage
VCC = 5.5 V
3.85
3.85
V
VCC = 3 V
0.9
0.9
VIL
Low-level input voltage
VCC = 4.5 V
1.35
1.35
V
VIL
Low-level input voltage
VCC = 5.5 V
1.65
1.65
V
VI
Input voltage
0
VCC
0
VCC
V
VO
Output voltage
0
VCC
0
VCC
V
VCC = 3 V
-12
-12
IOH
High-level output current
VCC = 4.5 V
-24
-24
mA
IOH
High-level output current
VCC = 5.5 V
-24
-24
mA
VCC = 3 V
12
12
IOL
Low-level output current
VCC = 4.5 V
24
24
mA
IOL
Low-level output current
VCC = 5.5 V
24
24
mA
t/
v
Input transition rise or fall rate
8
8
ns/V
TA
Operating free-air temperature
-55
125
-40
85
C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
SN54AC08, SN74AC08
QUADRUPLE 2 INPUT POSITIVE AND GATES
SCAS536D - SEPTEMBER 1995 - REVISED OCTOBER 2003
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25
C
SN54AC08
SN74AC08
UNIT
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
3 V
2.9
2.9
2.9
IOH = -50
A
4.5 V
4.4
4.4
4.4
IOH = -50
A
5.5 V
5.4
5.4
5.4
VOH
IOH = -12 mA
3 V
2.56
2.4
2.46
V
VOH
IOH = -24 mA
4.5 V
3.86
3.7
3.76
V
IOH = -24 mA
5.5 V
4.86
4.7
4.76
IOH = -50 mA
5.5 V
3.85
IOH = -75 mA
5.5 V
3.85
3 V
0.002
0.1
0.1
0.1
IOL = 50
A
4.5 V
0.001
0.1
0.1
0.1
IOL = 50
A
5.5 V
0.001
0.1
0.1
0.1
VOL
IOL = 12 mA
3 V
0.36
0.5
0.44
V
VOL
IOL = 24 mA
4.5 V
0.36
0.5
0.44
V
IOL = 24 mA
5.5 V
0.36
0.5
0.44
IOL = 50 mA
5.5 V
1.65
IOL = 75 mA
5.5 V
1.65
II
A or B ports
VI = VCC or GND
5.5 V
0.1
1
1
A
ICC
VI = VCC or GND,
IO = 0
5.5 V
2
40
20
A
Ci
VI = VCC or GND
5 V
4.5
pF
Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.
switching characteristics over recommended operating free-air temperature range,
V
CC
= 3.3 V
"
0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
TA = 25
C
SN54AC08
SN74AC08
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
tPLH
A or B
Y
1.5
7.5
9.5
1
12.5
1
10
ns
tPHL
A or B
Y
1.5
7
8.5
1
11.5
1
9
ns
switching characteristics over recommended operating free-air temperature range,
V
CC
= 5 V
"
0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
TA = 25
C
SN54AC08
SN74AC08
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
tPLH
A or B
Y
1.5
5.5
7.5
1
9
1
8.5
ns
tPHL
A or B
Y
1.5
5.5
7
1
8.5
1
7.5
ns
operating characteristics, V
CC
= 5 V, T
A
= 25
C
PARAMETER
TEST CONDITIONS
TYP
UNIT
Cpd
Power dissipation capacitance
CL = 50 pF,
f = 1 MHz
20
pF
SN54AC08, SN74AC08
QUADRUPLE 2 INPUT POSITIVE AND GATES
SCAS536D - SEPTEMBER 1995 - REVISED OCTOBER 2003
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
50% VCC
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
50% VCC
50 % VCC
VCC
0 V
50% VCC
50% VCC
Input
(see Note B)
Out-of-Phase
Output
In-Phase
Output
50% VCC
VOLTAGE WAVEFORMS
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
2
VCC
500
500
Open
S1
TEST
tPLH/tPHL
Open
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR
1 MHz, ZO = 50
, tr
v
2.5 ns, tf
v
2.5 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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