SN54ALS259, SN74ALS259
8-BIT ADDRESSABLE LATCHES
SDAS217A DECEMBER 1982 REVISED DECEMBER 1994
Copyright
1994, Texas Instruments Incorporated
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
8-Bit Parallel-Out Storage Register
Performs Serial-to-Parallel Conversion With
Storage
Asynchronous Parallel Clear
Active-High Decoder
Enable/Disable Input Simplifies Expansion
Expandable for n-Bit Applications
Four Distinct Functional Modes
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
description
These 8-bit addressable latches are designed for
general-purpose storage applications in digital
systems. Specific uses include working registers,
serial-holding registers, and active-high decoders
or demultiplexers. They are multifunctional
devices capable of storing single-line data in eight
addressable latches and being a 1-of-8 decoder or
demultiplexer with active-high outputs.
Four distinct modes of operation are selectable by
controlling the clear (CLR) and enable (G) inputs
as shown in the function table. In the
addressable-latch mode, data at the data-in
terminal is written into the addressed latch. The
addressed latch follows the data input with all unaddressed latches remaining in their previous states. In the
memory mode, all latches remain in their previous states and are unaffected by the data or address inputs. To
eliminate the possibility of entering erroneous data in the latches, G should be held high (inactive) while the
address lines are changing. In the 1-of-8 decoding or demultiplexing mode, the addressed output follows the
level of the D input with all other outputs low. In the clear mode, all outputs are low and unaffected by the address
and data inputs.
The SN54ALS259 is characterized for operation over the full military temperature range of 55
C to 125
C. The
SN74ALS259 is characterized for operation from 0
C to 70
C.
Function Tables
FUNCTION
INPUTS
OUTPUT OF
ADDRESSED
EACH
OTHER
FUNCTION
CLR
G
ADDRESSED
LATCH
OTHER
OUTPUT
FUNCTION
H
L
D
QiO
Addressable latch
H
H
QiO
QiO
Memory
L
L
D
L
8-line demultiplexer
L
H
L
L
Clear
D = the level at the data input.
QiO = the level of Qi (i = Q, 1, . . . 7 as appropriate) before the indicated
steady-state input conditions were established.
SN54ALS259 . . . J PACKAGE
SN74ALS259 . . . D OR N PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
G
D
NC
Q7
Q6
S2
Q0
NC
Q1
Q2
SN54ALS259 . . . FK PACKAGE
(TOP VIEW)
S1
S0
NC
Q4
Q5
CLR
Q3
GND
NC
NC No internal connection
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
S0
S1
S2
Q0
Q1
Q2
Q3
GND
V
CC
CLR
G
D
Q7
Q6
Q5
Q4
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN54ALS259, SN74ALS259
8-BIT ADDRESSABLE LATCHES
SDAS217A DECEMBER 1982 REVISED DECEMBER 1994
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Function Tables (Continued)
LATCH SELECTION
SELECT INPUTS
LATCH
S2
S1
S0
ADDRESSED
L
L
L
0
L
L
H
1
L
H
L
2
L
H
H
3
H
L
L
4
H
L
H
5
H
H
L
6
H
H
H
7
logic symbol
8M
0
7
0
1
S0
2
S1
2
3
S2
G8
14
Z10
15
Z9
13
D
9, 0D
Q0
4
G
CLR
10, 0R
9, 1D
Q1
5
10, 1R
9, 2D
Q2
6
10, 2R
9, 3D
Q3
7
10, 3R
9, 4D
Q4
9
10, 4R
9, 5D
Q5
10
10, 5R
9, 6D
Q6
11
10, 6R
9, 7D
Q7
12
10, 7R
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
SN54ALS259, SN74ALS259
8-BIT ADDRESSABLE LATCHES
SDAS217A DECEMBER 1982 REVISED DECEMBER 1994
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic diagram (positive logic)
14
13
1
2
3
15
12
11
10
9
7
6
5
4
G
D
S0
S1
S2
CLR
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
Pin numbers shown are for the D, J, and N packages.
SN54ALS259, SN74ALS259
8-BIT ADDRESSABLE LATCHES
SDAS217A DECEMBER 1982 REVISED DECEMBER 1994
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: SN54ALS259
55
C to 125
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ALS259
0
C to 70
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS259
SN74ALS259
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
UNIT
VCC
Supply voltage
4.5
5
5.5
4.5
5
5.5
V
VIH
High-level input voltage
2
2
V
VIL
Low-level input voltage
0.7
0.8
V
IOH
High-level output current
0.4
0.4
mA
IOL
Low-level output current
4
8
mA
t
Pulse duration
G low
20
15
ns
tw
Pulse duration
CLR low
10
10
ns
t
Setup time
Data before G
20
15
ns
tsu
Setup time
Address before G
20
15
ns
th
Hold time
Data after G
0
0
ns
th
Hold time
Address after G
0
0
ns
TA
Operating free-air temperature
55
125
0
70
C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54ALS259
SN74ALS259
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
VIK
VCC = 4.5 V,
II = 18 mA
1.5
1.5
V
VOH
VCC = 4.5 V to 5.5 V,
IOH = 0.4 mA
VCC 2
VCC 2
V
VOL
VCC = 4 5 V
IOL = 4 mA
0.25
0.4
0.25
0.4
V
VOL
VCC = 4.5 V
IOL = 8 mA
0.35
0.5
V
II
VCC = 5.5 V,
VI = 7 V
0.1
0.1
mA
IIH
VCC = 5.5 V,
VI = 2.7 V
20
20
A
IIL
VCC = 5.5 V,
VI = 0.4 V
0.1
0.1
mA
IO
VCC = 5.5 V,
VO = 2.25 V
20
112
30
112
mA
ICC
VCC = 5.5 V
14
22
14
22
mA
All typical values are at VCC = 5 V, TA = 25
C.
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
SN54ALS259, SN74ALS259
8-BIT ADDRESSABLE LATCHES
SDAS217A DECEMBER 1982 REVISED DECEMBER 1994
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500
,
TA = MIN to MAX
UNIT
(INPUT)
(OUTPUT)
SN54ALS259
SN74ALS259
MIN
MAX
MIN
MAX
tPHL
CLR
Any Q
2
15
2
12
ns
tPLH
Data
Any Q
4
22
4
19
ns
tPHL
Data
Any Q
2
15
2
12
ns
tPLH
Address
Any Q
4
26
4
22
ns
tPHL
Address
Any Q
2
15
2
12
ns
tPLH
Execute
Any Q
4
22
4
20
ns
tPHL
Execute
Any Q
2
16
2
13
ns
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
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