SN54BCT373, SN74BCT373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS016D SEPTEMBER 1988 REVISED MARCH 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Operating Voltage Range of 4.5 V to 5.5 V
D
State-of-the-Art BiCMOS Design
Significantly Reduces I
CCZ
D
Full Parallel Access for Loading
D
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
D
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
SN54BCT373 . . . FK PACKAGE
(TOP VIEW)
SN54BCT373 . . . J OR W PACKAGE
SN74BCT373 . . . DB, DW, N, OR NS PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
8D
7D
7Q
6Q
6D
2D
2Q
3Q
3D
4D
1D
1Q
OE
5Q
5D
8Q
4Q
GND
LE
V
CC
description/ordering information
These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively
low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight latches of the 'BCT373 devices are transparent D-type latches. While the latch-enable (LE) input is
high, the Q outputs follow the data (D) inputs. When the latch enable is taken low, the Q outputs are latched
at the logic levels that were set up at the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus
lines without interface or pullup components.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP N
Tube
SN74BCT373N
SN74BCT373N
SOIC
DW
Tube
SN74BCT373DW
BCT373
0
C to 70
C
SOIC DW
Tape and reel
SN74BCT373DWR
BCT373
SOP NS
Tape and reel
SN74BCT373NSR
BCT373
SSOP DB
Tape and reel
SN74BCT373DBR
BT373
CDIP J
Tube
SNJ54BCT373J
SNJ54BCT373J
55
C to 125
C
CFP W
Tube
SNJ54BCT373W
SNJ54BCT373W
LCCC FK
Tube
SNJ54BCT373FK
SNJ54BCT373FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright
2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54BCT373, SN74BCT373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS016D SEPTEMBER 1988 REVISED MARCH 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
OE
LE
D
Q
L
H
H
H
L
H
L
L
L
L
X
Q0
H
X
X
Z
logic diagram (positive logic)
OE
LE
1D
1
11
3
2
To Seven Other Channels
C1
1D
1Q
SN54BCT373, SN74BCT373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS016D SEPTEMBER 1988 REVISED MARCH 2003
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1)
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the disabled or power-off state, V
O
0.5 V to 5.5 V
. . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state, V
O
0.5 V to V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
30 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current into any output in the low state: SN54BCT373
96 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74BCT373 128
mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 2): DB package
70
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package
58
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package
69
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package
60
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54BCT373
SN74BCT373
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
UNIT
VCC
Supply voltage
4.5
5
5.5
4.5
5
5.5
V
VIH
High-level input voltage
2
2
V
VIL
Low-level input voltage
0.8
0.8
V
IIK
Input clamp current
18
18
mA
IOH
High-level output current
12
15
mA
IOL
Low-level output current
48
64
mA
TA
Operating free-air temperature
55
125
0
70
C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
SN54BCT373, SN74BCT373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS016D SEPTEMBER 1988 REVISED MARCH 2003
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54BCT373
SN74BCT373
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
VIK
VCC = 4.5 V,
II = 18 mA
1.2
1.2
V
IOH = 3 mA
2.4
3.3
2.4
3.3
VOH
VCC = 4.5 V
IOH = 12 mA
2
3.2
V
IOH = 15 mA
2
3.1
VOL
VCC = 4 5 V
IOL = 48 mA
0.38
0.55
V
VOL
VCC = 4.5 V
IOL = 64 mA
0.42
0.55
V
II
VCC = 5.5 V,
VI = 5.5 V
0.4
0.4
mA
IIH
VCC = 5.5 V,
VI = 2.7 V
20
20
A
IIL
VCC = 5.5 V,
VI = 0.5 V
0.6
0.6
mA
IOS
VCC = 5.5 V,
VO = 0
100
225
100
225
mA
IOZH
VCC = 5.5 V,
VO = 2.7 V
50
50
A
IOZL
VCC = 5.5 V,
VO = 0.5 V
50
50
A
ICCL
VCC = 5.5 V
37
60
37
60
mA
ICCH
VCC = 5.5 V
2
5
2
5
mA
ICCZ
VCC = 5.5 V
5
8
5
8
mA
Ci
VCC = 5 V,
VI = 2.5 V or 0.5 V
6
6
pF
Co
VCC = 5 V,
VO = 2.5 V or 0.5 V
11
11
pF
All typical values are at VCC = 5 V, TA = 25
C.
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
VCC = 5 V,
TA = 25
C
SN54BCT373
SN74BCT373
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
tw
Pulse duration, LE high
7.5
7.5
7.5
ns
tsu
Setup time, data before LE
2
2
2
ns
th
Hold time, data after LE
5.5
5.5
5.5
ns
SN54BCT373, SN74BCT373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS016D SEPTEMBER 1988 REVISED MARCH 2003
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 5 V,
CL = 50 pF,
R1 = 500
,
R2 = 500
,
TA = 25
C
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500
,
R2 = 500
,
TA = MIN to MAX
UNIT
'BCT373
SN54BCT373
SN74BCT373
MIN
TYP
MAX
MIN
MAX
MIN
MAX
tPLH
D
Q
2
5.9
7.7
1.5
10.1
2
9.3
ns
tPHL
D
Q
2
6.7
8.5
1
10.3
1.5
9.5
ns
tPLH
LE
Q
2
6.2
8.2
2
10.1
2
9.3
ns
tPHL
LE
Q
2
5.9
7.8
2
9.2
2
8.8
ns
tPZH
OE
Q
1
7.8
9.6
1
12.3
1
11.8
ns
tPZL
OE
Q
1
8.2
10.2
1
12.5
1
12
ns
tPHZ
OE
Q
1
4.9
6.6
1
7.4
1
7
ns
tPLZ
OE
Q
1
5
6.7
1
8.1
1
7.4
ns
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
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