CY54FCT245T, CY74FCT245T
8-BIT TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCCS018B MAY 1994 REVISED NOVEMBER 2001
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Function, Pinout, and Drive Compatible
With FCT and F Logic
D
Reduced V
OH
(Typically = 3.3 V) Versions
of Equivalent FCT Functions
D
Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
D
I
off
Supports Partial-Power-Down Mode
Operation
D
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
D
Matched Rise and Fall Times
D
Fully Compatible With TTL Input and
Output Logic Levels
D
CY54FCT245T
48-mA Output Sink Current
12-mA Output Source Current
D
CY74FCT245T
64-mA Output Sink Current
32-mA Output Source Current
D
3-State Outputs
description
The 'FCT245T devices contain eight noninverting
bidirectional buffers with 3-state outputs and are
intended for bus-oriented applications.
The transmit/receive (T/R) input determines the direction of data flow through these bidirectional transceivers.
Transmit (active high) enables data from A ports to B ports. The output enable (OE), when high, disables both
the A and B ports by putting them in the high-impedance state.
These devices are fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.
Copyright
2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
CY54FCT245T . . . L PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
A
2
A
3
A
4
A
5
A
6
A
T/R
7
GND
V
CC
B
0
B
1
B
2
B
3
B
4
A
1
A
0
OE
7
B
6
B
5
B
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
T/R
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
GND
V
CC
OE
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
CY54FCT245T . . . D PACKAGE
CY74FCT245T . . . P, Q, OR SO PACKAGE
(TOP VIEW)
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
CY54FCT245T, CY74FCT245T
8-BIT TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCCS018B MAY 1994 REVISED NOVEMBER 2001
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
ORDERING INFORMATION
TA
PACKAGE
SPEED
(ns)
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QSOP Q
Tape and reel
3.8
CY74FCT245DTQCT
FCT245D
QSOP Q
Tape and reel
4.1
CY74FCT245CTQCT
FCT245C
SOIC
SO
Tube
4.1
CY74FCT245CTSOC
FCT245C
SOIC SO
Tape and reel
4.1
CY74FCT245CTSOCT
FCT245C
DIP P
Tube
4.6
CY74FCT245ATPC
CY74FCT245ATPC
40
C to 85
C
QSOP Q
Tape and reel
4.6
CY74FCT245ATQCT
FCT245A
SOIC
SO
Tube
4.6
CY74FCT245ATSOC
FCT245A
SOIC SO
Tape and reel
4.6
CY74FCT245ATSOCT
FCT245A
QSOP Q
Tape and reel
7
CY74FCT245TQCT
FCT245
SOIC
SO
Tube
7
CY74FCT245TSOC
FCT245
SOIC SO
Tape and reel
7
CY74FCT245TSOCT
FCT245
CDIP D
Tube
4.5
CY54FCT245CTDMB
LCC L
Tube
4.5
CY54FCT245CTLMB
55
C to 125
C
CDIP D
Tube
4.9
CY54FCT245ATDMB
55
C to 125
C
LCC L
Tube
4.9
CY54FCT245ATLMB
CDIP D
Tube
7.5
CY54FCT245TDMB
LCC L
Tube
7.5
CY54FCT245TLMB
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available
at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
OPERATION
OE
T/R
OPERATION
L
L
B data to bus A
L
H
A data to bus B
H
X
Z
H = High logic level, L = Low logic level,
X = Don't care, Z = High-impedance
state
logic diagram (positive logic)
T/R
OE
A0
B0
To Seven Other Channels
1
2
19
18
CY54FCT245T, CY74FCT245T
8-BIT TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCCS018B MAY 1994 REVISED NOVEMBER 2001
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range to ground potential
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC input voltage range
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC output voltage range
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC output current (maximum sink current/pin)
120 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 1): P package
69
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Q package
68
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SO package
58
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ambient temperature range with power applied, T
A
65
C to 135
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 2)
CY54FCT245T
CY74FCT245T
CY74FCT245AT
CY74FCT245CT
CY74FCT245DT
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
VCC
Supply voltage
4.5
5
5.5
4.75
5
5.25
V
VIH
High-level input voltage
2
2
V
VIL
Low-level input voltage
0.8
0.8
V
IOH
High-level output current
12
32
mA
IOL
Low-level output current
48
64
mA
TA
Operating free-air temperature
55
125
40
85
C
NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation.
CY54FCT245T, CY74FCT245T
8-BIT TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCCS018B MAY 1994 REVISED NOVEMBER 2001
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
CY54FCT245T
CY74FCT245T
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
VIK
VCC = 4.5 V,
IIN = 18 mA
0.7
1.2
V
VIK
VCC = 4.75 V,
IIN = 18 mA
0.7
1.2
V
VCC = 4.5 V,
IOH = 12 mA
2.4
3.3
VOH
VCC 4 75 V
IOH = 32 mA
2
V
VCC = 4.75 V
IOH = 15 mA
2.4
3.3
VOL
VCC = 4.5 V,
IOL = 48 mA
0.3
0.55
V
VOL
VCC = 4.75 V,
IOL = 64 mA
0.3
0.55
V
Vhys
All inputs
0.2
0.2
V
II
VCC = 5.5 V,
VIN = VCC
5
A
II
VCC = 5.25 V,
VIN = VCC
5
A
IIH
VCC = 5.5 V,
VIN = 2.7 V
1
A
IIH
VCC = 5.25 V,
VIN = 2.7 V
1
A
IIL
VCC = 5.5 V,
VIN = 0.5 V
1
A
IIL
VCC = 5.25 V,
VIN = 0.5 V
1
A
IOZH
VCC = 5.5 V,
VOUT = 2.7 V
10
A
IOZH
VCC = 5.25 V,
VOUT = 2.7 V
10
A
IOZL
VCC = 5.5 V,
VOUT = 0.5 V
10
A
IOZL
VCC = 5.25 V,
VOUT = 0.5 V
10
A
IOS
VCC = 5.5 V,
VOUT = 0 V
60
120
225
mA
IOS
VCC = 5.25 V,
VOUT = 0 V
60
120
225
mA
Ioff
VCC = 0 V,
VOUT = 4.5 V
1
1
A
ICC
VCC = 5.5 V,
VIN
0.2 V,
VIN
VCC 0.2 V
0.1
0.2
mA
ICC
VCC = 5.25 V,
VIN
0.2 V,
VIN
VCC 0.2 V
0.1
0.2
mA
ICC
VCC = 5.5 V, VIN = 3.4 V, f1 = 0, Outputs open
0.5
2
mA
ICC
VCC = 5.25 V, VIN = 3.4 V, f1 = 0, Outputs open
0.5
2
mA
ICCD
VCC = 5.5 V, One input switching at 50% duty cycle,
Outputs open, T/R or OE = GND and
VIN
0.2 V or VIN
VCC 0.2 V
0.06
0.12
mA/
ICCD
VCC = 5.25 V, One input switching at 50% duty cycle,
Outputs open, T/R or OE = GND and
VIN
0.2 V or VIN
VCC 0.2 V
0.06
0.12
MHz
Typical values are at VCC = 5 V, TA = 25
C.
Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or
sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise, prolonged
shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In any sequence
of parameter tests, IOS tests should be performed last.
Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND
This parameter is derived for use in total power-supply calculations.
CY54FCT245T, CY74FCT245T
8-BIT TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCCS018B MAY 1994 REVISED NOVEMBER 2001
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (continued)
PARAMETER
TEST CONDITIONS
CY54FCT245T
CY74FCT245T
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
#
One bit
switching
at f1 = 10 MHz
VIN
0.2 V or
VIN
VCC 0.2 V
0.7
1.4
#
VCC = 5.5 V,
Outputs open
1
at 50% duty
cycle
VIN = 3.4 V or GND
1.2
3.4
#
Outputs open,
T/R or OE = GND
Eight bits
switching
at f1 = 2.5 MHz
VIN
0.2V or
VIN
VCC
0.2 V
1.3
2.6||
IC#
1
at 50% duty
cycle
VIN = 3.4 V or GND
3.3
10.6||
mA
IC#
One bit
switching
at f1 = 10 MHz
VIN
0.2 V or
VIN
VCC 0.2 V
0.7
1.4
mA
VCC = 5.25 V,
Outputs open
1
at 50% duty
cycle
VIN = 3.4 V or GND
1.2
3.4
Outputs open,
T/R or OE = GND
Eight bits
switching
at f1 = 2.5 MHz
VIN
0.2V or
VIN
VCC
0.2 V
1.3
2.6||
1
at 50% duty
cycle
VIN = 3.4 V or GND
3.3
10.6||
Ci
5
10
5
10
pF
Co
9
12
9
12
pF
Typical values are at VCC = 5 V, TA = 25
C.
# IC
= ICC +
ICC
DH
NT + ICCD (f0/2 + f1
N1)
Where:
IC
= Total supply current
ICC
= Power-supply current with CMOS input levels
ICC = Power-supply current for a TTL high input (VIN = 3.4 V)
DH
= Duty cycle for TTL inputs high
NT
= Number of TTL inputs at DH
ICCD = Dynamic current caused by an input transition pair (HLH or LHL)
f0
= Clock frequency for registered devices, otherwise zero
f1
= Input signal frequency
N1
= Number of inputs changing at f1
All currents are in milliamperes and all frequencies are in megahertz.
|| Values for these conditions are examples of the ICC formula.
PDF 
ZIP