74ACT11544
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS133 D3609, JULY 1990 REVISED APRIL 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Copyright
1993, Texas Instruments Incorporated
21
Inputs Are TTL-Voltage Compatible
3-State Inverted Outputs
Back-to-Back Registers for Storage
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin V
CC
and GND Configurations
Minimize High-Speed Switching Noise
EPIC
t
(Enhanced-Performance Implanted
CMOS) 1-
m
m Process
500-mA Typical Latch-Up Immunity
at 125
C
description
This 8-bit registered transceiver contains two sets
of D-type latches for temporary storage of data
flowing in either direction. Separate latch enable
(LEAB or LEBA) and output enable (GAB or GBA)
inputs are provided for each register to permit
independent control in either direction of data flow.
The 74ACT11544 inverts data in both directions.
The A-to-B enable (CEAB) input must be low in order to enter data from A or to output data to B. Having CEAB
low and LEAB low makes the A-to-B latches transparent; a subsequent low-to-high transition of LEAB puts the
A latches in the storage mode. With CEAB and GAB both low, the 3-state B outputs are active and reflect the
data present at the output of the A latches. Data flow from B-to-A is similar, but requires the use of CEBA, LEBA,
and GBA inputs.
The 74ACT11544 is characterized for operation from 40
C to 85
C.
FUNCTION TABLE
INPUTS
LATCH
STATUS
OUTPUT BUFFERS
CEAB
LEAB
GAB
STATUS
A TO B
B1 THRU B8
H
X
X
Storing
Z
X
H
Storing
X
H
Z
L
L
L
Transparent
Current A Data
L
H
L
Storing
Previous
}
A Data
A-to-B data flow is shown: B-to-A flow control is the same except uses
CEBA, LEBA, and GBA.
Data present before low-to-high transition of LEAB.
DW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
CEBA
A1
A2
A3
A4
GND
GND
GND
GND
A5
A6
A7
A8
CEAB
GBA
LEBA
B1
B2
B3
B4
V
CC
V
CC
B5
B6
B7
B8
LEAB
GAB
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
74ACT11544
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS133 D3609, JULY 1990 REVISED APRIL 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
22
logic symbol
logic diagram (positive logic)
A1
LEAB
CEAB
GAB
LEBA
CEBA
GBA
2
16
14
15
27
1
28
B1
26
C1
1D
1D
C1
A8
A7
A6
A5
A4
A3
A2
A1
LEAB
CEAB
GAB
LEAB
CEBA
GBA
13
12
11
10
5
4
3
2
16
14
15
27
1
28
6D
3
2C6
G2
2 EN4
1C5
G1
1 EN3
4
5D
B8
B7
B6
B5
B4
B3
B2
B1
17
18
19
20
23
24
25
26
To Seven Other Transceivers
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1)
0.5 V to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, V
O
(see Note 1)
0.5 V to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
)
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(V
O
= 0 to V
CC
)
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND
200 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
recommended operating conditions
MIN
NOM
MAX
UNIT
VCC
Supply voltage
4.5
5
5.5
V
VIH
High-level input voltage
2
V
VIL
Low-level input voltage
0.8
V
VI
Input voltage
0
VCC
V
VO
Output voltage
0
VCC
V
IOH
High-level output current
24
mA
IOL
Low-level output current
24
mA
D
t /
D
v
Input transition rise or fall rate
0
10
ns/ V
TA
Operating free-air temperature
40
85
C
74ACT11544
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS133 D3609, JULY 1990 REVISED APRIL 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
23
electrical characteristics over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS
VCC
TA = 25
C
MIN
MAX
UNIT
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
MIN
MAX
UNIT
IOH = 50
m
A
4.5 V
4.4
4.4
IOH = 50
m
A
5.5 V
5.4
5.4
VOH
IOH = 24 mA
4.5 V
3.94
3.8
V
OH
IOH = 24 mA
5.5 V
4.94
4.8
IOH = 75 mA
5.5 V
3.85
IOL = 50
m
A
4.5 V
0.1
0.1
IOL = 50
m
A
5.5 V
0.1
0.1
VOL
IOL = 24 mA
4.5 V
0.36
0.44
V
OL
IOL = 24 mA
5.5 V
0.36
0.44
IOL = 75 mA
5.5 V
1.65
II
Control inputs
VI = VCC or GND
5.5 V
0.1
1
m
A
IOZ
A or B ports
VO = VCC or GND
5.5 V
0.5
5
m
A
ICC
VI = VCC or GND, IO = 0
5.5 V
8
80
m
A
D
I
One input at 3.4 V,
5 5 V
0 9
1
mA
D
ICC
,
Other inputs at GND or VCC
5.5 V
0.9
1
mA
Ci
Control inputs
VI = VCC or GND
5 V
4.5
pF
Co
A or B ports
VO = VCC or GND
5 V
12
pF
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
For I/O ports, the parameter IOZ includes the input leakage current.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
TA = 25
C
MIN
MAX
UNIT
MIN
MAX
MIN
MAX
UNIT
tw
Pulse duration, LEAB or LEBA low
4
4
ns
t
Setup time
Data before LEAB or LEBA
2.5
2.5
ns
tsu
Setup time
Data before CEAB or CEBA
3
3
ns
th
Hold time
Data after LEAB or LEBA
2
2
ns
th
Hold time
Data after CEAB or CEBA
1.5
1.5
ns
74ACT11544
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS133 D3609, JULY 1990 REVISED APRIL 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
24
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
TA = 25
C
MIN
MAX
UNIT
PARAMETER
(INPUT)
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
UNIT
tPLH
A or B
B or A
2.4
5.7
8.2
2.4
8.9
ns
tPHL
A or B
B or A
4.1
7.3
9.3
4.1
10.3
ns
tPLH
LEBA or LEAB
A or B
2.6
6
8.7
2.6
9.5
ns
tPHL
LEBA or LEAB
A or B
3.4
7.1
10.1
3.4
11
ns
tPZH
CEBA or CEAB
A or B
3.3
6.7
9.5
3.3
10.4
ns
tPZL
CEBA or CEAB
A or B
3.6
8.2
11.2
3.6
13
ns
tPHZ
CEBA or CEAB
A or B
4.8
7.6
9.7
4.8
10.4
ns
tPLZ
CEBA or CEAB
A or B
4.7
7.6
9.5
4.7
10.2
ns
tPZH
GBA or GAB
A or B
3
6.4
9
3
9.9
ns
tPZL
GBA or GAB
A or B
3.5
7.8
10.8
3.5
12.5
ns
tPHZ
GBA or GAB
A or B
4.6
7.3
9.3
4.6
9.9
ns
tPLZ
GBA or GAB
A or B
4.6
7.2
9.2
4.6
9.7
ns
operating characteristics, V
CC
= 5 V, T
A
= 25
C
PARAMETER
TEST CONDITIONS
TYP
UNIT
C d
Power dissipation capacitance per transceiver
Outputs enabled
CL = 50 pF
f = 1 MHz
47
pF
Cpd Power dissipation capacitance per transceiver
Outputs disabled
CL = 50 pF, f = 1 MHz
14
pF
74ACT11544
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS133 D3609, JULY 1990 REVISED APRIL 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
25
PARAMETER MEASUREMENT INFORMATION
50% VCC
1.5 V
1.5 V
1.5 V
3 V
3 V
0 V
0 V
th
tsu
VOLTAGE WAVEFORMS
Data Input
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
1.5 V
1.5 V
3 V
0 V
50% VCC
50% VCC
Input
(see Note B)
Out-of-Phase
Output
In-Phase
Output
Timing Input
(see Note B)
50% VCC
VOLTAGE WAVEFORMS
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
2
VCC
500
500
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2
VCC
(see Note C)
Output
Waveform 2
S1 at GND
(see Note C)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
1.5 V
1.5 V
[
VCC
0 V
50% VCC
20% VCC
50% VCC
80% VCC
[
0 V
3 V
GND
Open
VOLTAGE WAVEFORMS
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2
VCC
GND
TEST
S1
3 V
0 V
1.5 V
1.5 V
tw
VOLTAGE WAVEFORMS
Input
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR
10 MHz, ZO = 50
, tr = 3 ns, tf = 3 ns.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
74ACT11544
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS133 D3609, JULY 1990 REVISED APRIL 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
26
IMPORTANT NOTICE
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accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent
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Copyright
1998, Texas Instruments Incorporated
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