www.ti.com
FEATURES
DCT OR DCU PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
1OE
1A
2Y
GND
V
CC
2OE
1Y
2A
4
3
2
1
5
6
7
8
GND
2Y
1A
1OE
2A
1Y
2OE
V
CC
YEP OR YZP PACKAGE
(BOTTOM VIEW)
DESCRIPTION/ORDERING INFORMATION
SN74AUC2G241
DUAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES535A DECEMBER 2003 REVISED MARCH 2005
Available in the Texas Instruments
NanoStarTM and NanoFreeTM Packages
Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal
Operation
I
off
Supports Partial-Power-Down Mode
Operation
Sub-1-V Operable
Max t
pd
of 1.9 ns at 1.8 V
Low Power Consumption, 10
A at 1.8 V
8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
This dual buffer/driver is operational at 0.8-V to 2.7-V V
CC
, but is designed specifically for 1.65-V to 1.95-V V
CC
operation.
The SN74AUC2G241 is designed specifically to improve the performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device is organized as two 1-bit line drivers with separate output-enable (1OE, 2OE) inputs. When 1OE is
low or 2OE is high, the device passes data from the A inputs to the Y outputs. When 1OE is high or 2OE is low,
the outputs are in the high-impedance state.
NanoStarTM and NanoFreeTM package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
(2)
NanoStarTM WCSP (DSBGA)
Tape and reel
SN74AUC2G241YEPR
0.23-mm Large Bump YEP
_ _ _U2_
NanoFreeTM WCSP (DSBGA)
Tape and reel
SN74AUC2G241YZPR
40C to 85C
0.23-mm Large Bump YZP (Pb-free)
SSOP DCT
Tape and reel
SN74AUC2G241DCTR
U41_ _ _
VSSOP DCU
Tape and reel
SN74AUC2G241DCUR
U2_
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2)
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
= Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 20032005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
1
2
7
5
3
6
1A
1Y
2A
2Y
1OE
2OE
SN74AUC2G241
DUAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES535A DECEMBER 2003 REVISED MARCH 2005
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor, and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is
determined by the current-sinking/current-sourcing capability of the driver.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, please refer to the TI application report, Applications of
Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027.
FUNCTION TABLES
INPUTS
OUTPUT
1Y
1OE
1A
L
H
H
L
L
L
H
X
Z
INPUTS
OUTPUT
2Y
2OE
2A
H
H
H
H
L
L
L
X
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
2
www.ti.com
Absolute Maximum Ratings
(1)
SN74AUC2G241
DUAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES535A DECEMBER 2003 REVISED MARCH 2005
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
V
CC
Supply voltage range
0.5
3.6
V
V
I
Input voltage range
(2)
0.5
3.6
V
V
O
Voltage range applied to any output in the high-impedance or power-off state
(2)
0.5
3.6
V
V
O
Output voltage range
(2)
0.5
V
CC
+ 0.5
V
I
IK
Input clamp current
V
I
< 0
50
mA
I
OK
Output clamp current
V
O
< 0
50
mA
I
O
Continuous output current
20
mA
Continuous current through V
CC
or GND
100
mA
DCT package
220
JA
Package thermal impedance
(3)
DCU package
227
C/W
YEP/YZP package
102
T
stg
Storage temperature range
65
150
C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3)
The package thermal impedance is calculated in accordance with JESD 51-7.
3
www.ti.com
Recommended Operating Conditions
(1)
SN74AUC2G241
DUAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES535A DECEMBER 2003 REVISED MARCH 2005
MIN
MAX
UNIT
V
CC
Supply voltage
0.8
2.7
V
V
CC
= 0.8 V
V
CC
V
IH
High-level input voltage
V
CC
= 1.1 V to 1.95 V
0.65 V
CC
V
V
CC
= 2.3 V to 2.7 V
1.7
V
CC
= 0.8 V
0
V
IL
Low-level input voltage
V
CC
= 1.1 V to 1.95 V
0.35 V
CC
V
V
CC
= 2.3 V to 2.7 V
0.7
V
I
Input voltage
0
3.6
V
Active state
0
V
CC
V
O
Output voltage
V
3-state
0
3.6
V
CC
= 0.8 V
0.7
V
CC
= 1.1 V
3
I
OH
High-level output current
V
CC
= 1.4 V
5
mA
V
CC
= 1.65 V
8
V
CC
= 2.3 V
9
V
CC
= 0.8 V
0.7
V
CC
= 1.1 V
3
I
OL
Low-level output current
V
CC
= 1.4 V
5
mA
V
CC
= 1.65 V
8
V
CC
= 2.3 V
9
V
CC
= 0.8 V to 1.65 V
(2)
20
t/
v
Input transition rise or fall rate
V
CC
= 1.65 V to 1.95 V
(3)
20
ns/V
V
CC
= 2.3 V to 2.7 V
(3)
20
T
A
Operating free-air temperature
40
85
C
(1)
All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
(2)
The data was taken at C
L
= 15 pF, R
L
= 2 k
(see Figure 1).
(3)
The data was taken at C
L
= 30 pF, R
L
= 500
(see Figure 1).
4
www.ti.com
Electrical Characteristics
Switching Characteristics
Switching Characteristics
SN74AUC2G241
DUAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES535A DECEMBER 2003 REVISED MARCH 2005
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
V
CC
MIN
TYP
(1)
MAX
UNIT
I
OH
= 100
A
0.8 V to 2.7 V
V
CC
0.1
I
OH
= 0.7 mA
0.8 V
0.55
I
OH
= 3 mA
1.1 V
0.8
V
OH
V
I
OH
= 5 mA
1.4 V
1
I
OH
= 8 mA
1.65 V
1.2
I
OH
= 9 mA
2.3 V
1.8
I
OL
= 100
A
0.8 V to 2.7 V
0.2
I
OL
= 0.7 mA
0.8 V
0.25
I
OL
= 3 mA
1.1 V
0.3
V
OL
V
I
OL
= 5 mA
1.4 V
0.4
I
OL
= 8 mA
1.65 V
0.45
I
OL
= 9 mA
2.3 V
0.6
I
I
All inputs
V
I
= V
CC
or GND
0 to 2.7 V
5
A
I
off
V
I
or V
O
= 2.7 V
0
10
A
I
OZ
V
O
= V
CC
or GND
2.7 V
10
A
I
CC
V
I
= V
CC
or GND,
I
O
= 0
0.8 V to 2.7 V
10
A
C
i
V
I
= V
CC
or GND
2.5 V
2.5
pF
C
o
V
O
= V
CC
or GND
2.5 V
5.5
pF
(1)
All typical values are at T
A
= 25C.
over recommended operating free-air temperature range, C
L
= 15 pF (unless otherwise noted) (see Figure 1)
V
CC
= 1.2 V
V
CC
= 1.5 V
V
CC
= 1.8 V
V
CC
= 2.5 V
V
CC
= 0.8 V
FROM
TO
0.1 V
0.1 V
0.15 V
0.2 V
PARAMETER
UNIT
(INPUT)
(OUTPUT)
TYP
MIN
MAX
MIN
MAX
MIN
TYP
MAX
MIN
MAX
t
pd
A
Y
5.1
1
3.5
0.8
2.3
0.7
1.2
1.9
0.6
1.4
ns
t
en
OE or OE
Y
5.9
1.2
4.2
1
2.7
0.9
1.3
2
0.8
1.6
ns
t
dis
OE or OE
Y
6.2
2.2
4.8
2.5
4.4
1
2.9
4.2
1.6
3.3
ns
over recommended operating free-air temperature range, C
L
= 30 pF (unless otherwise noted) (see Figure 1)
V
CC
= 1.8 V
V
CC
= 2.5 V
FROM
TO
0.15 V
0.2 V
PARAMETER
UNIT
(INPUT)
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
t
pd
A
Y
0.9
1.6
2.5
0.8
1.8
ns
t
en
OE or OE
Y
1.1
1.7
2.8
1
2
ns
t
dis
OE or OE
Y
1.9
2.3
3.6
0.9
2.1
ns
5
www.ti.com
Operating Characteristics
SN74AUC2G241
DUAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES535A DECEMBER 2003 REVISED MARCH 2005
T
A
= 25C
V
CC
= 0.8 V
V
CC
= 1.2 V
V
CC
= 1.5 V
V
CC
= 1.8 V
V
CC
= 2.5 V
TEST
PARAMETER
UNIT
CONDITIONS
TYP
TYP
TYP
TYP
TYP
Power dissipation
C
pd
f = 10 MHz
16
16
16
17
18
pF
capacitance
6
www.ti.com
PARAMETER MEASUREMENT INFORMATION
V
CC
/2
t
h
t
su
From Output
Under Test
C
L
(see Note A)
LOAD CIRCUIT
S1
2
V
CC
Open
GND
R
L
R
L
Data Input
Timing Input
V
CC
0 V
V
CC
0 V
0 V
t
w
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
t
PLH
t
PHL
t
PHL
t
PLH
V
OH
V
OH
V
OL
V
OL
V
CC
0 V
Input
Output
Waveform 1
S1 at 2
V
CC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
V
CC
0 V
V
OL
+ V
V
OH
- V
0 V
V
CC
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
Open
2
V
CC
GND
TEST
S1
NOTES: A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
10 MHz, Z
O
= 50
, slew rate
1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. t
PLZ
and t
PHZ
are the same as t
dis
.
F. t
PZL
and t
PZH
are the same as t
en
.
G. t
PLH
and t
PHL
are the same as t
pd
.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
V
CC
/2
V
CC
/2
0.8 V
1.2 V
0.1 V
1.5 V
0.1 V
1.8 V
0.15 V
2.5 V
0.2 V
1.8 V
0.15 V
2.5 V
0.2 V
2 k
2 k
2 k
2 k
2 k
1 k
500
V
CC
R
L
0.1 V
0.1 V
0.1 V
0.15 V
0.15 V
0.15 V
0.15 V
V
C
L
15 pF
15 pF
15 pF
15 pF
15 pF
30 pF
30 pF
SN74AUC2G241
DUAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES535A DECEMBER 2003 REVISED MARCH 2005
Figure 1. Load Circuit and Voltage Waveforms
7
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
MSL Peak Temp
(3)
74AUC2G241DCURE4
ACTIVE
US8
DCU
8
3000
Pb-Free
(RoHS)
CU NIPDAU
Level-1-260C-UNLIM
SN74AUC2G241DCTR
ACTIVE
SM8
DCT
8
3000
Pb-Free
(RoHS)
CU NIPDAU
Level-1-260C-UNLIM
SN74AUC2G241DCUR
ACTIVE
US8
DCU
8
3000
Pb-Free
(RoHS)
CU NIPDAU
Level-1-260C-UNLIM
SN74AUC2G241YEPR
ACTIVE
WCSP
YEP
8
3000
TBD
SNPB
Level-1-260C-UNLIM
SN74AUC2G241YZPR
ACTIVE
WCSP
YZP
8
3000
Pb-Free
(RoHS)
SNAGCU
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco
Plan
-
The
planned
eco-friendly
classification:
Pb-Free
(RoHS)
or
Green
(RoHS
&
no
Sb/Br)
-
please
check
http://www.ti.com/productcontent
for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com
6-Jun-2005
Addendum-Page 1
MECHANICAL DATA
MPDS049B MAY 1999 REVISED OCTOBER 2002
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
DCT (R-PDSO-G8)
PLASTIC SMALL-OUTLINE PACKAGE
0,60
0,20
0,25
0
8
0,15 NOM
Gage Plane
4188781/C 09/02
4,25
5
0,30
0,15
2,90
3,75
2,70
8
4
3,15
2,75
1
0,10
0,00
1,30 MAX
Seating Plane
0,10
M
0,13
0,65
PIN 1
INDEX AREA
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion
D. Falls within JEDEC MO-187 variation DA.
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for
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2005, Texas Instruments Incorporated
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