SN54CBT16244, SN74CBT16244
16-BIT FET BUS SWITCHES
SCDS031I MAY 1996 REVISED OCTOBER 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Members of Texas Instruments' Widebus
TM
Family
D
Standard '16244-Type Pinout
D
5-
Switch Connection Between Two Ports
D
TTL-Compatible Input Levels
description
The 'CBT16244 devices provide 16 bits of
high-speed TTL-compatible bus switching in a
standard '16244 device pinout. The low on-state
resistance of the switch allows connections to be
made with minimal propagation delay.
These devices are organized as four 4-bit
low-impedance switches with separate
output-enable (OE) inputs. When OE is low, the
switch is on, and data can flow from port A to port
B, or vice versa. When OE is high, the switch is
open, and the high-impedance state exists
between the two ports.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SSOP
DL
Tube
SN74CBT16244DL
CBT16244
40
C to 85
C
SSOP DL
Tape and reel
SN74CBT16244DLR
CBT16244
40
C to 85
C
TSSOP DGG
Tape and reel
SN74CBT16244DGGR
CBT16244
TVSOP DGV
Tape and reel
SN74CBT16244DGVR
CY244
55
C to 125
C
CFP WD
Tube
SNJ54CBT16244WD
SNJ54CBT16244WD
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each 4-bit bus switch)
INPUT
OE
OUTPUTS
A, B
L
A port = B port
H
Disconnect
Copyright
2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
1B1
1B2
GND
1B3
1B4
V
CC
2B1
2B2
GND
2B3
2B4
3B1
3B2
GND
3B3
3B4
V
CC
4B1
4B2
GND
4B3
4B4
4OE
2OE
1A1
1A2
GND
1A3
1A4
V
CC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
V
CC
4A1
4A2
GND
4A3
4A4
3OE
SN54CBT16244 . . . WD PACKAGE
SN74CBT16244 . . . DGG, DGV, OR DL PACKAGE
(TOP VIEW)
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
Widebus is a trademark of Texas Instruments.
SN54CBT16244, SN74CBT16244
16-BIT FET BUS SWITCHES
SCDS031I MAY 1996 REVISED OCTOBER 2000
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic diagram (positive logic)
3A1
3A4
1OE
1B1
1B4
47
43
1
2
6
2A4
2OE
2B1
2B4
41
37
48
8
12
2A1
3B1
3B4
36
32
25
13
17
1A1
1A4
3OE
4A4
4OE
30
26
24
19
23
4A1
4B1
4B4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1)
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous channel current
128 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I/O
< 0)
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 2): DGG package
70
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package
58
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DL package
63
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54CBT16244
SN74CBT16244
UNIT
MIN
MAX
MIN
MAX
UNIT
VCC
Supply voltage
4
5.5
4
5.5
V
VIH
High-level control input voltage
2
2
V
VIL
Low-level control input voltage
0.8
0.8
V
TA
Operating free-air temperature
55
125
40
85
C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
SN54CBT16244, SN74CBT16244
16-BIT FET BUS SWITCHES
SCDS031I MAY 1996 REVISED OCTOBER 2000
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54CBT16244
SN74CBT16244
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
VIK
VCC = 4.5 V,
II = 18 mA
1.2
1.2
V
II
VCC = 0
VI = 5.5 V
10
10
A
II
VCC = 5.5 V
VI = 5.5 V or GND
1
1
A
ICC
VCC = 5.5 V,
VI = VCC or GND
IO = 0,
3.2
3
A
ICC
Control
inputs
VCC = 5.5 V,
Other inputs at VCC or GND
One input at 3.4 V,
2.5
2.5
mA
Ci
Control
inputs
VI = 3 V or 0
2.5
2.5
pF
Cio(OFF)
VO = 3 V or 0,
OE = VCC
4.5
4.5
pF
VCC = 4 V,
VI = 2.4 V,
II = 15 mA
20
20
r
VI = 0,
II = 64 mA
5
10
5
7
ron
VCC = 4.5 V
VI = 0,
II = 30 mA
5
10
5
7
VI = 2.4 V,
II = 15 mA
8
14
8
12
All typical values are at VCC = 5 V, TA = 25
C.
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by
the lower of the voltages of the two (A or B) terminals.
switching characteristics over recommended operating free-air temperature range, C
L
= 50 pF
(unless otherwise noted) (see Figure 1)
SN54CBT16244
SN74CBT16244
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4 V
VCC = 5 V
0.5 V
VCC = 4 V
VCC = 5 V
0.5 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
tpd
A or B
B or A
0.8*
0.35
0.25
ns
ten
OE
A or B
10.3
1
9.2
5.5
1
5.1
ns
tdis
OE
A or B
9.7
1
8.2
5.2
1
5.4
ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
SN54CBT16244, SN74CBT16244
16-BIT FET BUS SWITCHES
SCDS031I MAY 1996 REVISED OCTOBER 2000
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOH
VOL
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
7 V
Open
GND
500
500
tPLH
tPHL
Output
Control
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
1.5 V
1.5 V
1.5 V
1.5 V
3 V
0 V
1.5 V
1.5 V
VOH
VOL
0 V
1.5 V
VOL + 0.3 V
1.5 V
VOH 0.3 V
0 V
Input
3 V
3.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Output
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
7 V
Open
TEST
S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
10 MHz, ZO = 50
, tr
2.5 ns, tf
2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
MSL Peak Temp
(3)
5962-9855301QXA
ACTIVE
CFP
WD
48
1
TBD
Call TI
Level-NC-NC-NC
74CBT16244DGGRE4
ACTIVE
TSSOP
DGG
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74CBT16244DGVRE4
ACTIVE
TVSOP
DGV
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74CBT16244DGGR
ACTIVE
TSSOP
DGG
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74CBT16244DGVR
ACTIVE
TVSOP
DGV
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74CBT16244DL
ACTIVE
SSOP
DL
48
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74CBT16244DLR
ACTIVE
SSOP
DL
48
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SNJ54CBT16244WD
ACTIVE
CFP
WD
48
1
TBD
Call TI
Level-NC-NC-NC
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco
Plan
-
The
planned
eco-friendly
classification:
Pb-Free
(RoHS)
or
Green
(RoHS
&
no
Sb/Br)
-
please
check
http://www.ti.com/productcontent
for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2005
Addendum-Page 1
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