16-Bit Transceivers
CY74FCT16245T
CY74FCT162245T
CY74FCT162H245T
SCCS026 - July 1994 - Revised March 2000
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
Copyright
2000, Texas Instruments Incorporated
1CY74FCT16445T/2
H245T
Features
FCT-E speed at 3.2 ns
Power-off disable outputs permits live insertion
Edge-rate control circuitry for significantly improved
noise characteristics
Typical output skew < 250 ps
ESD > 2000V
TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
Industrial temperature range of 40C to +85C
V
CC
= 5V
10%
CY74FCT16245T Features:
64 mA sink current, 32 mA source current
Typical V
OLP
(ground bounce)<1.0V at V
CC
= 5V,
T
A
= 25C
CY74FCT162245T Features:
Balanced output drivers: 24 mA
Reduced system switching noise
Typical V
OLP
(ground bounce) <0.6V at V
CC
= 5V,
T
A
= 25C
CY74FCT162H245T Features:
Bus hold on data inputs
Eliminates the need for external pull-up or pull-down
resistors
Functional Description
These 16-bit transceivers are designed for use in bidirectional
synchronous communication between two buses, where high
speed and low power are required. With the exception of the
CY74FCT16245T, these devices can be operated either as
two independent octals or a single 16-bit transceiver. Direction
of data flow is controlled by (DIR), the Output Enable (OE)
transfers data when LOW and isolates the buses when HIGH.
The output buffers are designed with power off disable capa-
bility to allow for live insertion of boards.
The
CY74FCT16245T
is
ideally
suited
for
driving
high-capacitance loads and low-impedance backplanes.
The CY74FCT162245T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for mini-
mal
undershoot
and
reduced
ground
bounce.
The
CY74FCT162245T is ideal for driving transmission lines.
The CY74FCT162H245T is a 24-mA balanced output part that
has bus hold on the data inputs. The device retains the input's
last state whenever the input goes to high impedance. This
eliminates the need for pull-up/down resistors and prevents
floating inputs.
GND
Logic Block Diagrams CY74FCT16245T,CY74FCT162245T,
CY74FCT162H245T
Pin Configuration
1
2
3
4
5
6
7
8
9
10
11
12
33
32
31
30
29
25
26
27
28
36
35
1
DIR
34
SSOP/TSSOP
Top View
13
14
15
16
17
18
19
20
21
22
23
24
45
44
43
42
41
37
38
39
40
48
47
46
1
B
1
1
B
2
1
B
3
1
B
4
1
A
1
1
A
2
1
A
3
1
A
4
1
OE
GND
GND
V
CC
1
B
7
1
B
8
1
B
5
1
B
6
1
A
5
1
A
6
1
A
7
1
A
8
V
CC
GND
GND
2
B
3
2
B
4
2
B
1
2
B
2
2
A
1
2
A
2
2
A
3
2
A
4
GND
GND
V
CC
2
B
7
2
B
8
2
B
5
2
B
6
2
A
5
2
A
6
2
A
7
2
A
8
V
CC
GND
2
DIR
2
OE
FCT162451
1
A
1
1
A
2
1
A
3
1
A
4
1
A
5
1
A
6
1
A
7
1
OE
1
B
1
1
B
2
1
B
3
1
B
4
1
B
5
1
B
6
1
B
7
1
DIR
1
A
8
1
B
8
FCT162452
2
A
1
2
A
2
2
A
3
2
A
4
2
A
5
2
A
6
2
A
7
2
OE
2
B
1
2
B
2
2
B
3
2
B
4
2
B
5
2
B
6
2
B
7
2
DIR
2
A
8
2
B
8
FCT162453
16245T
162245T
162H245T
CY74FCT16245T
CY74FCT162245T
CY74FCT162H245T
2
Maximum Ratings
[3, 4]
(Above which the useful life may be impaired. For user
guidelines, not tested.)
Storage Temperature ........................Com'l -55
C to +125
C
Ambient Temperature with
Power Applied....................................Com'l -55
C to +125
C
DC Input Voltage ........................................... 0.5V to +7.0V
DC Output Voltage......................................... 0.5V to +7.0V
DC Output Current
(Maximum Sink Current/Pin) ........................60 to +120 mA
Power Dissipation .......................................................... 1.0W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Notes:
1.
On CY74FCT162H245T these pins have bus hold.
2.
H = HIGH Voltage Level. L = LOW Voltage Level. X = Don't Care. Z = High Impedance.
3.
Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range.
4.
Unused inputs must always be connected to an appropriate logic voltage level, preferably either V
CC
or ground.
Pin Description
Name
Description
OE
Three-State Output Enable Inputs (Active LOW)
DIR
Direction Control
A
Inputs or Three-State Outputs
[1]
B
Inputs or Three-State Outputs
[1]
Function Table
[2]
Inputs
Outputs
OE
DIR
L
L
Bus B Data to Bus A
L
H
Bus A Data to Bus B
H
X
High Z State
Operating Range
Range
Ambient
Temperature
V
CC
Industrial
40
C to +85
C
5V
10%
Electrical Characteristics
Over the Operating Range
Parameter
Description
Test Conditions
Min.
Typ.
[5]
Max.
Unit
V
IH
Input HIGH Voltage
2.0
V
V
IL
Input LOW Voltage
0.8
V
V
H
Input Hysteresis
[6]
100
mV
V
IK
Input Clamp Diode Voltage
V
CC
=Min., I
IN
=18 mA
0.7
1.2
V
I
IH
Input HIGH Current
Standard
V
CC
=Max., V
I
=V
CC
1
A
Bus Hold
100
I
IL
Input LOW Current
Standard
V
CC
=Max., V
I
=GND
1
A
Bus Hold
100
A
I
BBH
I
BBL
Bus Hold Sustain Current on Bus Hold Input
[7]
V
CC
=Min.
V
I
=2.0V
50
A
V
I
=0.8V
+50
I
BHHO
I
BHLO
Bus Hold Overdrive Current on Bus Hold Input
[7]
V
CC
=Max., V
I
=1.5V
TBD
mA
I
OZH
High Impedance Output Current
(Three-State Output pins)
V
CC
=Max., V
OUT
=2.7V
1
A
I
OZL
High Impedance Output Current
(Three-State Output pins)
V
CC
=Max., V
OUT
=0.5V
1
A
I
OS
Short Circuit Current
[8]
V
CC
=Max., V
OUT
=GND
80
140
200
mA
I
O
Output Drive Current
[8]
V
CC
=Max., V
OUT
=2.5V
50
180
mA
I
OFF
Power-Off Disable
V
CC
=0V, V
OUT
4.5V
[9]
1
A
CY74FCT16245T
CY74FCT162245T
CY74FCT162H245T
3
Output Drive Characteristics for CY74FCT16245T
Parameter
Description
Test Conditions
Min.
Typ.
[5]
Max.
Unit
V
OH
Output HIGH Voltage
V
CC
=Min., I
OH
=3 mA
2.5
3.5
V
V
CC
=Min., I
OH
=15 mA
2.4
3.5
V
V
CC
=Min., I
OH
=32 mA
2.0
3.0
V
V
OL
Output LOW Voltage
V
CC
=Min., I
OL
=64 mA
0.2
0.55
V
Output Drive Characteristics for CY74FCT162245T, CY74FCT162H245T
Parameter
Description
Test Conditions
Min.
Typ.
[5]
Max.
Unit
I
ODL
Output LOW Current
[8]
V
CC
=5V, V
IN
=V
IH
or V
IL
, V
OUT
=1.5V
60
115
150
mA
I
ODH
Output HIGH Current
[8]
V
CC
=5V, V
IN
=V
IH
or V
IL
, V
OUT
=1.5V
60
115
150
mA
V
OH
Output HIGH Voltage
V
CC
=Min., I
OH
=24 mA
2.4
3.3
V
V
OL
Output LOW Voltage
V
CC
=Min., I
OL
=24 mA
0.3
0.55
V
Notes:
5.
Typical values are at V
CC
=5.0V, T
A
=+25C ambient.
6.
This parameter is specified but not tested.
7.
Pins with bus hold are described in Pin Description.
8.
Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, I
OS
tests should be performed last.
9.
Tested at +25C.
Capacitance
[6]
(T
A
= +25C, f = 1.0 MHz)
Parameter
Description
Test Conditions
Typ.
[5]
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
4.5
6.0
pF
C
OUT
Output Capacitance
V
OUT
= 0V
5.5
8.0
pF
CY74FCT16245T
CY74FCT162245T
CY74FCT162H245T
4
Power Supply Characteristics
Parameter
Description
Test Conditions
Typ.
[5]
Max.
Unit
I
CC
Quiescent Power Supply Current V
CC
=Max.
V
IN
<0.2V,
V
IN
>V
CC
-0.2V
5
500
A
I
CC
Quiescent Power Supply Current
(TTL inputs HIGH)
V
CC
=Max.
V
IN
=3.4V
[10]
0.5
1.5
mA
I
CCD
Dynamic Power Supply
Current
[11]
V
CC
=Max., One Input Toggling,
50% Duty Cycle, Outputs Open,
OE=DIR=GND
V
IN
=V
CC
or
V
IN
=GND
60
100
A/MHz
I
C
Total Power Supply Current
[12]
V
CC
=Max., f
1
=10 MHz,
50% Duty Cycle, Outputs Open,
One Bit Toggling,
OE=DIR=GND
V
IN
=V
CC
or
V
IN
=GND
0.6
1.5
mA
V
IN
=3.4V or
V
IN
=GND
0.9
2.3
mA
V
CC
=Max., f
1
=2.5 MHz, 50%
Duty Cycle, Outputs Open,
Sixteen Bits Toggling,
OE=DIR=GND
V
IN
=V
CC
or
V
IN
=GND
2.4
4.5
[13]
mA
V
IN
=3.4V or
V
IN
=GND
6.4
16.5
[13]
mA
Notes:
10. Per TTL driven input (V
IN
=3.4V); all other inputs at V
CC
or GND.
11. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
12. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
I
CC
D
H
N
T
+I
CCD
(f
0
/2 + f
1
N
1
)
I
CC
= Quiescent Current with CMOS input levels
I
CC
= Power Supply Current for a TTL HIGH input (V
IN
=3.4V)
D
H
= Duty Cycle for TTL inputs HIGH
N
T
= Number of TTL inputs at D
H
I
CCD
= Dynamic Current caused by an input transition pair (HLH or LHL)
f
0
= Clock frequency for registered devices, otherwise zero
f
1
= Input signal frequency
N
1
= Number of inputs changing at f
1
All currents are in milliamps and all frequencies are in megahertz.
13. Values for these conditions are examples of the I
CC
formula. These limits are specified but not tested.
CY74FCT16245T
CY74FCT162245T
CY74FCT162H245T
5
]
Switching Characteristics
Over the Operating Range
[14]
Description
74FCT16245T
74FCT162245T
74FCT16245AT
74FCT162245AT
74FCT162H245AT
Fig.
No.
[15]
Parameter
Min.
Max.
Min.
Max.
Unit
t
PLH
t
PHL
Propagation Delay Data to Output
A to B, B to A
1.5
7.0
1.5
4.5
ns
1, 3
t
PZH
t
PZL
Output Enable Time
OE to A or B
1.5
9.5
1.5
6.2
ns
1, 7, 8
t
PHZ
t
PLZ
Output Disable Time
OE to A or B
1.5
7.5
1.5
5.0
ns
1, 7, 8
t
PZH
t
PZL
Output Enable Time
DIR to A or B
1.5
9.5
1.5
6.2
ns
1, 7, 8
t
PHZ
t
PLZ
Output Disable Time
DIR to A or B
1.5
7.5
1.5
5.0
ns
1, 7, 8
t
SK(O)
Output Skew
[16]
0.5
0.5
ns
--
Description
74FCT16245CT
74FCT162245CT
74FCT162H245CT
74FCT16245ET
74FCT162245ET
74FCT162H245ET
Fig.
No.
[15]
Parameter
Min.
Max.
Min.
Max.
Unit
t
PLH
t
PHL
Propagation Delay Data to Output
A to B, B to A
1.5
4.1
1.5
3.2
ns
1, 3
t
PZH
t
PZL
Output Enable Time
OE to A or B
1.5
5.8
1.5
4.4
ns
1, 7, 8
t
PHZ
t
PLZ
Output Disable Time
OE to A or B
1.5
4.8
1.5
4.0
ns
1, 7, 8
t
PZH
t
PZL
Output Enable Time
DIR to A or B
1.5
5.8
1.5
4.8
ns
1, 7, 8
t
PHZ
t
PLZ
Output Disable Time
DIR to A or B
1.5
4.8
1.5
4.0
ns
1, 7, 8
t
SK(O)
Output Skew
[16]
0.5
0.5
ns
--
Note:
14. Minimum limits are specified but not tested on Propagation Delays.
15. See "Parameter Measurement Information" in the General Information section.
16. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design.
Ordering Information CY74FCT16245
Speed
(ns)
Ordering Code
Package
Name
Package Type
Operating
Range
3.2
CY74FCT16245ETPACT
Z48
48-Lead (240-Mil) TSSOP
Industrial
CY74FCT16245ETPVC/PVCT
O48
48-Lead (300-Mil) SSOP
4.1
CY74FCT16245CTPACT
Z48
48-Lead (240-Mil) TSSOP
Industrial
CY74FCT16245CTPVC/PVCT
O48
48-Lead (300-Mil) SSOP
4.5
CY74FCT16245ATPACT
Z48
48-Lead (240-Mil) TSSOP
Industrial
CY74FCT16245ATPVC/PVCT
O48
48-Lead (300-Mil) SSOP
7.0
CY74FCT16245TPACT
Z48
48-Lead (240-Mil) TSSOP
Industrial
CY74FCT16245TPVC/PVCT
O48
48-Lead (300-Mil) SSOP
CY74FCT16245T
CY74FCT162245T
CY74FCT162H245T
6
Ordering Information CY74FCT162245
Speed
(ns)
Ordering Code
Package
Name
Package Type
Operating
Range
3.2
74FCT162245ETPACT
Z48
48-Lead (240-Mil) TSSOP
Industrial
CY74FCT162245ETPVC
O48
48-Lead (300-Mil) SSOP
74FCT162245ETPVCT
O48
48-Lead (300-Mil) SSOP
4.1
CY74FCT162245CTPACT
Z48
48-Lead (240-Mil) TSSOP
Industrial
CY74FCT162245CTPVC
O48
48-Lead (300-Mil) SSOP
74FCT162245CTPVCT
O48
48-Lead (300-Mil) SSOP
4.5
74FCT162245ATPACT
Z48
48-Lead (240-Mil) TSSOP
Industrial
CY74FCT162245ATPVC
O48
48-Lead (300-Mil) SSOP
74FCT162245ATPVCT
O48
48-Lead (300-Mil) SSOP
7.0
CY74FCT162245TPACT
Z48
48-Lead (240-Mil) TSSOP
Industrial
CY74FCT162245TPVC/PVCT
O48
48-Lead (300-Mil) SSOP
Ordering Information CY74FCT162H245
Speed
(ns)
Ordering Code
Package
Name
Package Type
Operating
Range
3.2
74FCT162H245ETPACT
Z48
48-Lead (240-Mil) TSSOP
Industrial
CY74FCT162H245ETPVC
O48
48-Lead (300-Mil) SSOP
74FCT162H245ETPVCT
O48
48-Lead (300-Mil) SSOP
4.1
74FCT162H245CTPACT
Z48
48-Lead (240-Mil) TSSOP
Industrial
CY74FCT162H245CTPVC
O48
48-Lead (300-Mil) SSOP
74FCT162H245CTPVCT
O48
48-Lead (300-Mil) SSOP
4.5
74FCT162H245ATPACT
Z48
48-Lead (240-Mil) TSSOP
Industrial
CY74FCT162H245ATPVC
O48
48-Lead (300-Mil) SSOP
74FCT162H245ATPVCT
O48
48-Lead (300-Mil) SSOP
CY74FCT16245T/2245T
CY74FCT16445T/2H245T
7
Package Diagrams
48-Lead Shrunk Small Outline Package O48
CY74FCT16245T
CY74FCT162245T
CY74FCT162H245T
8
Package Diagrams
48-Lead Thin Shrunk Small Outline Package Z48
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accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
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CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL
APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
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Copyright
2000, Texas Instruments Incorporated
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