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Электронный компонент: 74LS16

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SN54LS06, SN74LS06, SN74LS16
HEX INVERTER BUFFERS/DRIVERS
WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS
SDLS020B MAY 1990 REVISED JANUARY 2002
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Convert TTL Voltage Levels to MOS Levels
D
High Sink-Current Capability
D
Input Clamping Diodes Simplify System
Design
D
Open-Collector Driver for Indicator Lamps
and Relays
D
Inputs Fully Compatible With Most TTL
Circuits
description
These hex inverter buffers/drivers feature
high-voltage open-collector outputs to interface
with high-level circuits (such as MOS), or for
driving high-current loads, and also are character-
ized for use as inverter buffers for driving TTL
inputs. The 'LS06 devices have a rated output
voltage of 30 V, and the SN74LS16 has a rated
output voltage of 15 V. The maximum sink current
for the SN54LS06 is 30 mA, and for the
SN74LS06 and SN74LS16 is 40 mA.
These devices are compatible with most TTL
families. Inputs are diode-clamped to minimize
transmission effects, which simplifies design.
Typical power dissipation is 175 mW and average
propagation delay time is 8 ns.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SOIC
D
Tube
SN74LS06D
LS06
SOIC D
Tape and reel
SN74LS06DR
LS06
0
C to 70
C
SOP NS
Tape and reel
SN74LS06NSR
74LS06
SSOP DB
Tape and reel
SN74LS06DBR
LS06
PDIP N
Tube
SN74LS06N
SN74LS06N
CDIP J
Tube
SN54LS06J
SN54LS06J
55
C to 125
C
CDIP J
Tube
SNJ54LS06J
SNJ54LS06J
LCCC FK
Tube
SNJ54LS06FK
SNJ54LS06FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB
design guidelines are available at www.ti.com/sc/package.
The SN74LS16 is obsolete
and is no longer supplied.
Copyright
2002, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1Y
2A
2Y
3A
3Y
GND
V
CC
6A
6Y
5A
5Y
4A
4Y
SN54LS06 . . . J PACKAGE
SN74LS06, SN74LS16 . . . D, N, OR NS PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
6Y
NC
5A
NC
5Y
2A
NC
2Y
NC
3A
1Y
1A
NC
4A
6A
3Y
GND
NC
NC No internal connection
4Y
V
SN54LS06 . . . FK PACKAGE
(TOP VIEW)
CC
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54LS06, SN74LS06, SN74LS16
HEX INVERTER BUFFERS/DRIVERS
WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS
SDLS020B MAY 1990 REVISED JANUARY 2002
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic diagram (positive logic)
1A
2A
3A
4A
5A
6A
1Y
2Y
3Y
4Y
5Y
6Y
1
3
5
9
11
13
2
4
6
8
10
12
Pin numbers shown are for the D, J, N, and NS packages.
schematic (each gate)
Input
VCC
Output
GND
9 k
1 k
2 k
2 k
2.5 k
2.5 k
15 k
Resistor values shown are nominal.
The SN74LS16 is obsolete
and is no longer supplied.
SN54LS06, SN74LS06, SN74LS16
HEX INVERTER BUFFERS/DRIVERS
WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS
SDLS020B MAY 1990 REVISED JANUARY 2002
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
(see Note 1)
5.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage, V
O
(see Notes 1 and 2): SN54LS06, SN74LS06
30 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74LS16 15
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 3): D package
86
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package
80
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package
76
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. All voltage values are with respect to GND.
2. This is the maximum voltage that should be applied to any output when it is in the off state.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
SN54LS06
SN74LS06
SN74LS16
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
VCC
Supply voltage
4.5
5
5.5
4.75
5
5.25
V
VIH
High-level input voltage
2
2
V
VIL
Low-level input voltage
0.8
0.8
V
VOH
High level output voltage
'LS06
30
30
V
VOH
High-level output voltage
SN74LS16
15
V
IOL
Low-level output current
30
40
mA
TA
Operating free-air temperature
55
125
0
70
C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54LS06
SN74LS06
SN74LS16
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
VIK
VCC = MIN,
II = 12 mA
1.5
1.5
V
IOH
VCC = MIN
VIL = 0 8 V
'LS06,
VOH = 30 V
0.25
0.25
V
IOH
VCC = MIN,
VIL = 0.8 V
SN74LS16,
VOH = 15 V
0.25
V
IOL = 16 mA
0.25
0.4
0.25
0.4
VOL
VCC = MIN,
VIH = 2 V
IOL = 30 mA
0.7
V
IOL = 40 mA
0.7
II
VCC = MAX,
VI = 7 V
1
1
mA
IIH
VCC = MAX,
VI = 2.4 V
20
20
A
IIL
VCC = MAX,
VI = 0.4 V
0.2
0.2
mA
ICCH
VCC = MAX
18
18
mA
ICCL
VCC = MAX
60
60
mA
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at VCC = 5 V, and TA = 25
C.
The SN74LS16 is obsolete
and is no longer supplied.
SN54LS06, SN74LS06, SN74LS16
HEX INVERTER BUFFERS/DRIVERS
WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS
SDLS020B MAY 1990 REVISED JANUARY 2002
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics, V
CC
= 5 V, T
A
= 25
C (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TEST CONDITIONS
MIN
MAX
UNIT
tPLH
A
Y
RL = 110
CL = 15 pF
7
15
ns
tPHL
A
Y
RL = 110
,
CL = 15 pF
10
20
ns
The SN74LS16 is obsolete
and is no longer supplied.
SN54LS06, SN74LS06, SN74LS16
HEX INVERTER BUFFERS/DRIVERS
WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS
SDLS020B MAY 1990 REVISED JANUARY 2002
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
tPHL
tPLH
tPLH
tPHL
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
High-Level
Pulse
Low-Level
Pulse
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
Out-of-Phase
Output
(see Note D)
3 V
0 V
VOL
VOH
VOH
VOL
In-Phase
Output
(see Note D)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCC
RL
Test
Point
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 2-STATE TOTEM-POLE OUTPUTS
(see Note B)
VCC
RL
From Output
Under Test
CL
(see Note A)
Test
Point
(see Note B)
VCC
RL
From Output
Under Test
CL
(see Note A)
Test
Point
5 k
NOTES: A. CL includes probe and jig capacitance.
B. All diodes are 1N3064 or equivalent.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. S1 and S2 are closed for tPLH, tPHL, tPHZ, and tPLZ; S1 is open and S2 is closed for tPZH; S1 is closed and S2 is open for tPZL.
E. Phase relationships between inputs and outputs have been chosen arbitrarily for these examples.
F. All input pulses are supplied by generators having the following characteristics: PRR
1 MHz, ZO
50
, tr
1.5 ns, tf
2.6 ns.
G. The outputs are measured one at a time with one input transition per measurement.
S1
S2
tPHZ
tPLZ
tPZL
tPZH
3 V
3 V
0 V
0 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
3 V
0 V
Output
Control
(low-level
enabling)
Waveform 1
(see Notes C
and D)
Waveform 2
(see Notes C
and D)
1.5 V
VOH 0.5 V
VOL + 0.5 V
1.5 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
tw
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
VOL
VOH
Figure 1. Load Circuits and Voltage Waveforms
The SN74LS16 is obsolete
and is no longer supplied.