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FEATURES
3
2
4
6
1
A
C
Y
GND
B
DBV PACKAGE
(TOP VIEW)
YEP OR YZP PACKAGE
(BOTTOM VIEW)
DCK PACKAGE
(TOP VIEW)
3
2
4
6
1
A
C
Y
GND
B
A
B
C
Y
GND
See mechanical drawings for dimensions.
1
4
2
3
6
V
CC
V
CC
5
V
CC
5
5
DESCRIPTION/ORDERING INFORMATION
SN74LVC1G3208
SINGLE 3-INPUT POSITIVE OR-AND GATE
SCES605A SEPTEMBER 2004 REVISED JUNE 2005
Can Be Used in Three Combinations:
Available in the Texas Instruments
OR-AND Gate
NanoStarTM and NanoFreeTM Packages
OR Gate
Supports 5-V V
CC
Operation
AND Gate
Inputs Accept Voltages to 5.5 V
I
off
Supports Partial-Power-Down Mode
Max t
pd
of 5 ns at 3.3 V
Operation
Low Power Consumption, 10-
A Max I
CC
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
24-mA Output Drive at 3.3 V
ESD Protection Exceeds JESD 22
Input Hysteresis Allows Slow Input Transition
and Better Switching Noise Immunity at the
2000-V Human-Body Model (A114-A)
Input
200-V Machine Model (A115-A)
(V
hys
= 250 mV Typ @ 3.3 V)
1000-V Charged-Device Model (C101)
This device is designed for 1.65-V to 5.5-V V
CC
operation.
The SN74LVC1G3208 is a single 3-input positive OR-AND gate. It performs the Boolean function Y = (A + B)
C
in positive logic.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
(2)
NanoStarTM WCSP (DSBGA)
SN74LVC1G3208YEPR
0.23-mm Large Bump YEP
Reel of 3000
_ _ _ DD _
NanoFreeTM WCSP (DSBGA)
0.23-mm Large Bump YZP
SN74LVC1G3208YZPR
(Pb-free)
40
C to 85
C
Reel of 3000
SN74LVC1G3208DBVR
SOT (SOT-23) DBV
CDD_
Reel of 250
SN74LVC1G3208DBVT
Reel of 3000
SN74LVC1G3208DCKR
SOT (SC-70) DCK
DD_
Reel of 250
SN74LVC1G3208DCKT
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2)
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
= Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 20042005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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DESCRIPTION/ORDERING INFORMATION (CONTINUED)
1
3
4
A
B
Y
6
C
1
2
3
6
5
4
Y
B
V
CC
B
Y
C
C
1
2
3
6
5
4
Y
A
V
CC
A
Y
C
C
SN74LVC1G3208
SINGLE 3-INPUT POSITIVE OR-AND GATE
SCES605A SEPTEMBER 2004 REVISED JUNE 2005
By tying one input to GND or V
CC
, the SN74LVC1G3208 offers two more functions. When C is tied to V
CC
, this
device performs as a 2-input OR gate (Y = A + B). When A is tied to GND, the device works as a 2-input AND
gate (Y = B
C). This device also works as a 2-input AND gate when B is tied to GND (Y = A
C).
NanoStarTM and NanoFreeTM package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
FUNCTION TABLE
(1)
INPUTS
OUTPUT
Y
A
B
C
H
X
H
H
X
H
H
H
X
X
L
L
L
L
H
L
(1)
X = Valid H or L
LOGIC DIAGRAM (POSITIVE LOGIC)
FUNCTION SELECTION TABLE
LOGIC FUNCTION
FIGURE
2-Input AND Gate
1
2-Input OR Gate
2
Y = (A + B)
C
3
LOGIC CONFIGURATIONS
Figure 1. 2-Input AND Gate
2
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A
Y
B
1
2
3
6
5
4
A
Y
V
CC
B
Y
C
1
2
3
6
5
4
C
A
V
CC
Y
A
B
B
Absolute Maximum Ratings
(1)
SN74LVC1G3208
SINGLE 3-INPUT POSITIVE OR-AND GATE
SCES605A SEPTEMBER 2004 REVISED JUNE 2005
Figure 2. 2-Input OR Gate
Figure 3. Y = (A + B)
C
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
V
CC
Supply voltage range
0.5
6.5
V
V
I
Input voltage range
(2)
0.5
6.5
V
V
O
Voltage range applied to any output in the high-impedance or power-off state
(2)
0.5
6.5
V
V
O
Voltage range applied to any output in the high or low state
(2) (3)
0.5
V
CC
+ 0.5
V
I
IK
Input clamp current
V
I
< 0
50
mA
I
OK
Output clamp current
V
O
< 0
50
mA
I
O
Continuous output current
50
mA
Continuous current through V
CC
or GND
100
mA
DBV package
165
JA
Package thermal impedance
(4)
DCK package
259
C/W
YEP/YZP package
123
T
stg
Storage temperature range
65
150
C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3)
The value of VCC is provided in the recommended operating conditions table.
(4)
The package thermal impedance is calculated in accordance with JESD 51-7.
3
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Recommended Operating Conditions
(1)
SN74LVC1G3208
SINGLE 3-INPUT POSITIVE OR-AND GATE
SCES605A SEPTEMBER 2004 REVISED JUNE 2005
MIN
MAX
UNIT
Operating
1.65
5.5
V
CC
Supply voltage
V
Data retention only
1.5
V
CC
= 1.65 V to 1.95 V
0.65 V
CC
V
CC
= 2.3 V to 2.7 V
1.7
V
IH
High-level input voltage
V
V
CC
= 3 V to 3.6 V
2
V
CC
= 4.5 V to 5.5 V
0.7 V
CC
V
CC
= 1.65 V to 1.95 V
0.35 V
CC
V
CC
= 2.3 V to 2.7 V
0.7
V
IL
Low-level input voltage
V
V
CC
= 3 V to 3.6 V
0.8
V
CC
= 4.5 V to 5.5 V
0.3 V
CC
V
I
Input voltage
0
5.5
V
V
O
Output voltage
0
V
CC
V
V
CC
= 1.65 V
4
V
CC
= 2.3 V
8
I
OH
High-level output current
V
CC
= 3 V
16
mA
24
V
CC
= 4.5 V
32
V
CC
= 1.65 V
4
V
CC
= 2.3 V
8
I
OL
Low-level output current
V
CC
= 3 V
16
mA
24
V
CC
= 4.5 V
32
V
CC
= 1.8 V
0.15 V, 2.5 V
0.2 V
20
t/
v
Input transition rise or fall rate
V
CC
= 3.3 V
0.3 V
10
ns/V
V
CC
= 5 V
0.5 V
5
T
A
Operating free-air temperature
40
85
C
(1)
All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
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Electrical Characteristics
Switching Characteristics
Switching Characteristics
Operating Characteristics
SN74LVC1G3208
SINGLE 3-INPUT POSITIVE OR-AND GATE
SCES605A SEPTEMBER 2004 REVISED JUNE 2005
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
V
CC
MIN TYP
(1)
MAX
UNIT
I
OH
= 100
A
1.65 V to 5.5 V
V
CC
0.1
I
OH
= 4 mA
1.65 V
1.2
I
OH
= 8 mA
2.3 V
1.9
V
OH
V
I
OH
= 16 mA
2.4
3 V
I
OH
= 24 mA
2.3
I
OH
= 32 mA
4.5 V
3.8
I
OL
= 100
A
1.65 V to 5.5 V
0.1
I
OL
= 4 mA
1.65 V
0.45
I
OL
= 8 mA
2.3 V
0.3
V
OL
V
I
OL
= 16 mA
0.4
3 V
I
OL
= 24 mA
0.55
I
OL
= 32 mA
4.5 V
0.55
A, B, or
I
I
V
I
= 5.5 V or GND
0 to 5.5 V
5
A
C inputs
I
off
V
I
or V
O
= 5.5 V
0
10
A
I
CC
V
I
= 5.5 V or GND
I
O
= 0
1.65 V to 5.5 V
10
A
I
CC
One input at V
CC
0.6 V,
Other inputs at V
CC
or GND
3 V to 5.5 V
500
A
C
i
V
I
= V
CC
or GND
3.3 V
3.5
pF
(1)
All typical values are at V
CC
= 3.3 V, T
A
= 25C.
over recommended operating free-air temperature range, C
L
= 15 pF (unless otherwise noted) (see
Figure 4
)
V
CC
= 1.8 V
V
CC
= 2.5 V
V
CC
= 3.3 V
V
CC
= 5 V
FROM
TO
0.15 V
0.2 V
0.3 V
0.5 V
PARAMETER
UNIT
(INPUT)
(OUTPUT)
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
t
pd
A, B, or C
Y
3.7
14
2.5
7
1.7
5
1.3
3.4
ns
over recommended operating free-air temperature range, C
L
= 30 pF or 50 pF (unless otherwise noted) (see
Figure 5
)
V
CC
= 1.8 V
V
CC
= 2.5 V
V
CC
= 3.3 V
V
CC
= 5 V
FROM
TO
0.15 V
0.2 V
0.3 V
0.5 V
PARAMETER
UNIT
(INPUT)
(OUTPUT)
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
t
pd
A, B, or C
Y
2.5
17.5
1.8
7.6
1.8
5.9
1.3
4
ns
T
A
= 25C
V
CC
= 1.8 V
V
CC
= 2.5 V
V
CC
= 3.3 V
V
CC
= 5 V
TEST
PARAMETER
UNIT
CONDITIONS
TYP
TYP
TYP
TYP
C
pd
Power dissipation capacitance
f = 10 MHz
15
15
16
17
pF
5
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