SN54HC139, SN74HC139
DUAL 2 LINE TO 4 LINE DECODERS/DEMULTIPLEXERS
SCLS108D - DECEMBER 1982 - REVISED SEPTEMBER 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Targeted Specifically for High-Speed
Memory Decoders and Data-Transmission
Systems
D
Wide Operating Voltage Range of 2 V to 6 V
D
Outputs Can Drive Up To 10 LSTTL Loads
D
Low Power Consumption, 80-
A Max I
CC
D
Typical t
pd
= 10 ns
D
4-mA Output Drive at 5 V
D
Low Input Current of 1
A Max
D
Incorporate Two Enable Inputs to Simplify
Cascading and/or Data Reception
description/ordering information
The 'HC139 devices are designed for
high-performance memory-decoding or
data-routing applications requiring very short
propagation delay times. In high-performance
memory systems, these decoders can minimize
the effects of system decoding. When employed
with high-speed memories utilizing a fast enable
circuit, the delay time of these decoders and the
enable time of the memory usually are less than
the typical access time of the memory. This means
that the effective system delay introduced by the
decoders is negligible.
ORDERING INFORMATION
TA
PACKAGE
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP - N
Tube of 25
SN74HC139N
SN74HC139N
Tube of 40
SN74HC139D
SOIC - D
Reel of 2500
SN74HC139DR
HC139
SOIC - D
Reel of 250
SN74HC139DT
HC139
-40
C to 85
C
SOP - NS
Reel of 2000
SN74HC139NSR
HC139
-40 C to 85 C
SSOP - DB
Reel of 2000
SN74HC139DBR
HC139
Tube of 90
SN74HC139PW
TSSOP - PW
Reel of 2000
SN74HC139PWR
HC139
TSSOP - PW
Reel of 250
SN74HC139PWT
HC139
CDIP - J
Tube of 25
SNJ54HC139J
SNJ54HC139J
-55
C to 125
C
CFP - W
Tube of 150
SNJ54HC139W
SNJ54HC139W
-55 C to 125 C
LCCC - FK
Tube of 55
SNJ54HC139FK
SNJ54HC139FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2A
2B
NC
2Y0
2Y1
1B
1Y0
NC
1Y1
1Y2
1A
1G
NC
2Y3
2Y2
V
2G
1Y3
GND
NC
SN54HC139 . . . FK PACKAGE
(TOP VIEW)
CC
NC - No internal connection
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1G
1A
1B
1Y0
1Y1
1Y2
1Y3
GND
V
CC
2G
2A
2B
2Y0
2Y1
2Y2
2Y3
SN54HC139 . . . J OR W PACKAGE
SN74HC139 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
Copyright
2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL PRF 38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54HC139, SN74HC139
DUAL 2 LINE TO 4 LINE DECODERS/DEMULTIPLEXERS
SCLS108D - DECEMBER 1982 - REVISED SEPTEMBER 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
The 'HC139 devices comprise two individual 2-line to 4-line decoders in a single package. The active-low enable
(G) input can be used as a data line in demultiplexing applications. These decoders/demultiplexers feature fully
buffered inputs, each of which represents only one normalized load to its driving circuit.
FUNCTION TABLE
INPUTS
OUTPUTS
G
SELECT
OUTPUTS
G
B
A
Y0
Y1
Y2
Y3
H
X
X
H
H
H
H
L
L
L
L
H
H
H
L
L
H
H
L
H
H
L
H
L
H
H
L
H
L
H
H
H
H
H
L
logic diagram (positive logic)
1G
1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3
1A
1B
2G
2A
2B
Pin numbers shown are for the D, DB, J, N, NS, PW, and W packages.
1
2
3
15
14
13
4
5
6
7
12
11
10
9
SN54HC139, SN74HC139
DUAL 2 LINE TO 4 LINE DECODERS/DEMULTIPLEXERS
SCLS108D - DECEMBER 1982 - REVISED SEPTEMBER 2003
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
-0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
) (see Note 1)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
) (see Note 1)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(V
O
= 0 to V
CC
)
25 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 2): D package
73
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DB package
82
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package
67
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package
64
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package
108
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
-65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54HC139
SN74HC139
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
UNIT
VCC
Supply voltage
2
5
6
2
5
6
V
VCC = 2 V
1.5
1.5
VIH
High-level input voltage
VCC = 4.5 V
3.15
3.15
V
VIH
High-level input voltage
VCC = 6 V
4.2
4.2
V
VCC = 2 V
0.5
0.5
VIL
Low-level input voltage
VCC = 4.5 V
1.35
1.35
V
VIL
Low-level input voltage
VCC = 6 V
1.8
1.8
V
VI
Input voltage
0
VCC
0
VCC
V
VO
Output voltage
0
VCC
0
VCC
V
VCC = 2 V
1000
1000
t/
v
Input transition rise/fall time
VCC = 4.5 V
500
500
ns
t/
v
Input transition rise/fall time
VCC = 6 V
400
400
ns
TA
Operating free-air temperature
-55
125
-40
85
C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
SN54HC139, SN74HC139
DUAL 2 LINE TO 4 LINE DECODERS/DEMULTIPLEXERS
SCLS108D - DECEMBER 1982 - REVISED SEPTEMBER 2003
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25
C
SN54HC139
SN74HC139
UNIT
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
2 V
1.9
1.998
1.9
1.9
IOH = -20
A
4.5 V
4.4
4.499
4.4
4.4
VOH
VI = VIH or VIL
IOH = -20
A
6 V
5.9
5.999
5.9
5.9
V
VOH
VI = VIH or VIL
IOH = -4 mA
4.5 V
3.98
4.3
3.7
3.84
V
IOH = -5.2 mA
6 V
5.48
5.8
5.2
5.34
2 V
0.002
0.1
0.1
0.1
IOL = 20
A
4.5 V
0.001
0.1
0.1
0.1
VOL
VI = VIH or VIL
IOL = 20
A
6 V
0.001
0.1
0.1
0.1
V
VOL
VI = VIH or VIL
IOL = 4 mA
4.5 V
0.17
0.26
0.4
0.33
V
IOL = 5.2 mA
6 V
0.15
0.26
0.4
0.33
II
VI = VCC or 0
6 V
0.1
100
1000
1000
nA
ICC
VI = VCC or 0,
IO = 0
6 V
8
160
80
A
Ci
2 V to 6 V
3
10
10
10
pF
switching characteristics over recommended operating free-air temperature range, C
L
= 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
VCC
TA = 25
C
SN54HC139
SN74HC139
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
2 V
47
175
255
220
A or B
Y
4.5 V
14
35
51
44
tpd
A or B
Y
6 V
12
30
44
38
ns
tpd
2 V
39
175
255
220
ns
G
Y
4.5 V
11
35
51
44
G
Y
6 V
10
30
44
38
2 V
38
75
110
95
tt
Y
4.5 V
8
15
22
19
ns
tt
Y
6 V
6
13
19
16
ns
operating characteristics, T
A
= 25
C
PARAMETER
TEST CONDITIONS
TYP
UNIT
Cpd
Power dissipation capacitance per decoder
No load
25
pF
SN54HC139, SN74HC139
DUAL 2 LINE TO 4 LINE DECODERS/DEMULTIPLEXERS
SCLS108D - DECEMBER 1982 - REVISED SEPTEMBER 2003
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
50%
50%
10%
10%
90%
90%
VCC
0 V
tr
tf
Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
50%
50%
50%
10%
10%
90%
90%
VCC
VOH
VOL
0 V
tr
tf
Input
In-Phase
Output
50%
tPLH
tPHL
50%
50%
10%
10%
90%
90%
VOH
VOL
tr
tf
tPHL
tPLH
Out-of-Phase
Output
Test
Point
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
NOTES: A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR
1 MHz, ZO = 50
, tr = 6 ns, tf = 6 ns.
C. The outputs are measured one at a time with one input transition per measurement.
D. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
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