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Features
Fast charge and conditioning of
nickel cadmium or nickel-metal
hydride batteries
Hysteretic PWM switch-mode
current regulation or gated con-
trol of an external regulator
Easily integrated into systems or
used as a stand-alone charger
Pre-charge qualification of tem-
perature and voltage
Configurable, direct LED outputs
display battery and charge status
Fast-charge termination by tem-
perature/
time, peak volume de-
tection, -
V, maximum voltage,
maximum temperature, and maxi-
mum time
Optional top-off charge and
p uls e d curren t mai nten ance
charging
Logic-level controlled low-power
mode (< 5
A standby current)
General Description
The bq2004E and bq2004H Fast
Charge ICs provide comprehensive
fast charge control functions together
with high-speed switching power con-
trol circuitry on a monolithic CMOS
device.
Integration of closed-loop current
control circuitry allows the bq2004
to be the basis of a cost-effective so-
lution for stand-alone and system-
integrated chargers for batteries of
one or more cells.
Switch-activated discharge-before-
charge allows bq2004E/H-based charg-
ers to support battery conditioning
and capacity determination.
High-efficiency power conversion is
accomplished using the bq2004E/H as
a hysteretic PWM controller for
switch-mode regulation of the charg-
ing current. The bq2004E/H may al-
ternatively be used to gate an exter-
nally regulated charging current.
Fast charge may begin on application
of the charging supply, replacement
of the battery, or switch depression.
For safety, fast charge is inhibited
unless/until the battery tempera-
ture and voltage are within config-
ured limits.
Temperature, voltage, and time are
monitored throughout fast charge.
Fast charge is terminated by any of
the following:
n
Rate of temperature rise
(
T/t)
n
Peak voltage detection (PVD)
n
Negative delta voltage (-
V)
n
Maximum voltage
n
Maximum temperature
n
Maximum time
After fast charge, optional top-off
and pulsed current maintenance
phases with appropriate display
mode selections are available.
T h e b q 2 0 0 4 H d i f f e r s f r o m t h e
bq2004E only in that fast charge,
hold-off, and top-off time units have
been scaled up by a factor of two,
and the bq2004H provides different
display selections. Timing differ-
ences between the two ICs are illus-
trated in Table 1. Display differ-
ences are shown in Table 2.
1
Fast-Charge ICs
bq2004E/H
DCMD
Discharge command
DSEL
Display select
VSEL
Voltage termination
select
TM
1
Timer mode select 1
TM
2
Timer mode select 2
TCO
Temperature cutoff
TS
Temperature sense
BAT
Battery voltage
1
PN2004E01.eps
16-Pin Narrow DIP
or Narrow SOIC
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
INH
DIS
MOD
VCC
VSS
LED2
LED1
SNS
DCMD
DSEL
VSEL
TM1
TM2
TCO
TS
BAT
SNS
Sense resistor input
LED
1
Charge status output 1
LED
2
Charge status output 2
V
SS
System ground
V
CC
5.0V
10% power
MOD
Charge current control
DIS
Discharge control
output
INH
Charge inhibit input
Pin Connections
6/99 E
Pin Names
Pin Descriptions
DCMD
Discharge-before-charge control input
The DCMD input controls the conditions
that enable discharge-before-charge. DCMD
is pulled up internally.
A negative-going
pulse on DCMD initiates a discharge to end-
of-discharge voltage (EDV) on the BAT pin,
followed by a new charge cycle start. Tying
D C M D t o g r o u n d e n a b l e s a u t o m a t i c
discharge-before-charge on every new charge
cycle start.
DSEL
Display select input
This three-state input configures the charge
status display mode of the LED
1
and LED
2
out-
puts and can be used to disable top-off and
pulsed-trickle. See Table 2.
VSEL
Voltage termination select input
This three-state input controls the voltage-
t e r m i n a t i o n t e ch n i q u e u s e d b y t h e
bq2004E/H.
When high, PVD is active.
When floating, -
V is used. When pulled low,
both PVD and -
V are disabled.
TM
1
TM
2
Timer mode inputs
TM
1
and TM
2
are three-state inputs that
configure the fast charge safety timer, voltage
termination hold-off time, "top-off ", and
trickle charge control. See Table 1.
TCO
Temperature cut-off threshold input
Input to set maximum allowable battery
temperature.
If the potential between TS
and SNS is less than the voltage at the TCO
input, then fast charge or top-off charge is ter-
minated.
TS
Temperature sense input
Input, referenced to SNS,
for an external
thermister monitoring battery temperature.
BAT
Battery voltage input
BAT is the battery voltage sense input, refer-
enced to SNS.
This is created by a high-
impedance resistor-divider network con-
nected between the positive and the negative
terminals of the battery.
SNS
Charging current sense input
SNS controls the switching of MOD based on
an external sense resistor in the current
path of the battery. SNS is the reference po-
tential for both the TS and BAT pins.
If
SNS is connected to V
SS
, then MOD switches
high at the beginning of charge and low at
the end of charge.
LED
1
LED
2
Charge status outputs
Push-pull outputs indicating charging
status. See Table 2.
Vss
Ground
V
CC
V
CC
supply input
5.0V,
10% power input.
MOD
Charge current control output
MOD is a push-pull output that is used to
control the charging current to the battery.
MOD switches high to enable charging cur-
rent to flow and low to inhibit charging
current flow.
DIS
Discharge control output
Push-pull output used to control an external
transistor to discharge the battery before
charging.
INH
Charge inhibit input
When low, the bq2004E/H suspends all
charge actions, drives all outputs to high im-
pedance, and assumes a low-power opera-
tional state. When transitioning from low to
high, a new charge cycle is started.
2
bq2004E/H
Functional Description
Figure 2 shows a block diagram and Figure 3 shows a
state diagram of the bq2004E/H.
Battery Voltage and Temperature
Measurements
Battery voltage and temperature are monitored for
maximum allowable values. The voltage presented on
the battery sense input, BAT, should represent a
two-cell potential for the battery under charge.
A
resistor-divider ratio of:
RB1
RB2
=
N
2
- 1
is recommended to maintain the battery voltage within
the valid range, where N is the number of cells, RB1 is
the resistor connected to the positive battery terminal,
and RB2 is the resistor connected to the negative bat-
tery terminal. See Figure 1.
Note: This resistor-divider network input impedance to
end-to-end should be at least 200k
and less than 1M.
A ground-referenced negative temperature coefficient ther-
mistor placed in proximity to the battery may be used as a
low-cost temperature-to-voltage transducer. The tempera-
ture sense voltage input at TS is developed using a
resistor-thermistor network between V
CC
and V
SS
.
See
Figure 1. Both the BAT and TS inputs are referenced to
SNS, so the signals used inside the IC are:
V
BAT
- V
SNS
= V
CELL
and
V
TS
- V
SNS
= V
TEMP
Discharge-Before-Charge
The DCMD input is used to command discharge-before-
charge via the DIS output. Once activated, DIS becomes
active (high) until V
CELL
falls below V
EDV,
at which time
DIS goes low and a new fast charge cycle begins.
The DCMD input is internally pulled up to V
CC
(its inac-
tive state). Leaving the input unconnected, therefore,
results in disabling discharge-before-charge. A negative
going pulse on DCMD initiates discharge-before-charge
at any time regardless of the current state of the
bq2004. If DCMD is tied to V
SS
, discharge-before-charge
will be the first step in all newly started charge cycles.
Starting A Charge Cycle
A new charge cycle is started by:
1.
Application of V
CC
power.
2.
V
CELL
falling through the maximum cell voltage,
V
MCV
where:
V
MCV
= 0.8
V
CC
30mV
3.
A transition on the INH input from low to high.
If DCMD is tied low, a discharge-before-charge will be
executed as the first step of the new charge cycle. Oth-
erwise, pre-charge qualification testing will be the first
step.
The battery must be within the configured temperature
and voltage limits before fast charging begins.
The valid battery voltage range is V
EDV
< V
BAT
< V
MCV
where:
V
EDV
= 0.4
V
CC
30mV
3
bq2004E/H
Fg2004a.eps
N
T
C
bq2004E/H
VCC
PACK +
PACK -
TS
SNS
RT1
RT2
RB2
RB1
bq2004E/H
Negative Temperature
Coefficient Thermister
PACK+
PACK-
BAT
SNS
Figure 1. Voltage and Temperature Monitoring
The valid temperature range is V
HTF
< V
TEMP
< V
LTF
,
where:
V
LTF
= 0.4
V
CC
30mV
V
HTF
= [(1/3
V
LTF
) + (2/3
V
TCO
)]
30mV
V
TCO
is the voltage presented at the TCO input pin, and is
configured by the user with a resistor divider between V
CC
and ground. The allowed range is 0.2 to 0.4
V
CC
.
If the temperature of the battery is out of range, or the
voltage is too low, the chip enters the charge pending
state and waits for both conditions to fall within their al-
lowed limits. During the charge-pending mode, the IC
first applies a top-off charge to the battery.
The top-off charge, at the rate of 1 8 of the fast charge,
continues until the fast-charge conditions are met or the
top-off time-out period is exceeded. The IC then trickle
charges until the fast-charge conditions are met. There
is no time limit on the charge pending state; the charger
remains in this state as long as the voltage or tempera-
ture conditons are outside of the allowed limits. If the
voltage is too high, the chip goes to the battery absent
state and waits until a new charge cycle is started.
Fast charge continues until termination by one or more
of the six possible termination conditions:
n
Delta temperature/delta time (
T/t)
n
Peak voltage detection (PVD)
n
Negative delta voltage (-
V)
n
Maximum voltage
n
Maximum temperature
n
Maximum time
PVD and -
V Termination
The bq2004E/H samples the voltage at the BAT pin once
every 34s. When -
V termination is selected, if V
CELL
is
lower than any previously measured value by 12mV
4mV (6mV/cell), fast charge is terminated. When PVD
termination is selected, if V
CELL
is lower than any previ-
ously measured value by 6mV
2mV (3mV/cell), fast
charge is terminated. The PVD and -
V tests are valid
in the range 0.4
V
CC
< V
CELL
< 0.8
V
CC
.
4
bq2004E/H
BD200401.eps
Timing
Control
OSC
Display
Control
Charge Control
State Machine
Discharge
Control
MOD
Control
TCO
Check
LTF
Check
A/D
EDV
Check
MCV
Check
DIS
MOD
INH
VCC VSS
BAT
SNS
TS
TCO
TM2
TM1
LED1
DCMD
DVEN
VTS - VSNS
VBAT - VSNS
LED2
DSEL
PWR
Control
Figure 2. Block Diagram
5
VSEL Input
Voltage Termination
Low
Disabled
Float
-
V
High
PVD
Voltage Sampling
Each sample is an average of voltage measurements.
The IC takes 32 measurements in PVD mode and 16
measurements in -
V mode. The resulting sample peri-
ods (9.17ms and 18.18ms, respectively) filter out har-
monics centered around 55Hz and 109Hz. This tech-
nique minimizes the effect of any AC line ripple that
may feed through the power supply from either 50Hz or
60Hz AC sources. Tolerance on all timing is
16%.
Temperature and Voltag e Termination
Hold-off
A hold-off period occurs at the start of fast charging.
During the hold-off period, -
V and T/t termination
are disabled. The MOD pin is enabled at a duty cycle of
260
s active for every 1820s inactive. This modulation
results in an average rate 1/8th that of the fast charge
rate. This avoids premature termination on the voltage
spikes sometimes produced by older batteries when
fast-charge current is first applied. Maximum voltage
and maximum temperature terminations are not af-
fected by the hold-off period.
T/t Termination
The bq2004E/H samples at the voltage at the TS pin
every 34s, and compares it to the value measured two
samples earlier. If V
TEMP
has fallen 16mV
4mV or
more, fast charge is terminated. The
T/t termination
test is valid only when V
TCO
< V
TEMP
< V
LTF
.
Temperature Sampling
Each sample is an average of 16 voltage measurements.
The resulting sample period (18.18ms) filters out har-
monics around 55Hz. This technique minimizes the ef-
fect of any AC line ripple that may feed through the
power supply from either 50Hz or 60Hz AC sources. Tol-
erance on all timing is
16%.
Maximum Voltage, Temperature, and Time
Anytime V
CELL
rises above V
MCV,
the LEDs go off and cur-
rent flow into the battery ceases immediately. If V
CELL
then falls back below V
MCV
before t
MCV
= 1.5s
0.5s, the
chip transitions to the Charge Complete state (maximum
voltage termination). If V
CELL
remains above V
MCV
at the
expiration of t
MCV,
the bq2004E/H transitions to the Bat-
tery Absent state (battery removal). See Figure 3.
Maximum temperature termination occurs anytime
V
TEMP
falls below the temperature cutoff threshold
V
TCO
. Charge will also be terminated if V
TEMP
rises
above the low temperature fault threshold, V
LTF
, after
fast charge begins.
Corresponding
Fast-Charge
Rate
TM1
TM2
Typical
Fast-Charge
Safety
Time (min)
Typical
PVD, -
V
Hold-Off
Time (s)
Top-Off
Rate
Pulse-
Trickle
Rate
Pulse-
Trickle
Period (Hz)
2004E
2004H
2004E
2004H
2004E
2004H
2004E
2004H
2004E
2004H
C/4
C/8
Low
Low
325
650
137
273
Disabled
Disabled
Disabled
C/2
C/4
Float
Low
154
325
546
546
Disabled
C/512
15
30
1C
C/2
High
Low
77
154
273
546
Disabled
C/512
7.5
15
2C
1C
Low
Float
39
77
137
273
Disabled
C/512
3.75
7.5
4C
2C
Float
Float
19
39
68
137
Disabled
C/512
1.88
3.75
C/2
C/4
High
Float
154
325
546
546
C/16
C/32
C/512
15
30
1C
C/2
Low
High
77
154
273
546
C/8
C/16
C/512
7.5
15
2C
1C
Float
High
39
77
137
273
C/4
C/18
C/512
3.75
7.5
4C
2C
High
High
19
39
68
137
C/2
C/4
C/512
1.88
3.75
Note: Typical conditions = 25C, V
CC
= 5.0V.
Table 1. Fast Charge Safety Time/Hold-Off/Top-Off Table
bq2004E/H
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