www.docs.chipfind.ru
Features
Accurate measurement of avail-
able capacity in Lithium Ion bat-
teries
Provides a low-cost battery man-
agement solution for pack
integration
-
Complete circuit can fit in as
little as
1
2
square inch of PCB
-
Low operating current (120
A
typical)
-
Less than 100nA of data
retention current
High-speed (5kb) single-wire
communication interface (HDQ
bus) for critical battery
parameters
Monitors and controls charge FET
in Li-Ion pack protection circuit
Direct drive of remaining capacity
LEDs
Measurements automatically
compensated for rate and
temperature
16-pin narrow SOIC
General Description
The bq2050H Lithium Ion Power
GaugeTM IC is intended for battery-
pack or in-system installation to
maintain an accurate record of
available battery capacity. The IC
monitors a voltage drop across a
sense resistor connected in series
between the negative battery termi-
n a l a n d g r o u n d t o d e t e r m i n e
charge and discharge activity of
the battery. Compensations for bat-
tery temperature, self discharge,
and rate of discharge are applied to
the charge counter to provide avail-
able capacity information across a
wide range of operating conditions.
Battery capacity is automatically re-
calibrated, or "learned," in the
course of a discharge cycle from full
to empty.
Nominal available capacity may be
directly indicated using a five-
segment LED display. These seg-
ments are used to graphically indi-
c a t e
a v a i l a b l e
c a p a c i t y .
T h e
bq2050H also supports a simple
single-line bidirectional serial link
to an external processor (common
ground). The 5kb HDQ bus interface
reduces communications overhead
in the external microcontroller.
Internal registers include available
capacity, temperature, scaled avail-
able energy, battery ID, battery
status, and Li-Ion charge FET
status. The external processor may
also overwrite some of the bq2050H
power gauge data registers.
The bq2050H can operate from the
batteries in the pack. The REF out-
put and an external transistor allow
a simple, inexpensive voltage regu-
lator to supply power to the circuit
from the cells.
1
bq2050H
LCOM
LED common output
SEG
1
/PROG
1
LED segment 1/
program 1 input
SEG
2
/PROG
2
LED segment 2/
program 2 input
SEG
3
/PROG
3
LED segment 3/
program 3 input
SEG
4
/PROG
4
LED segment 4/
program 4 input
SEG
5
/PROG
5
LED segment 5/
program 5 input
CFC
Charge FET control
output
1
PN2050H1.eps
16-Pin Narrow SOIC
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC
REF
PSTAT
HDQ
RBI
SB
DISP
SR
LCOM
SEG1/PROG1
SEG2/PROG2
SEG3/PROG3
SEG4/PROG4
SEG5/PROG5
CFC
VSS
V
SS
System ground
SR
Sense resistor input
DISP
Display control input
SB
Battery sense input
RBI
Register backup input
HDQ
Serial communications
input/output
PSTAT
Protector status input
REF
Voltage reference output
V
CC
Supply voltage
Pin Connections
SLUS150MAY 1999 D
Low-Cost Lithium Ion Power GaugeTM IC
Pin Names
Pin Descriptions
LCOM
LED common output
This open-drain output switches V
CC
to
source current for the LEDs. The switch is
off during initialization to allow reading of
the soft pull-up or pull-down program resis-
tors. LCOM is also high impedance when the
display is off.
SEG
1
SEG
5
LED display segment outputs (dual func-
tion with PROG
1
PROG
5
)
Each output may activate an LED to sink
the current sourced from LCOM.
PROG
1
PROG
2
Programmed full count selection inputs
(dual function with SEG
1
SEG
2
)
These three-level input pins define the pro-
grammed full count (PFC) thresholds de-
scribed in Table 2.
PROG
3
PROG
4
Power gauge scale selection inputs (dual
function with SEG
3
SEG
4
)
These three-level input pins define the scale
factor described in Table 2.
PROG
5
Self-discharge rate selection (dual func-
tion with SEG
5
)
This three-level input pin defines
the
self-discharge and battery compensation fac-
tors as shown in Table 1.
CFC
Charge FET control output
This pin can be used as an additional control
to the charge FET of the Li-Ion pack protec-
tion circuitry.
V
SS
Ground
SR
Sense resistor input
The voltage drop (V
SR
) across the sense re-
sistor R
S
is monitored and integrated over
time to interpret charge and discharge activ-
ity. The SR input is tied between the nega-
tive terminal of the battery and the sense re-
sistor. V
SR
< V
SS
indicates discharge, and
V
SR
> V
SS
indicates charge.
The effective
voltage drop, V
SRO
, as seen by the bq2050H
is V
SR
+ V
OS
.
DISP
Display control input
DISP high disables the LED display. DISP
tied to V
CC
allows PROG
X
to connect di-
rectly to V
CC
or V
SS
instead of through a
pull-up or pull-down resistor. DISP floating
allows the LED display to be active during
charge. DISP low activates the display. See
Table 1.
SB
Secondary battery input
This input monitors the battery cell voltage
potential through a high-impedance resis-
tive divider network for end-of-discharge
voltage (EDV) thresholds and battery-removed
detection.
RBI
Register backup input
This pin is used to provide backup potential to
the bq2050H registers during periods when
V
CC
3V. A storage capacitor or a battery
can be connected to RBI.
HDQ
Serial communication input/output
This is the open-drain bidirectional commu-
nications port.
PSTAT
Protector status input
This input provides overvoltage status from
the Li-Ion protector circuit. It should con-
nect to V
SS
when not used.
REF
Voltage reference output for regulator
REF provides a voltage reference output for
an optional micro-regulator.
V
CC
Supply voltage input
2
bq2050H
Functional Description
General Operation
The bq2050H determines battery capacity by moni-
toring the amount of current input to or removed
from a rechargeable battery.
The bq2050H meas-
ures discharge and charge currents, measures bat-
tery voltage, estimates self-discharge, monitors the
battery for low battery-voltage thresholds, and com-
pensates for temperature and discharge rate. Cur-
rent measurement is measured by monitoring the
voltage across a small-value series sense resistor be-
tween the negative battery terminal and ground.
Scaled available energy is estimated using the re-
maining average battery voltage during the dis-
charge cycle and the remaining nominal available
capacity. The scaled available energy measurement
is corrected for environmental and operating condi-
tions.
Figure 1 shows a typical battery pack application of the
bq2050H using the LED display capability as a charge-
state indicator. The bq2050H is configured to display
capacity in relative display mode. The relative display
mode uses the last measured discharge capacity of the
battery as the battery "full" reference. A push-button
display feature is available for momentarily enabling
the LED display.
The bq2050H monitors the charge and discharge cur-
rents as a voltage across a sense resistor. (See R
S
in Fig-
ure 1.) A filter between the negative battery terminal
and the SR pin is required.
3
bq2050H
FG2050H1.eps
CFC
SEG5/PROG5
SEG4/PROG4
SEG3/PROG3
SEG2/PROG2
SEG1/PROG1
SR
DISP
SB
VCC
REF
bq2050H
Power Gauge IC
LCOM
VSS
RBI
HDQ
VCC
C1
C2
Q1
ZVNL110A
R1
RS
RB1
RB2
See note 4
Load
Charger
1. Indicates optional.
2. Programming resistors and ESD-protection diodes are not shown.
3. RC on SR is required.
4. A series diode is required on RBI if the bottom series cell is used as the backup source.
If the cell is used, the backup capacitor is not required, and the anode is connected to the
positive terminal of the cell.
100K
PSTAT
Notes:
0.1
F
Figure 1. Battery Pack Application Diagram--LED Display
Voltage Thresholds
In conjunction with monitoring V
SR
for charge/discharge
currents, the bq2050H monitors the battery potential
through the SB pin. The voltage is determined through
a resistor-divider network per the following equation:
RB1
RB2
4N
=
- 1
where N is the number of cells, RB1 is connected to the
positive battery terminal, and RB2 is connected to the
negative battery terminal. The single-cell battery volt-
age is monitored for the end-of-discharge voltage (EDV)
thresholds. The EDV threshold levels are used to deter-
mine when the battery has reached an "empty" state.
The EDV thresholds for the bq2050H are programmable
with the default values fixed at:
EDV1 (first) = 0.76V
EDVF (final) = EDV1-0.025V = 0.735V
If V
SB
is below either of the two EDV thresholds, the as-
sociated flag is latched and remains latched, independ-
ent of V
SB
, until the next valid charge. The V
SB
value is
also available over the serial port.
During discharge and charge, the bq2050H monitors
V
SR
for various thresholds used to compensate the
charge counter. EDV monitoring is disabled if the dis-
charge rate is greater than 2C (OVLD Flag = 1) and re-
sumes
1
2
second after the rate falls below 2C.
RBI Input
The RBI input pin is intended to be used with a storage
capacitor or external supply to provide backup potential
to the internal bq2050H registers when V
CC
drops below
3.0V. V
CC
is output on RBI when V
CC
is above 3.0V. If us-
ing an external supply (such as the bottom series cell) as
the backup source, an external diode is required for isola-
tion.
Reset
The bq2050H can be reset by removing V
CC
and ground-
ing the RBI pin for 15 seconds or by commands over the
serial port. The serial port reset command sequence re-
quires writing 00h to register PPFC (address = 1Eh) and
then writing 00h to register LMD (address = 05h).
Temperature
The bq2050H internally determines the temperature in
10C steps centered from approximately -35C to +85C.
The temperature steps are used to adapt charge and dis-
charge rate compensations, self-discharge counting, and
available charge display translation. The temperature
range is available over the serial port in 10C incre-
ments as shown in the following table:
Layout Considerations
The bq2050H measures the voltage differential between
the SR and V
SS
pins. V
OS
(the offset voltage at the SR
pin) is greatly affected by PC board layout. For optimal
results, the PC board layout should follow the strict rule
of a single-point ground return. Sharing high-current
ground with small signal ground causes undesirable
noise on the small signal nodes. Additionally:
I
The capacitors (C1 and C2) should be placed as
close
as
possible
to
the
V
CC
and
SB
pins,
respectively, and their paths to V
SS
should be as
short as possible. A high-quality ceramic capacitor
of 0.1
F is recommended for V
CC
.
I
The sense-resistor capacitor should be placed as close
as possible to the SR pin.
I
The sense resistor (R
S
) should be as close as possible to
the bq2050H.
4
bq2050H
TMP (hex)
Temperature Range
0x
< -30C
1x
-30C to -20C
2x
-20C to -10C
3x
-10C to 0C
4x
0C to 10C
5x
10C to 20C
6x
20C to 30C
7x
30C to 40C
8x
40C to 50C
9x
50C to 60C
Ax
60C to 70C
Bx
70C to 80C
Cx
> 80C
Gas Gauge Operation
The operational overview diagram in Figure 2 illustrates
the operation of the bq2050H. The bq2050H accumu-
lates a measure of charge and discharge currents, as
well as an estimation of self-discharge.
The accumu-
lated charge and discharge currents are adjusted for
temperature and rate to provide the indication of com-
pensated available capacity to the host system or user.
The main counter, Nominal Available Capacity (NAC),
represents the available battery capacity at any given
time.
Battery charging increments the NAC register,
while battery discharging and self-discharge decrement
the NAC register and increment the DCR (Discharge
Count Register).
The Discharge Count Register is used to update the Last
Measured Discharge (LMD) register only if a complete
battery discharge from full to empty occurs without any
partial battery charges. Therefore, the bq2050H adapts
its capacity determination based on the actual condi-
tions of discharge.
The battery's initial capacity equals the Programmed
Full Count (PFC) shown in Table 2. Until LMD is up-
dated, NAC counts up to but not beyond this threshold
during subsequent charges. This approach allows the
gas gauge to be charger-independent and compatible
with any type of charge regime.
1.
Last Measured Discharge (LMD) or learned
battery capacity:
LMD is the last measured discharge capacity of the
battery. On initialization (application of V
CC
or bat-
tery replacement), LMD = PFC. During subsequent
discharges, the LMD is updated with the latest
measured capacity in the Discharge Count Register
representing a discharge from full to below EDV1.
A qualified discharge is necessary for a capacity
transfer from the DCR to the LMD register.
The
LMD also serves as the 100% reference threshold
used by the relative display mode.
5
bq2050H
FG2050H2.eps
Temperature
Compensation
Charge
Current
Discharge
Current
Self-Discharge
Timer
Nominal
Available
Charge
(NAC)
Last
Measured
Discharged
(LMD)
Discharge
Count
Register
(DCR)
<
Qualified
Transfer
+
Rate and
Temperature
Compensation
Temperature
Compensation
Temperature Step,
Other Data
+
-
-
+
Inputs
Main Counters
and Capacity
Reference (LMD)
Outputs
Serial
Port
Compensated
Available Charge
LED Display, etc.
Rate and
Temperature
Compensation
Figure 2. Operational Overview
PDF 
ZIP