bq24010, bq24012, bq24013, bq24014
SLUS530F - SEPTEMBER 2002 - REVISED AUGUST 2005
SINGLE CHIP, LI ION CHARGE MANAGEMENT IC FOR
HANDHELD APPLICATIONS (bqTINYt)
FEATURES
D
Small 3 mm
3 mm MLP (QFN) Package
D
Ideal for Low-Dropout Designs for Single-Cell
Li-Ion or Li-Pol Packs in Space Limited
Applications
D
Integrated Power FET and Current Sensor for
Up to 1-A Charge Applications
D
Reverse Leakage Protection Prevents Battery
Drainage
D
Integrated Current and Voltage Regulation
D
0.5% Voltage Regulation Accuracy
D
Charge Termination by Minimum Current
and Time
D
Precharge Conditioning With Safety Timer
D
Status Outputs for LED or System Interface
Indicates Charge and Fault Conditions
D
Battery Insertion and Removal Detection
D
Works With Regulated and Unregulated
Supplies
D
Short-Circuit Protection
APPLICATIONS
D
Cellular Phones
D
PDAs, MP3 Players
D
Digital Cameras
D
Internet Appliances
DESCRIPTION
The bqTINY
t
series are highly integrated Li-Ion and
Li-Pol linear charge management devices targeted at
space limited portable applications. The bqTINY
t
series offer integrated powerFET and current sensor,
reverse blocking protection, high accuracy current and
voltage regulation, charge status, and charge
termination, in a small package.
The bqTINY
t
charges the battery in three phases:
conditioning, constant current, and constant voltage.
Charge is terminated based on minimum current. An
internal charge timer provides a backup safety feature
for charge termination. The bqTINY
t
automatically
re-starts the charge if the battery voltage falls below an
internal threshold. The bqTINY
t
automatically enters
sleep mode when V
CC
supply is removed.
In addition to the standard features, different versions
of the bqTINY
t
offer a multitude of additional features.
These include temperature sensing input for detecting
hot or cold battery packs; power good (PG) output
indicating the presence of valid input power; a
TTL-level charge-enable input (CE) used to disable or
enable the charge process; and a TTL-level timer and
termination enable (TTE) input used to disable or
enable the fast-charge timer and charge termination.
UDG-02106
RSET
1
2
3
4
10
9
8
5
IN
VCC
OUT
VSS
STAT1
STAT2
7
6
BAT
PG
ISET
bq24012DRC
+
BATTERY
PACK
PACK+
PACK-
SYSTEM
SYSTEM
INTERFACE
CE
AC ADAPTER
bqTINY is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
www.ti.com
Copyright
2002-2005, Texas Instruments Incorporated
bq24010, bq24012, bq24013, bq24014
SLUS530F - SEPTEMBER 2002 - REVISED AUGUST 2005
www.ti.com
2
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
TA
CHARGE
REGULATION
VOLTAGE (V)(1)
OPTIONAL
FUNCTIONS(1)
PART NUMBER(2)
MARKINGS
4.2
PG and TS
bq24010DRCR
AZN
4.2
PG and CE
bq24012DRCR
AZP
-40
C to 125
C
4.2
CE and TTE
bq24013DRCR
AZQ
-40 C to 125 C
4.2
CE and TS
bq24014DRCR
AZR
4.2
CE and TS
bq24014DRCT
AZR
(1) Contact Texas Instruments for other options.
(2) The DRC package is available only taped and reeled. Quantities are 3,000 devices per reel (e.g. bq24010DRCR) and 250 devices per mini-reel
(e.g. bq24014DRCT).
DISSIPATION RATINGS
PACKAGE
JA
TA < 40
C
POWER RATING
DERATING FACTOR
ABOVE TA = 40
C
DRC(1)
47
C/W
1.5 W
0.021 W/
C
(1) This data is based on using the JEDEC High-K board and the exposed die pad is connected to a copper pad on the board. This is connected to the
ground plane by a 2x3 via matrix.
ABSOLUTE MAXIMUM RATINGS
(1)
UNIT
Supply voltage range, (VCC all with respect to VSS)
-0.3 to 18
V
Input voltage range(2)
IN, STAT1, STAT2, TS, PG, CE, TTE
-0.3 to VCC
V
Input voltage range(2)
BAT, OUT, ISET
-0.3 to 7
VDC
Voltage difference between VCC and IN inputs
VCC - VIN
0.5
V
Output sink/source current
STAT1, STAT2, PG
15
mA
Output current
IN, OUT
1.5
A
Operating free-air temperature range, TA
-40 to 125
Junction temperature range, TJ
-40 to 125
C
Storage temperature, Tstg
-65 to 150
C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
300
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are DC and with respect to VSS.
RECOMMENDED OPERATING CONDITIONS
(1)
MIN
NOM
MAX
UNIT
Supply voltage(1), VCC
3.0
16.5
V
Input voltage(1), VIN
3.0
16.5
V
Operating junction temperature range, TJ
-40
125
C
(1) Pins VCC and IN must be tied together.
bq24010, bq24012, bq24013, bq24014
SLUS530F - SEPTEMBER 2002 - REVISED AUGUST 2005
www.ti.com
3
ELECTRICAL CHARACTERISTICS
over 0
_
C
TJ
125
_
C and recommended supply voltage, unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT CURRENT
VCC current, ICC(VCC)
VCC > VCC(min), STATx pins in OFF state
0
3.5
5
mA
Sleep current, ICC(SLP)
Sum of currents into OUT and BAT pins,
VCC < V(SLP)
5
A
Input bias current on BAT pin, IIB(BAT)
500
nA
Input current on TS pin, IIB(TS)
VI(TS)
10 V
1
Input current on CE pin, IIB(CE)
1
A
Input bias current on TTE pin, IIB(TTE)
1
A
VOLTAGE REGULATION VO(REG) + V(DO-MAX)
VCC , I(TERM) < IO(OUT)
1 A
Output voltage, VO(REG)
4.20
V
Voltage regulation accuracy
TA = 25
_
C
-0.5%
0.5%
Voltage regulation accuracy
-1%
1%
Dropout voltage (V(IN) - V(OUT)), V(DO)
VO(REG) + V(DO-MAX))
VCC, IO(OUT) = 1A
650
790
mV
CURRENT REGULATION
Output current range, IO(OUT) (1)
VCC
4.5 V, VIN
4.5 V, VI(BAT) > V(LOWV),
VIN - VI(BAT) > V(DO-MAX)
100
1000
mA
Output current set voltage, V(SET)
Voltage on ISET pin, VCC
4.5 V, VIN
4.5 V,
VI(BAT) > V(LOWV), VIN - VI(BAT) > V(DO-MAX)
VO(REG) = 4.2 V
2.45
2.50
2.55
V
50 mA
IO(OUT)
1000 mA, VI(ISET)
V(TAPER)
315
335
355
Output current set factor, K(SET)
10 mA
IO(OUT) < 50 mA, VI(ISET)
V(TAPER)
315
372
430
Output current set factor, K(SET)
10 mA
IO(OUT) < 50 mA, VI(ISET) < V(TAPER)
350
1000
PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION
Precharge to fast-charge transition
threshold, V(LOWV)
Voltage on BAT pin
2.80
2.95
3.10
V
Precharge to short-circuit transition
threshold, V(SC)
Voltage on BAT pin
1.0
1.4
1.8
V
Precharge range, IO(PRECHG)(2)
V(SC) < VI(BAT) < V(LOWV), t < t(PRECHG)
10
100
mV
Precharge set voltage, V(PRECHG)
Voltage on ISET pin, V(SC) < VI(BAT) < V(LOWV)
225
250
280
mV
Short circuit current, ISC
V(SC) > VI(BAT)
660
900
1200
A
CHARGE TAPER AND TERMINATION DETECTION
Charge taper detection range, I(TAPER)(3)
VI(BAT) > V(RCH), t < t(TAPER)
10
100
mA
Charge taper detection set voltage,
V(TAPER)
Voltage on ISET pin, VI(BAT) > V(RCH),
t < t(TAPER), VI(BAT) = VO(REG)
225
250
275
mV
Charge termination detection set voltage,
V(TERM)
Voltage on ISET pin, VI(BAT) = VO(REG),
VI(BAT) > V(RCH), I(TERM) = K(SET)
V(TERM) /R(SET)
5.0
17.5
50.0
mV
TEMPERATURE COMPARATOR
Lower threshold, V(TS1)
Voltage on TS pin
29
30
31
Upper threshold, V(TS2)
Voltage on TS pin
60
61
62
%VCC
Hysteresis
1
%VCC
(1)
I
O(OUT)
+
K
(SET)
V
(SET)
R
SET
(2)
I
O(PRECHG)
+
K
(SET)
V
(PRECHG)
R
SET
(3)
I
O(TAPER)
+
K
(SET)
V
(TAPER)
R
SET
bq24010, bq24012, bq24013, bq24014
SLUS530F - SEPTEMBER 2002 - REVISED AUGUST 2005
www.ti.com
4
ELECTRICAL CHARACTERISTICS (continued)
over 0
_
C
TJ
125
_
C and recommended supply voltage, unless otherwise noted
PARAMETER
UNIT
MAX
TYP
MIN
TEST CONDITIONS
BATTERY RECHARGE THRESHOLD
Recharge threshold, V(RCH)
VO(
REG
)
-0.135
VO(
REG
)
-0.1
VO(
REG
)
-0.075
V
STAT1, STAT2, and PG OUTPUTS
Output (low) saturation voltage, VOL
IO = 10 mA
0.5
V
CHARGE ENABLE (CE) AND TIMER AND TERMINATION ENABLE (TTE) INPUTS
Low-level input voltage, VIL
IIL = 1
A
0
0.8
V
High-level input voltage, VIH
IIH = 1
A
2.0
V
TIMERS
Precharge time, t(PRECHG)
1,548
2,065
2,581
Taper time, t(TAPER)
1,548
2,065
2,581
s
Charge time, t(CHG)
15,480
20,650
25,810
s
SLEEP COMPARATOR
Sleep mode entry threshold voltage, VSLP
VPOR
V(IBAT)
VO(REG)
VCC
VI(BAT)
+30 mV
V
Sleep mode exit threshold voltage
VPOR
V(IBAT)
VO(REG)
VCC
VI(BAT)
+22 mV
V
Sleep mode deglitch time
VCC decreasing below threshold, 100 ns fall time,
10 mV overdrive
250
650
ms
BATTERY DETECTION THRESHOLDS
Battery detection current, I(DETECT)
2 V
V(IBAT)
V(RCH)
-3.1
-4.6
-6.1
mA
Battery detection time, t(DETECT)
2 V
V(IBAT)
V(RCH)
100
125
150
ms
Fault current, I(FAULT)
V(IBAT) < V(RCH) and/or t > t(PRECHG)
660
900
1200
A
POWER-ON RESET AND INPUT VOLTAGE RAMP RATE
Power-on reset threshold voltage, V
POR
(4)
2.25
2.5
2.75
V
(4)
Ensured by design. Not production tested.
bq24010, bq24012, bq24013, bq24014
SLUS530F - SEPTEMBER 2002 - REVISED AUGUST 2005
www.ti.com
5
DRC PACKAGE
(TOP VIEW)
VSS
5
STAT2
4
STAT1
3
VCC
2
IN
1
6
7
8
9
10
ISET
PG
TS
BAT
OUT
bq24010DRC
DRC PACKAGE
(TOP VIEW)
VSS
5
STAT2
4
STAT1
3
VCC
2
IN
1
6
7
8
9
10
ISET
PG
CE
BAT
OUT
bq24012DRC
DRC PACKAGE
(TOP VIEW)
VSS
5
STAT2
4
STAT1
3
VCC
2
IN
1
6
7
8
9
10
ISET
CE
TTE
BAT
OUT
bq24013DRC
DRC PACKAGE
(TOP VIEW)
VSS
5
STAT2
4
STAT1
3
VCC
2
IN
1
6
7
8
9
10
ISET
CE
TS
BAT
OUT
bq24014DRC
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