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FEATURES
DESCRIPTION
APPLICATIONS
1
2
3
4
10
9
8
5
AC
USB
OUT
VSS
STAT1
STAT2
7
6
TS
ISET2
ISET1
bq24020DRC
+
BATTERY PACK
PACK+
PACK-
SYSTEM
SYSTEM
INTERFACE
VDC
GND
VBUS
GND
D+
D -
USB
PORT
AC
ADAPTER
UDG-02184
R
SET
CE
bq24020
,
,
bq24022
,
,
bq24023
bq24024, bq24025, bq24026
bq24027
SLUS549D DECEMBER 2002 REVISED MARCH 2006
SINGLE-CHIP, LI-ION AND LI-POL CHARGER IC WITH AUTONOMOUS USB-PORT AND
AC-ADAPTER SUPPLY MANAGEMENT (bqTINYTM-II)
Small 3 mm x 3 mm MLP Package
The bqTINY-II series are highly-integrated, flexible
Li-Ion linear charge and system power management
Charges and powers Systems from Either AC
devices for space-limited charger applications. In a
Adapter or USB With Autonomous
single
monolithic
device,
the
bqTINY-II
offers
power-Source Selection
integrated
USB-port
and
ac-adapter
supply
Integrated USB Control With Selectable 100
management
with
autonomous
power-source
mA and 500 mA Charge Rates
selection, power-FET and current-sensor interfaces,
Ideal for Low-Dropout Charger Designs for
high-accuracy current and voltage regulation, charge
status, and charge termination.
Single-Cell Li-Ion or Li-pol Packs in Space
Limited portable applications
The bqTINY-II automatically selects the USB-port or
Integrated power FET and Current Sensor for
the ac-adapter as the power source for the system.
Up to 1-A Charge applications From AC
In the USB configuration, the host can select from
two preset charge rates of 100 mA or 500 mA. In the
Adapter
ac-adapter configuration, an external resistor sets
Precharge Conditioning With Safety Timer
the system or charge current.
power Good (AC Adapter Present) Status
The bqTINY-II charges the battery in three phases:
Output
conditioning, constant current, and constant voltage.
Optional Battery Temperature Monitoring
Charge is terminated based on minimum current. An
Before and During Charge
internal charge timer provides a backup safety for
Automatic Sleep Mode for Low-power
charge termination. The bqTINY-II automatically
restarts the charge if the battery voltage falls below
Consumption
an internal threshold. The bqTINY-II automatically
enters sleep mode when both supplies are removed.
PDAs, MP3 Players
Digital Cameras
Internet appliances
Smartphones
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
bqTINY is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 20022006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
www.ti.com
Different versions of the bqTINY-II offer many additional features. These include a temperature-sensor input for
Dissipation Ratings
ABSOLUTE MAXIMUM RATINGS
(1)
bq24020
,
,
bq24022
,
,
bq24023
bq24024, bq24025, bq24026
bq24027
SLUS549D DECEMBER 2002 REVISED MARCH 2006
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
detecting hot or cold battery packs, a power-good output (PG) indicating the presence of input power, a
TTL-level charge-enable input (CE) used to disable or enable the charge process, and a TTL-level timer and
taper-detect enable input (TTE) used to disable or enable the fast-charge timer and charge termination.
ORDERING INFORMATION
CHARGE
OPTIONAL
FAST-CHARGE
TAPER
USB TAPER
PART
T
J
REGULATION
MARKINGS
FUNCTIONS
(1)
TIMER (Hours)
TIMER
THRESHOLD
NUMBER(2)
VOLTAGE (V)(1)
4.2
CE and TS
5
Yes
10% of ISET1 Level
bq24020DRCR
AZS
4.2
PG and CE
5
Yes
10% of ISET1 Level
bq24022DRCR
AZU
4.2
CE and TTE
5
Yes
10% of ISET1 Level
bq24023DRCR
AZV
40C
4.2
TTE and TS
5
Yes
10% of ISET1 Level
bq24024DRCR
AZW
to
4.2
CE and TS
7
Yes
10% of ISET1 Level
bq24025DRCR
AZX
125C
10% of selected
4.2
TE and TS
7
No
bq24026DRCR
ANR
USB charge rate
10% of selected
4.2
PG and CE
7
No
bq24027DRCR
ANS
USB charge rate
(1)
The DRC package is available taped and reeled only in quantities of 3,000 devices per reel.
PACKAGE
JA
T
A
< 40C POWER RATING
DERATING FACTOR ABOVE T
A
= 25C
DRC
(1)
46.87 C/W
1.5 W
0.021 W/C
(1)
This data is based on using the JEDEC High-K board and the exposed die pad is connected to a copper pad on the board. This is
connected to the ground plane by a 2x3 via matrix.
over operating free-air temperature range (unless otherwise noted)
bq24020, bq24022,
UNIT
bq24023, bq24024
bq24025, bq24026
bq24027
Input voltage
(2)
AC, CE, ISET1, ISET2, OUT, PG, STAT1, STAT2, TE, TS, TTE, USB
0.3 to 7.0
V
Output sink/source current
STAT1, STAT2, PG
15
mA
Output current
TS
200
A
Output current
OUT
1.5
A
Operating free-air temperature range, T
A
40 to 125
Junction temperature range, T
J
C
Storage temperature, T
stg
65 to 150
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
300
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltages are with respect to V
SS
.
2
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(1)
I
O(OUT)
+
K
(SET)
V
(SET)
R
SET
RECOMMENDED OPERATING CONDITIONS
ELECTRICAL CHARACTERISTICS
bq24020
,
,
bq24022
,
,
bq24023
bq24024, bq24025, bq24026
bq24027
SLUS549D DECEMBER 2002 REVISED MARCH 2006
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
Supply voltage (from AC input), V
CC
4.5
6.5
V
Supply voltage (from USB input), V
CC
4.35
6.5
V
Operating junction temperature range, T
J
40
125
C
over 0C
T
J
125C and recommended supply voltage, unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT CURRENT
I
CC
(V
CC
)
V
CC
current
V
CC
> V
CC(min)
1.2
2.0
mA
I
CC(SLP)
Sleep current
Sum of currents into OUT pin, V
CC
< V
(SLP)
2
5
I
CC(STBY)
Standby current
CE = High
0C
T
J
85C
1
150
II
B(OUT)
Input current on OUT pin
Charge DONE
V
CC
> V
CC(MIN)
5
A
II
B(CE)
Input current on CE pin
1
II
B(TTE)
Input bias current on TTE pin
1
II
B(TE)
Input bias current on TE pin
1
VOLTAGE REGULATION V
O(REG)
+ V
(DO-MAX)
V
CC
, I
(TERM)
< I
O(OUT)
1 A
V
O(REG)
Output voltage,
4.20
V
T
A
= 25C
0.35%
0.35%
Voltage regulation accuracy
1%
1%
V
O(OUT)
= V
O(REG)
I
O(OUT)
= 1A
350
500
V
(DO)
AC dropout voltage (V
(AC)
V
(OUT)
)
V
O(REG)
+ V
(DO-MAX)
)
V
CC
V
O(OUT)
= V
O(REG)
ISET2 = High
350
500
mV
V
O(REG)
+ V
(DO-MAX)
)
V
CC
USB dropout voltage
V
(DO)
(V
(USB)
V
(OUT)
)
V
O(OUT)
= V
O(REG)
ISET2 = Low
60
100
V
O(REG)
+ V
(DO-MAX)
)
V
CC
CURRENT REGULATION
V
I(OUT)
> V
(LOWV)
V
CC
4.5 V
50
1000
I
O(OUT)
AC output current range
(1)
V
I(AC)
V
I(OUT)
> V
(DO-MAX)
V
CC(MIN)
4.5 V
V
I(OUT)
> V
(LOWV)
80
100
mA
V
USB
V
I(OUT)
> V
(DO-MAX)
ISET2 = Low
I
O(OUT)
USB output current range
V
CC(MIN
)
4.5 V
V
I(OUT)
> V
(LOWV)
400
500
V
USB
V
I(OUT)
> V
(DO-MAX)
ISET2 = High
Voltage on ISET1 pin, V
CC
4.5 V, V
IN
4.5 V,
2.463
2.500
2.538
V
(SET)
Output current set voltage
V
V
I(OUT)
> V
(LOWV)
, V
IN
V
I(OUT)
> V
(DO-MAX)
50 mA
I
O(OUT)
1 A
307
322
337
K
(SET)
Output current set factor
10 mA
I
O(OUT)
< 50 mA
296
320
346
1 mA
I
O(OUT)
< 10 mA
246
320
416
3
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(2)
I
O(PRECHG)
+
K
(SET)
V
(PRECHG)
R
SET
(3)
I
O(TAPER)
+
K
(SET)
V
(TAPER)
R
SET
(4)
I
O(TERM)
+
K
(SET)
V
(TERM)
R
SET
bq24020
,
,
bq24022
,
,
bq24023
bq24024, bq24025, bq24026
bq24027
SLUS549D DECEMBER 2002 REVISED MARCH 2006
ELECTRICAL CHARACTERISTICS (continued)
over 0C
T
J
125C and recommended supply voltage, unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION
Precharge to fast-charge
Voltage on OUT pin
2.8
3.0
3.2
V
(LOWV)
V
transition threshold
Deglitch time for fast-charge to
V
CC(MIN)
4.5 V, t
FALL
= 100 ns, 10 mV
250
375
500
ms
precharge transition
overdrive, V
I(OUT)
decreasing below threshold
I
O(PRECHG)
Precharge range
(2)
0 V < V
I(OUT)
< V
(LOWV)
, t < t
(PRECHG)
5
100
mA
Voltage on ISET1 pin
V
O(REG)
= 4.2 V
240
255
270
V
(PRECHG)
Precharge set voltage
mV
0 V < V
I(OUT)
> V
(LOWV)
,
t < t
(PRECHG)
CHARGE TAPER AND TERMINATION DETECTION
I
(TAPER)
Charge taper detection range
(3)
V
I(OUT)
> V
(RCH)
, t < t
(TAPER)
5
100
USB-100 charge taper
V
I(OUT)
> V
(RCH)
, ISET2 = Low
6.5
9
11
bq24026
detection level
mA
USB-500 charge taper
V
I(OUT)
> V
(RCH)
, ISET2 = High
32
44
55
bq24026
detection level
Voltage on ISET1 pin, V
O(REG)
= 4.2 V,
235
250
265
V
(TAPER)
Charge taper detection set voltage
V
I(OUT)
> V
(RCH)
, t < t
(TAPER)
mV
Charge termination detection
Voltage on ISET1 pin, V
O(REG)
= 4.2 V,
11
18
25
V
(TERM)
set voltage
(4)
V
I(OUT)
> V
(RCH)
V
CC(MIN)
4.5 V, t
FALL
= 100 ns charging
250
375
500
t
(TPRDET)
Deglitch time for TAPER detection
current increasing or decreasing above and
below, 10 mV overdrive
ms
Deglitch time for
V
CC(MIN)
4.5 V, t
FALL
= 100 ns charging
250
375
500
t
(TRMDET)
termination detection
current decreasing below, 10 mV overdrive
TEMPERATURE SENSE COMPARATOR
V
(HTF)
High-voltage threshold
PTC thermistor
2.475
2.500
2.525
V
V
(LTF)
Low-voltage threshold
PTC thermistor
0.485
0.500
0.515
I
(TS)
Current source
96
102
108
A
t
(DEGL)
Deglitch time for temperature fault
250
375
500
ms
4
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bq24020
,
,
bq24022
,
,
bq24023
bq24024, bq24025, bq24026
bq24027
SLUS549D DECEMBER 2002 REVISED MARCH 2006
ELECTRICAL CHARACTERISTICS (continued)
over 0C
T
J
125C and recommended supply voltage, unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
BATTERY RECHARGE THRESHOLD
V
O(REG)
V
O(REG)
V
O(REG)
V
RCH
Recharge threshold
V
0.115
0.10
0.085
V
CC(MIN)
4.5 V, t
FALL
= 100 ns decreasing
250
375
500
t
(DEGL)
Deglitch time for recharge detect
below or increasing above threshold,
ms
10 mV overdrive
STAT1, STAT2, and PG OUTPUTS
V
OL
Low-level output saturation voltage I
O
= 5 mA
0.25
V
ISET2, CHARGE ENABLE (CE), TIMER AND TERMINATION ENABLE (TTE), AND TIMER ENABLE (TE) INPUTS
V
IL
Low-level input voltage
I
IL
= 10
A
0
0.4
V
V
IH
High-level input voltage
I
IL
= 20
A
1.4
CE, TE or TTE low-level
1
II
L
input current
CE, TE or TTE high-level
1
II
H
A
input current
I
IL
ISET2 low-level input current
I
ISET2
= 0
20
I
IH
ISET2 high-level input current
I
ISET2
= V
CC
40
I
IH
ISET2 high-Z input current
1
V
TIMERS
t
(PRECHG)
Precharge time
1,620
1,800
1,930
bq24020
1,620
1,800
1,930
bq24022
t
(TAPER)
Taper time
bq24023
bq24024
bq24025
s
bq24020
16,200
18,000
19,300
bq24022
bq24023
bq24024
t
(CHG)
Charge time
bq24025
22,680
25,200
27,720
bq24026
bq24027
I
(FAULT)
Timer fault recovery current
200
A
SLEEP COMPARATOR
V
CC
Sleep-mode entry
V
(SLP)
2.3 V
V
I(OUT)
V
O(REG)
V
I(OUT)
threshold voltage
+80 mV
V
V
CC
Sleep mode exit
V
(SLPEXIT)
2.3 V
V
I(OUT)
V
O(REG)
V
I(OUT)
threshold voltage
+190mV
AC and USB decreasing below threshold,
Sleep mode deglitch time
250
375
500
ms
t
FALL
= 100 ns, 10 mV overdrive
THERMAL SHUTDOWN THRESHOLDS
T
(SHTDWN)
Thermal trip threshold
165
C
Thermal hysteresis
15
UNDERVOLTAGE LOCKOUT
V
(UVLO)
Undervoltage lockout
Decreasing V
CC
2.4
2.5
2.6
V
Hysteresis
27
mV
5
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DRC PACKAGE
(TOP VIEW)
VSS
5
STAT2
4
STAT1
3
USB
2
AC
1
6
7
8
9
10
ISET1
CE
TS
OUT
bq24020DRC
bq24025DRC
DRC PACKAGE
(TOP VIEW)
VSS
5
STAT2
4
STAT1
3
USB
2
AC
1
6
7
8
9
10
ISET1
PG
CE
ISET2
OUT
bq24022DRC
DRC PACKAGE
(TOP VIEW)
VSS
5
STAT2
4
STAT1
3
USB
2
AC
1
6
7
8
9
10
ISET1
CE
TTE
OUT
bq24023DRC
ISET2
ISET2
DRC PACKAGE
(TOP VIEW)
VSS
5
STAT2
4
STAT1
3
USB
2
AC
1
6
7
8
9
10
ISET1
TTE
TS
OUT
bq24024DRC
ISET2
DRC PACKAGE
(TOP VIEW)
VSS
5
STAT2
4
STAT1
3
USB
2
AC
1
6
7
8
9
10
ISET1
TE
TS
OUT
bq24026DRC
ISET2
DRC PACKAGE
(TOP VIEW)
VSS
5
STAT2
4
STAT1
3
USB
2
AC
1
6
7
8
9
10
ISET1
PG
CE
OUT
bq24027DRC
ISET2
bq24020
,
,
bq24022
,
,
bq24023
bq24024, bq24025, bq24026
bq24027
SLUS549D DECEMBER 2002 REVISED MARCH 2006
6
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bq24020
,
,
bq24022
,
,
bq24023
bq24024, bq24025, bq24026
bq24027
SLUS549D DECEMBER 2002 REVISED MARCH 2006
Terminal Functions
TERMINAL
NAME
I/O
DESCRIPTION
bq24020
bq24022
bq24023
bq24024
bq24026
bq24025
bq24027
AC
1
1
1
1
1
I
AC charge input voltage
CE
8
9
8
-
-
I
Charge enable input (active low)
Charge current set point for AC input and precharge and taper
ISET1
6
6
6
6
6
I
set point for both AC and USB
Charge current set point for USB port (high=500 mA, low=100
ISET2
7
7
7
7
7
I
mA, hi-z = disable USB charge)
OUT
10
10
10
10
10
O
Charge current output
PG
-
8
-
-
-
O
powergood status output (active low)
STAT1
3
3
3
3
3
O
Charge status output 1 (open-drain)
STAT2
4
4
4
4
4
O
Charge status output 2 (open-drain)
TE
-
-
-
-
8
I
Timer enable input (active low)
TS
9
-
-
9
9
I
Temperature sense input
TTE
-
-
9
8
-
I
Timer and termination enable input (active low)
USB
2
2
2
2
2
I
USB charge input voltage
VSS
5
5
5
5
5
-
Ground input
There is an internal electrical connection between the
exposed thermal pad and VSS pin of the device. The exposed
Exposed
thermal pad must be connected to the same potential as the
Thermal
pad
pad
pad
pad
pad
-
VSS pin on the printed circuit board. Do not use the thermal
Pad
pad as the primary ground input for the device. VSS pin
must be connected to ground at all times
7
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AC
USB
+
+
OUT
ISET1
REF
BIAS
AND
UVLO
ISET2
CHARGE
CONTROL,
TIMER,
AND
DISPLAY
LOGIC
THERMAL
SHUTDOWN
PRECHARGE
RECHARGE
TAPER
CHG ENABLE
STAT1
STAT2
TERM
CHG
ENABLE
CE
USB
AC
SUSPEND
SLEEP (AC)
SLEEP (USB)
VO(REG)
VSS
TS
500 mA/ 100 mA
USB CHARGE
500 mA/ 100 mA
PRECHARGE
(C/10)
ISET1
*
*
*
*
*
*
*
*
*
SIGNAL DEGLITCHED
I
(TS)
V
(HTF)
V
(LTF)
t
(TAPER)
TIMER
V
I(OUT)
V
I(AC)
V
I(OUT)
V
I(USB)
V
I(OUT)
V
I(OUT)
V
I(SET)
V
I(SET)
V
I(SET)
AC/USB
V
I(ISET-USB)
V
I(SET)
V
I(OUT)
V
I(REG)
V
I(AC)
V
I(USB)
V
I(OUT)
V
I(ISET)
V
I(ISET-USB)
AC/USB
V
(SET)
AC/USB
sensefet
sensefet
sensefet
100 mA/500 mA
V
BAT
UDG-02185
TTE
OR
TE
PG
V
O(REG)
UVLO
bq24020
,
,
bq24022
,
,
bq24023
bq24024, bq24025, bq24026
bq24027
SLUS549D DECEMBER 2002 REVISED MARCH 2006
FUNCTIONAL BLOCK DIAGRAM
8
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TYPICAL CHARACTERISTICS
0
100
0
50
150
50
300
200
350
250
400
450
100
150
I
O(OUT)
= 1000 mA
AC DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
T
J
- Junction Temperature -
_
C
Dropout V
oltage - mV
I
O(OUT)
= 750 mA
I
O(OUT)
= 500 mA
I
O(OUT)
= 250 mA
Regulation
Voltage
Regulation
Current
Minimum
Charge
Voltage
Pre-Conditioning
and Taper Detect
t
(PRECHG)
t
(CHG)
Charge
Voltage
Charge
Current
Charge
Complete
Pre-Conditioning
Phase
Current Regulation
Phase
Voltage Regulation
and Charge Termination Phase
bq24020
,
,
bq24022
,
,
bq24023
bq24024, bq24025, bq24026
bq24027
SLUS549D DECEMBER 2002 REVISED MARCH 2006
Figure 1.
The bqTINY-II supports a precision Li-Ion, Li-pol charging system suitable for single-cell packs.
Figure 3
shows
a typical charge profile, application circuit and
Figure 4
shows an operational flow chart.
Figure 2. Typical Charging Profile
9
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FUNCTIONAL DESCRIPTION
UDG-02184
R
SET
1
2
3
4
10
9
8
5
AC
USB
OUT
VSS
STAT1
STAT2
7
6
ISET2
ISET1
bq24023DRC
PACK+
PACK-
SYSTEM
SYSTEM
INTERFACE
VDC
GND
VBUS
GND
D+
D -
USB PORT
AC ADAPTER
+
TTE
CE
0.1
F
bq24020
,
,
bq24022
,
,
bq24023
bq24024, bq24025, bq24026
bq24027
SLUS549D DECEMBER 2002 REVISED MARCH 2006
Figure 3. Typical Application Circuit
10
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Vcc > V
I(OUT)
checked at all times
V
I(OUT)
<V
(LOWV)
Yes
No
t
(PRECHG)
Expired?
No
Yes
Indicate Fault
Yes
No
Yes
t
(CHG)
Expired?
No
Indicate Charge-
In-Progress
Regulate
I
O(PRECHG)
Indicate Charge-
In-Progress
Regulate Current
or Voltage
No
Reset and Start
t
(PRECHG)
timer
POR
Yes
Reset all timers,
Start t
(CHG)
timer
I
(TERM)
detection?
No
Yes
V
I(OUT)
< V
(RCH)
?
No
V
I(OUT)
<V
(LOWV)
No
Fault Condition
Yes
Yes
Indicate DONE
Turn off charge
Indicate SLEEP
MODE
SLEEP MODE
V
I(OUT)
<V
(LOWV)
I
(TAPER)
detection?
t
(TAPER)
Expired?
No
No
Yes
Yes
No
Yes
V
I(OUT)
> V
(RCH)
?
Enable I
(FAULT)
current
V
I(OUT)
> V
(RCH)
?
No
Yes
Yes
Disable I
(FAULT)
current
(1)
t
(TAPER)
does not apply to bq24026/7
(1)
bq24020
,
,
bq24022
,
,
bq24023
bq24024, bq24025, bq24026
bq24027
SLUS549D DECEMBER 2002 REVISED MARCH 2006
FUNCTIONAL DESCRIPTION (continued)
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AUTONOMOUS POWER SOURCE SELECTION
UDG-02187
USB MODE
AC MODE
AC > BATTERY
AC < BATTERY
USB > BATTERY
TEMPERATURE QUALIFICATION (bq24020, bq24024, bq24025, and bq24026 only)
BATTERY PRE-CONDITIONING
I
O (PRECHG)
+
V
(PRECGH)
R
SET
(1)
V
LTF
V
HTF
I
TS
9
TS
bqTINYII
LTF
HTF
+
BATTERY
PACK
PACK+
PACK-
NTC
RT1
RT2
TEMP
UDG-02188
9
TS
bqTINYII
LTF
HTF
+
BATTERY
PACK
PACK+
PACK-
NTC
V
LTF
V
HTF
I
TS
TEMP
UDG-02186
bq24020
,
,
bq24022
,
,
bq24023
bq24024, bq24025, bq24026
bq24027
SLUS549D DECEMBER 2002 REVISED MARCH 2006
FUNCTIONAL DESCRIPTION (continued)
Figure 4. Operational Flow Chart
As default, the bqTINY-II attempts to charge from the AC input. If AC input is not present, the USB is selected. If
both inputs are available, the AC adapter has the priority. See for details.
Figure 5. Typical Charging Profile
The bqTINY-II continuously monitors battery temperature by measuring the voltage between the TS and VSS
pins. An internal current source provides the bias for common 10-k
negative-temperature coefficient
thermistors (NTC) (see
Figure 6
). The device compares the voltage on the TS pin with the internal V
(LTF)
and
V
(HTF)
thresholds to determine if charging is allowed. If a temperature outside the V
(LTF)
and V
(HTF)
thresholds is
detected, the device immediately suspends the charge by turning off the power FET and holding the timer value
(i.e. timers are NOT reset). Charge is resumed when the temperature returns within the normal range.
The allowed temperature range for a 103AT-type thermistor is 0C to 45C. However the user may modify these
thresholds by adding two external resistors. See
Figure 7
.
If the battery voltage falls below the V
(LOWV)
threshold during a charge cycle, the bqTINY-II applies a precharge
current, I
O(PRECHG)
, to the battery. This feature revives deeply discharged cells. The resistor connected between
the ISET1 and V
SS
, R
SET
, determines the precharge rate. The V
(PRECHG)
and K
(SET)
parameters are specified in
the specifications table. Note that this applies to both AC and USB charging.
The bqTINY-II activates a safety timer, t
(PRECHG)
, during the conditioning phase. If V
(LOWV)
threshold is not
reached within the timer period, the bqTINY-II turns off the charger and asserts a FAULT code on the STATx
pins. Please refer to the TIMER FAULT RECOVERY section for additional details.
Figure 6. Temperature Sensing Configuration
Figure 7. Temperature Sensing Thresholds
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BATTERY CHARGE CURRENT
I
O(OUT)
+
K
(SET)
V
(SET)
R
SET
(2)
BATTERY VOLTAGE REGULATION
CHARGE TAPER DETECTION, TERMINATION AND RECHARGE
I
(TAPER)
+
V
(TAPER)
K
(SET)
R
SET
(3)
I
(TERM)
+
V
(TERM)
K
(SET)
R
SET
(4)
Note ON bq24026 AND bq24027
SLEEP MODE
bq24020
,
,
bq24022
,
,
bq24023
bq24024, bq24025, bq24026
bq24027
SLUS549D DECEMBER 2002 REVISED MARCH 2006
FUNCTIONAL DESCRIPTION (continued)
The bqTINY-II offers on-chip current regulation with a programmable set point. The resistor connected between
the ISET1 and V
SS
, R
SET
, determines the AC charge rate. The V
(SET)
and K
(SET)
parameters are specified in the
specifications table.
When charging from a USB port, the host controller has the option of selecting either a 100-mA or a 500-mA
charge rate using the ISET2 pin. A low-level signal sets the current at 100 mA, and a high-level signal sets the
current at 500 mA. A high-Z input disables USB charging
The voltage regulation feedback is through the OUT pin. This input is tied directly to the positive side of the
battery pack. The bqTINY-II monitors the battery-pack voltage between the OUT and VSS pins. When the
battery voltage rises to the V
O(REG)
threshold, the voltage-regulation phase begins and the charging current
begins to taper down.
As a safety backup, the bqTINY-II also monitors the charge time. If the charge is not terminated within the time
period specified by t
(CHG)
, the bqTINY-II turns off the charger and asserts a FAULT code on the STATx pins.
Please refer to the TIMER FAULT RECOVERY section for additional details.
The bqTINY-II monitors the charging current during the voltage-regulation phase. When the taper threshold,
I
(TAPER)
, is detected, the bqTINY-II initiates the taper timer, t
(TAPER)
. Charge is terminated after the timer expires.
The resistor connected between the ISET1 and V
SS
, R
SET
, determines the taper detection level. The V
(TAPER)
and
K
(SET)
parameters are specified in the specifications table. Note that this applies to both AC and USB charging.
The bqTINY-II resets the taper timer if the charge current rises above the taper threshold, I
(TAPER)
.
In addition to taper-current detection, the bqTINY-II terminates charge if the charge current falls below the I
(TERM)
threshold. This feature allows quick recognition of a battery-removal condition, or insertion of a fully charged
battery. Note that the charge timer and taper timer are bypassed for this feature. The resistor connected
between the ISET1 and V
SS
, R
SET
, determines the taper detection level. The V
(TERM)
and K
(SET)
parameters are
specified in the specifications table. Note that this applies to both AC and USB charging.
After charge termination, the bqTINY-II re-starts the charge when the voltage on the OUT pin falls below the
V
(RCH)
threshold. This feature keeps the battery at full capacity at all times.
The bq24026 and bq24027 monitor the charging current during the voltage-regulation phase. Once the taper
threshold, I
(TAPER)
, is detected, the bq24026/27 terminates the charge. There is no taper timer (t
(TAPER)
) for this
version.
The resistor connected between the ISET1 and V
SS
, R
SET
, determines the taper-detect level for AC input. For
USB charge, taper level is fixed at 10% of the 100- or 500-mA charge rate.
Also note that there is I
(TERM)
detection in the bq24026 and the bq24027.
The bqTINY-II enters low-power sleep mode if both AC and USB are removed from the circuit. This feature
prevents draining the battery in the absence of input supply.
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CHARGE STATUS OUTPUTS
PG OUTPUT
CE INPUT (CHARGE ENABLE)
TTE INPUT (TIMER AND TERMINATION ENABLE)
THERMAL SHUTDOWN AND PROTECTION
TE INPUT (TIMER ENABLED)
bq24020
,
,
bq24022
,
,
bq24023
bq24024, bq24025, bq24026
bq24027
SLUS549D DECEMBER 2002 REVISED MARCH 2006
FUNCTIONAL DESCRIPTION (continued)
The open-drain STAT1 and STAT2 outputs indicate various charger operations as shown in the following table.
These status pins can be used to drive LEDs or communicate to the host processor. Note that OFF indicates the
open-drain transistor is turned off.
Table 1. Status Pins Summary
(1)
CHARGE STATE
STAT1
STAT2
Precharge in progress
ON
ON
Fast charge in progress
ON
OFF
Charge done
OFF
ON
Charge suspend (temperature)
OFF
OFF
Timer fault
OFF
OFF
Sleep mode
OFF
OFF
(1)
OFF means the open-drain output transistor on the STAT1 and STAT2 pins is in an off state.
The open-drain PG (power Good) indicates when the AC adapter is present. The output turns ON when a valid
voltage is detected. This output is turned off in the sleep mode. The PG pin can be used to drive an LED or to
communicate to the host processor.
The CE digital input is used to disable or enable the charge process. A low-level signal on this pin enables the
charge. A high-level signal disables the charge, and places the device in a low-power mode. A high-to-low
transition on this pin also resets all timers and timer fault conditions. Note that this applies to both AC and USB
charging.
The TTE digital input is used to disable or enable the fast-charge timer and charge-taper detection. A low-level
signal on this pin enables the fast-charge timer and taper timer, and a high-level signal disables this feature.
Note that this applies to both AC and USB charging.
The bqTINY-II monitors the junction temperature, T
J
, and suspends charging if T
J
exceeds T
(SHTDWN).
Charging
resumes when T
J
falls approximately 15C below T
(SHTDWN)
.
The TE digital input is used to disable or enable the fast-charge timer. A low-level signal on this pin enables the
fast-charge timer and a high-level signal disables this feature.
Note that this applies to both AC and USB charging.
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TIMER FAULT RECOVERY
APPLICATION INFORMATION
THERMAL CONSIDERATIONS
q
JA
+
T
J
*
T
A
P
(5)
P
+
V
IN
*
V
I(BAT)
I
O(OUT)
(6)
PCB LAYOUT CONSIDERATIONS
bq24020
,
,
bq24022
,
,
bq24023
bq24024, bq24025, bq24026
bq24027
SLUS549D DECEMBER 2002 REVISED MARCH 2006
As shown in
Figure 4
, the bqTINY-II provides a recovery method to deal with timer-fault conditions. The following
discussion summarizes this method:
Condition #1: The charge voltage is above the recharge threshold (V
(RCH)
), and a timeout fault occurs
Recovery method: bqTINY-II waits for the battery voltage to fall below the recharge threshold. This could
happen as a result of a load on the battery, self-discharge or battery removal. When the battery voltage falls
below the recharge threshold, the bqTINY-II clears the fault and starts a new charge cycle. Toggling POR, CE,
or TTE also clears the fault.
Condition #2: The charge voltage is below the recharge threshold (V
(RCH)
), and a timeout fault occurs
Recovery method: In this scenario, the bqTINY-II applies the I
(FAULT)
current. This small current is used to
detect a battery-removal condition and remains on as long as the battery voltage stays below the recharge
threshold. If the battery voltage goes above the recharge threshold, then the bqTINY-II disables the I
(FAULT)
current and executes the recovery method described for condition #1. When the battery voltage falls below the
recharge threshold, the bqTINY-II clears the fault and starts a new charge cycle. Toggling POR, CE, or TTE also
clears the fault.
The bqTINY-II is packaged in a thermally enhanced MLP package. The package includes a thermal pad to
provide an effective thermal contact between the device and the printed circuit board (PCB). Full PCB design
guidelines for this package are provided in the application note entitled, QFN/SON PCB Attachment Application
Note (TI Literature Number
SLUA271
).
The most common measure of package thermal performance is thermal impedance (
JA
) measured (or
modeled) from the device junction to the air surrounding the package surface (ambient). The mathematical
expression for
JA
is:
Where:
T
J
= device junction temperature
T
A
= ambient temperature
P = device power dissipation
Factors that can greatly influence the measurement and calculation of
JA
include:
whether or not the device is board mounted
trace size, composition, thickness, and geometry
orientation of the device (horizontal or vertical)
volume of the ambient air surrounding the device under test and airflow_lus549
whether other surfaces are in close proximity to the device being tested
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal power
FET. It can be calculated from the following equation:
Due to the charge profile of Li-xx batteries, the maximum power dissipation is typically seen at the beginning of
the charge cycle when the battery voltage is at its lowest. See
Figure 2
.
It is important to pay special attention to the PCB layout. The following provides some guidelines:
15
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bq24020
,
,
bq24022
,
,
bq24023
bq24024, bq24025, bq24026
bq24027
SLUS549D DECEMBER 2002 REVISED MARCH 2006
APPLICATION INFORMATION (continued)
To obtain optimal performance, the decoupling capacitor from V
CC
to V
SS
and the output filter capacitors
from OUT to VSS should be placed as close as possible to the bqTINY, with short trace runs to both signal
and V
SS
pins.
All low-current V
SS
connections should be kept separate from the high-current charge or discharge paths
from the battery. Use a single-point ground technique incorporating both the small-signal ground path and
the power-ground path.
The BAT pin is the voltage feedback to the device. It should be connected with its trace as close to the
battery pack as possible.
The high-current charge paths into IN and from the OUT pins must be sized appropriately for the maximum
charge current in order to avoid voltage drops in these traces.
The bqTINY-II is packaged in a thermally-enhanced MLP package. The package includes a thermal pad to
provide an effective thermal contact between the device and the printed circuit board (PCB). Full PCB
design guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment
Application Note (TI Literature No.
SLUA271
).
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PACKAGING INFORMATION
Orderable Device
Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
MSL Peak Temp
(3)
BQ24020DRCR
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24020DRCRG4
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24022DRCR
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24022DRCRG4
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24023DRCR
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24023DRCRG4
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24024DRCR
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24024DRCRG4
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24025DRCR
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24025DRCRG4
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24026DRCR
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24026DRCRG4
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24027DRCR
ACTIVE
SON
DRC
10
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24027DRCRG4
ACTIVE
SON
DRC
10
3000
TBD
Call TI
Call TI
BQ24027DRCT
ACTIVE
SON
DRC
10
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BQ24027DRCTG4
ACTIVE
SON
DRC
10
250
TBD
Call TI
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent
for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
PACKAGE OPTION ADDENDUM
www.ti.com
6-Jul-2006
Addendum-Page 1
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com
6-Jul-2006
Addendum-Page 2
IMPORTANT NOTICE
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