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FEATURES
DESCRIPTION
APPLICATIONS
1
2
3
4
10
9
8
5
IN
GND
OUT
VSS
STAT1
STAT2
7
6
GND
ISET
R
SET
bq24080
+
BATTERY PACK
PACK+
PACK-
SYSTEM
UDG-02184
SYSTEM
INTERFACE
VDC
GND
AC
ADAPTER
CE
PG
bq24080
SLUS698B MARCH 2006 REVISED MAY 2006
SINGLE-CHIP, LI-ION AND LI-POL CHARGER IC
Small 3 mm 3 mm MLP Package
The bq24080 is a highly integrated and flexible Li-Ion
linear
charge
device
targeted
at
space-limited
Integrated Power FET and Current Sensor for
charger applications. It offers an integrated power
Up to 1-A Charge Applications From AC
FET and current sensor, high-accuracy current and
Adapter
voltage
regulation,
charge
status,
and
charge
Precharge Conditioning With Safety Timer
termination, in a single monolithic device. An external
Charge and Power Good (AC Adapter Present
resistor sets the magnitude of the charge current.
With Fixed Safety) Status Output
The bq24080 charges the battery in three phases:
Automatic Sleep Mode for Low-Power
conditioning, constant current, and constant voltage.
Consumption
Charge is terminated based on minimum current. An
internal charge timer provides a backup safety for
Fixed 7-Hour Fast Charge Safety Timer
charge
termination.
The
bq24080
automatically
Ideal for Low-Dropout Charger Designs for
restarts the charge if the battery voltage falls below
Single-Cell Li-Ion or Li-Pol Packs in
an internal threshold. The bq24080 automatically
Space-Limited Portable Applications
enters
sleep
mode
when
the
input
supply
is
removed.
PDAs, MP3 Players
Digital Cameras
Internet Appliances
Smartphones
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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DISSIPATION RATINGS
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
bq24080
SLUS698B MARCH 2006 REVISED MAY 2006
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
CHARGE
FAST-CHARGE TIMER
PART
T
J
REGULATION
FUNCTIONS
MARKINGS
(HOURS)
NUMBER
(1) (2)
VOLTAGE (V)
bq24080DRCR
-40C to 125C
4.2
CE and PG
7
BRO
bq24080DRCT
(1)
The DRC package is available taped and reeled only in quantities of 3,000 devices per reel.
(2)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at
www.ti.com
.
T
A
< 40
C
DERATING FACTOR
PACKAGE
JA
JC
POWER RATING
ABOVE T
A
= 25C
DRC
(1)
46.87 C/W
4.95 C/W
1.5 W
0.021 W/C
(1)
This data is based on using the JEDEC High-K board and the exposed die pad is connected to a copper pad on the board. This is
connected to the ground plane by a 2 x 3 via matrix.
over operating free-air temperature range unless otherwise noted
(1)
bq24080
UNIT
V
I
Input voltage
(2)
IN, CE, ISET, OUT, PG, STAT1, STAT2
-0.3 to 7
V
Output sink/source current
STAT1, STAT2, PG
15
mA
Output current
OUT
1.5
A
T
A
Operating free-air temperature range
C
-40 to 125
T
J
Junction temperature range
C
T
stg
Storage temperature
65 to 150
C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
300
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltages are with respect to V
SS
.
MIN
MAX
UNIT
V
CC
Supply voltage
4.5
6.5
V
T
J
Operating junction temperature range
0
125
C
2
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ELECTRICAL CHARACTERISTICS
bq24080
SLUS698B MARCH 2006 REVISED MAY 2006
over 0
C
T
J
125
C and recommended supply voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT CURRENT
I
CC(VCC)
V
CC
current
V
CC
> V
CC(min)
1.2
2
mA
Sum of currents into OUT pin,
I
CC(SLP)
Sleep current
2
5
V
CC
< V
(SLP)
I
CC(STBY)
Standby current
CE = High, 0
C
T
J
85
C
150
A
I
IB(OUT)
Input current on OUT pin
Charge DONE, V
CC
> V
CC(MIN)
1
5
I
IB(CE)
Input current on CE pin
CE = High
1
VOLTAGE REGULATION V
O(REG)
+ V
(DOMAX)
V
CC
, I
(TERM)
< I
O(OUT)
1 A
V
O(REG)
Output voltage
4.2
V
T
A
= 25
C
0.35%
0.35%
Voltage regulation accuracy
1%
1%
V
O(OUT)
= V
O(REG)
, I
O(OUT)
= 1 A
V
(DO)
Dropout voltage (V
(IN)
V
(OUT)
)
350
500
mV
V
O(REG)
+ V
(DO)
)
V
CC
CURRENT REGULATION
V
I(OUT)
> V
(LOWV)
,
I
O(OUT)
Output current range
(1)
V
I(IN)
V
I(OUT)
> V
(DO)
,
50
1000
mA
V
CC
4.5 V
Voltage on ISET pin, V
CC
4.5 V,
V
(SET)
Output current set voltage
V
I
4.5 V, V
I(OUT)
> V
(LOWV)
,
2.463
2.5
2.538
V
V
I
V
I(OUT)
> V
(DO)
50 mA
I
O(OUT)
1 A
307
322
337
K
(SET)
Output current set factor
10 mA
I
O(OUT)
< 50 mA
296
320
346
1 mA
I
O(OUT)
< 10 mA
246
320
416
PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION
Precharge to fast-charge transition
V
(LOWV)
Voltage on OUT pin
2.8
3
3.2
V
threshold
V
CC(MIN)
4.5 V, t
FALL
= 100 ns,
Deglitch time for fast-charge to
10-mV overdrive,
250
375
500
ms
precharge transition
V
I(OUT)
decreasing below threshold
I
O(PRECHG)
Precharge range
(2)
0 V < V
I(OUT)
< V
(LOWV)
, t < t
(PRECHG)
5
100
mA
Voltage on ISET pin,
V
(PRECHG)
Precharge set voltage
V
O(REG)
= 4.2 V,
240
255
270
mV
0 V < V
I(OUT)
> V
(LOWV)
, t < t
(PRECHG)
TERMINATION DETECTION
Charge termination detection
I
(TERM)
V
I(OUT)
> V
(RCH)
, t < t
(TRMDET)
5
100
mA
range
(3)
Voltage on ISET pin,
Charge termination detection set
V
(TERM)
V
O(REG)
= 4.2 V,
235
250
265
mV
voltage
V
I(OUT)
> V
(RCH)
, t < t
(TRMDET)
V
CC(MIN)
4.5 V, t
FALL
= 100 ns
Deglitch time for termination
t
TRMDET
charging current decreasing below
250
375
500
ms
detection
10-mV overdrive
(1)
See
Equation 2
in the Function Description section.
(2)
See
Equation 1
in the Function Description section.
(3)
See
Equation 3
in the Function Description section.
3
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bq24080
SLUS698B MARCH 2006 REVISED MAY 2006
ELECTRICAL CHARACTERISTICS (continued)
over 0
C
T
J
125
C and recommended supply voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
BATTERY RECHARGE THRESHOLD
V
O(REG)
V
O(REG)
V
O(REG)
V
(RCH)
Recharge threshold
V
0.115
0.10
0.085
V
CC(MIN)
4.5 V, t
FALL
= 100 ns
t
(DEGL)
Deglitch time for recharge detect
decreasing below or increasing
250
375
500
ms
above threshold, 10-mV overdrive
STAT1, STAT2, and PG OUTPUTS
V
OL
Low-level output saturation voltage
I
O
= 5 mA
0.25
V
CHARGE ENABLE (CE), INPUTS
V
IL
Low-level input voltage
I
IL
= 10 A
0
0.4
V
V
IH
High-level input voltage
I
IL
= 20 A
1.4
I
IL
CE, low-level input current
-1
A
I
IH
CE, high-level input current
1
TIMERS
t
(PRECHG)
Precharge time
1,620
1,800
1,930
s
t
(CHG)
Charge time
22,680
25,200
27,720
s
I
(FAULT)
Timer fault recovery current
200
A
SLEEP COMPARATOR
V
CC
V
I(OUT)
V
(SLP)
Sleep-mode entry threshold voltage
+ 80 mV
2.3 V
V
I(OUT)
V
O(REG)
V
V
CC
V
I(OUT)
V
(SLPEXIT)
Sleep-mode exit threshold voltage
+ 190
V
(IN)
decreasing below threshold,
Sleep-mode deglitch time
250
375
500
ms
t
FALL
= 100 ns, 10-mV overdrive
THERMAL SHUTDOWN ENTRY THRESHOLDS
T
(SHTDWN)
Thermal trip threshold
165
T
J
increasing
C
Thermal hysteresis
15
UNDERVOLTAGE LOCKOUT
V
(UVLO)
Undervoltage lockout
Decreasing V
CC
2.4
2.5
2.6
V
Hysteresis
27
mV
4
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PIN ASSIGNMENT
VSS
5
STAT2
4
STAT1
3
GND
2
IN
1
6
7
8
9
10
ISET
PG
CE
GND
OUT
bq24080
bq24080
SLUS698B MARCH 2006 REVISED MAY 2006
DRC PACKAGE
(TOP VIEW)
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
IN
1
I
Adapter dc voltage
CE
9
I
Charge enable input (active low voltage, min 0.1
F input capacitor)
GND
2, 7
-
Ground
ISET
6
I
Charge current. Precharge and termination set point.
OUT
10
O
Charge current output (minimum 0.1
F capacitor to ground)
PG
8
O
Power-good status output (open-drain)
STAT1
3
O
Charge status output 1 (open-drain)
STAT2
4
O
Charge status output 2 (open-drain)
VSS
5
-
Ground
There is an internal electrical connection between the exposed thermal pad and VSS pin of the device. The
Thermal
exposed thermal pad must be connected to the same potential as the VSS pin on the printed-circuit board. Do
-
-
Pad
not use the thermal pad as the primary ground input for the device. VSS pin must be connected to
ground at all times.
5
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