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FEATURES
APPLICATIONS
DESCRIPTION
1
2
3
4
5
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7
8
9
10
1
1
12
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15
16
24
23
22
21
20
19
18
17
25
26
27
28
29
30
31
32
bq24721
CHGEN
ACDRV
ACN
ACP
ACDET
BYPASS
EAO
EAI
FBO
AGND
VREF5
VCC
SDA
SCL
TS
ISYNSET
IOUT
BAT
SRN
SRP
SYNN
SYNP
SYS
BATDRV
PVCC
BTST
HIDR
V
PH
REGN
LODR
V
PGND
ALARM
5x5 QFN PACKAGE (TOP VIEW)
bq24721
SLUS683 NOVEMBER 2005
ADVANCED MULTI-CHEMISTRY AND MULTI-CELL SYNCHRONOUS SWITCH-MODE
CHARGER AND SYSTEM POWER SELECTOR
Portable Notebook Computers
High Efficiency NMOS-NMOS Synchronous
Buck Converter With User-Selectable 300 kHz
Portable DVD Players
or 500 kHz frequency
Webpads, PC Tablets
SBS-Like
(1)
SMBus Interface for Control and
Status Communications With Host
Programmable Battery Voltage, Charge
The bq24721 is a simple to use, high efficiency
Current, and AC Adapter Current via SBS-Like
synchronous battery pack charger with high level of
SMBus Interface
integration for portable applications. This device
implements a high performance analog front-end that
0.4% Charge Voltage Regulation Accuracy
easily interfaces to the system power management
3% Charge Current Regulation Accuracy
micro-controller through a simplified SBS-like SMBus
3% Adapter Current Regulation Accuracy
interface.
Dynamic Power Management (DPM)
The dynamic power management (DPM) function
2% Accuracy Integrated Charge and AC
modifies the charge current depending on system
Adapter 20x Current Amplifier Output
load conditions, avoiding ac adapter overload.
Battery Pack Voltage Range 0 V 19.2 V
High
accuracy
current
sense
amplifiers
enable
AC Adapter Operating Range 8 V 28 V
accurate measurement of either the charge current or
the ac adapter current, allowing termination of
99.5% Max Duty Cycle
nonsmart packs and monitoring of overall system
Internal Soft Start
power.
Integrated 5% 5-V LDO When AC Adapter
The adapter isolation diode can be bypassed with an
Applied
external MOSFET using a control signal provided by
6-V Drive Supply Voltage for Increased
the bq24721, thus reducing overall power dissipation.
Efficiency
Integrated features such as charger soft start, charge
Reverse Battery to Adapter Discharge
overcurrent protection, and IC temperature monitoring
Protection
provide a second level of protection, in addition to
Battery/Adapter to System Power Selector
pack and system protection functions.
Function
Charge and Adapter Overcurrent Protection
Battery Thermistor Sense, TS, Comparators
Available in 32-Pin 5x5mm QFN Package
(1)
SBS-Like interface is not 100% SBS compliant. SBS-Like
interface is SMBus1.1 complaint but does not support Packet
Error Correction (PEC). The control and status registers were
changed to simplify and enhance notebook charger control.
An eight bit address (0x12) is used. See
Table 1
for a
comparison between SBS-like vs SBS Specification.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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DEVICE INFORMATION
bq24721
SLUS683 NOVEMBER 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
BATTERY SHORTED
THERMISTOR
ORDERING NUMBER
PART NO.
PACKAGE
(VERY LOW BATTERY
QUANTITY
SENSE
(TAPE AND REEL)
VOLTAGE) OPERATION
bq24721RHBR
3000
32 PIN
Charge Current Changes to
bq24721
TS
5x5mm QFN
C/8
bq24721RHBT
250
PACKAGE THERMAL DATA
TA
40
C
DERATING FACTOR
PACKAGE
(1)
JA
POWER RATING
ABOVE T
A
= 25
C
RHB
(2)
36
C/W
2.36 W
0.028 W/
C
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at
www.ti.com
.
(2)
This data is based on using the JEDEC High-K board and the exposed die pad is connected to a copper pad on the board. This is
connected to the ground plane by a 2
3 via matrix.
TERMINAL FUNCTIONS
TERMINAL
TERMINAL
DESCRIPTION
DESCRIPTION
NAME
NO.
NAME
NO
Battery charger or adapter current amplifier
CHGEN
1
Charge enable logic level low input
IOUT
17
output
ACDRV
2
AC adapter to system switch driver output
BAT
18
Battery voltage remote sense
ACN
3
Adapter current sense resistor, negative input
SRN
19
Charge current sense resistor, negative input
ACP
4
Adapter current sense resistor, positive input
SRP
20
Charge current sense resistor, positive input
ACDET
5
AC adapter detected sense voltage input
SYNN
21
SROC and SRUC, Negative sense resistor in
BYPASS
6
Adapter Schottky diode bypass switch
SYNP
22
SROC and SRUC, Positive sense resistor in
EAO
7
Error amplifier output for compensation
SYS
23
System load, voltage sense
EAI
8
Error amplifier input for compensation
BATDRV
24
Battery to system switch driver output
Alarm indicating charger status change,
FBO
9
Feedback output for compensation
ALARM
25
open-drain output
AGND
10
Analog ground
PGND
26
Power ground
5V regulated voltage output. Can be used to
VREF5
11
LODRV
27
PWM low side driver output
indicate ac present status
Low-side driver gate voltage regulator. Add
VCC
12
IC analog positive supply
REGN
28
1uFfilter capacitor
High-side driver negative supply, connect
SDA
13
SMBus Data input
PH
29
neg-side of boot-strap capacitor
SCL
14
SMBus Clock input
HIDRV
30
PWM high side driver output
High-side driver positive supply, connect
TS
15
Thermistor sense input
BTST
31
pos-side of boot-strap capacitor.
ISYNSET
16
Program SRUC of charge regulator
PVCC
32
IC power positive supply
2
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ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
bq24721
SLUS683 NOVEMBER 2005
over operating free-air temperature range (unless otherwise noted)
(1) (2)
PARAMETER
PIN
VALUE / UNIT
ACN, ACP, PVCC, ACDRV, SYNN, SYNP, SRP, SRN ,
0.3 V to 30 V
BATDRV, BAT, BYPASS, SYS, VCC
PH
1 V to 30 V
Supply voltage range
LODRV, REGN, FBO, EAI, EAO, ISYNSET, CHGEN, TS ,
0.3 V to 7 V
VREF5, ACDET, IOUT, ALARM, SCL, SDA
BTST, HIDRV (with respect to AGND and PGND)
1 V to 36 V
Maximum differential voltage
AGND-PGND
0.3 V to 0.3 V
Maximum difference voltage
ACPACN , SRPSRN, and SYNPSYNN
0.6 V
Maximum voltage with respect to VCC
SRN, SRP, SYNN, SYNP, BAT, PH
20 V to 30 V
Maximum difference voltage
PVCC-BAT, SYSBAT
20 V to 30 V
Operating ambient temperature range (T
A
)
40
C to 85
C
Maximum junction temperature (T
J_MAX
)
150
C
Storage temperature range (T
stg
)
65
C to 150
C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltages are with respect to AGND, unless otherwise noted. Currents are positive into, negative out of the specified terminal. Consult
Packaging Section of the Databook for thermal limitations and considerations of packages.
PARAMETER
PIN
MIN
NOM
MAX
UNIT
ACN, ACP, PVCC, ACDRV, SRP, SRN,
BATDRV, BAT, BYPASS, SYS, VCC, SYNN,
0
24
V
SYNP
PH
0.5
30
V
LODRV, REGN, VREF5
0
6.5
V
Supply voltage range
FBO, EAI, EAO, ISYNSET, CHGEN, TS ,
0
5.5
V
ACDET, SCL, SDA, ALARM
IOUT, ACDET
0
5.5
V
BTST, HIDRV
0
30
V
Maximum differential voltage
AGND-PGND
0
V
Maximum difference voltage
ACPACN, SYNNSYNP, SRPSRN
0.5
V
Maximum voltage with respect to
SRN, SRP, SYNN, SYNP, BAT, PH
19
24
V
VCC
Maximum difference voltage
SYSBAT, PVCC-BAT
19
24
V
Junction temperature Range (T
J
)
0
125
C
Storage temperature Range (T
stg
)
-55
150
C
3
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ELECTRICAL CHARACTERISTICS
bq24721
SLUS683 NOVEMBER 2005
8 Vdc
V
(VCC)
24 Vdc, 0
C
T
J
125
C, all voltages with respect to AGND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
BATTERY VOLTAGE REGULATION
V
BAT_ICR
VBAT Input voltage range
V
(BAT)
0
PVCC
V
T
J
= 0
C 85
C
0.4
0.4
%
Full valid voltage DAC range,
Battery Regulation Voltage Accuracy
SMBus DAC register 0
15
T
J
= 0
C 125
C
0.5
0.5
%
V
(VBATREG)
BAT voltage regulation range
9
19.2
V
PWM AC ADAPTER INPUT CURRENT REGULATION, DPM (Dynamic Power Management)
ACP-ACN differential voltage range
V
(IREG_DPM)
= V
(ACP)
- V
(ACN)
V
(IREG_DPM)
1.28
162.56
mV
for input current regulation
SMBus DAC register 0
3F, bits b0b13
Current regulation LSB programming
V
(ACP-ACN)
/ 10m
I
(REG_step_DPM)
128
mA
current step
Using a 10m
sense resistor, R
(SNS)
V
(ACP)
V
(ACN)
> 40.96 mV
3
3
%
(4096 mA with 10 m
)
V
CC
V
CC
(min),
V
CC
V
I(BAT)
+ V
(DO-MAX)
,
(1)
V
(ACP)
V
(ACN)
> 20.48 mV
Current regulation accuracy
Over differential threshold range, V
(IREG)
,
5
5
%
(2048 mA with 10 m
)
Does not include error induced by the
tolerance of the sense resistor, R
(SNS)
V
(ACP)
V
(ACN)
> 5.12 mV
25
25
%
(512 mA with 10 m
)
PWM BATTERY CHARGE CURRENT REGULATION
SRP-SRN differential voltage range
V
(IREG_CHG)
= V
(SRP)
- V
(SRN)
V
(IREG_CHG)
1.28
162.56
mV
for input current regulation
SMBus DAC register 0
14, bits b0b13
Current regulation LSB programming
V
(SRP-SRN)
/ 10 m
I
(REG_step_CHG)
128
mA
current step
Using a 10m
sense resistor, R
(SNS)
V
(SRP-SRN)
> 40.96 mV
3
3
%
(4096 mA with 10 m
)
V
CC
V
CC
(min),
V
CC
V
I(BAT)
+ V
(DO-MAX)
,
(1)
V
(SRP-SRN)
>20.48 mV
Current regulation accuracy
Over differential threshold range, V
(IREG)
,
5
5
%
(2048 mA with 10 m
)
Does not include error induced by the
tolerance of the sense resistor, R
(SNS)
V
(SRP-SRN)
> 5.12 mV
25
25
%
(512 mA with 10 m
)
CHARGE CURRENT AMPLIFIER IBAT AMPLIFIER and IADAPT AMPLIFIER
MUX TO IOUT
SRP, SRN common-mode input
2.5
20
V
voltage range
V
(IOUT_IBAT)
IOUT output voltage range with IBAT
V
(IOUT)
= V
(SRP, SRN)
A
(IBAT)
0
3.5
V
selected
V
(BAT)
> 2.5 V or V
(BAT)
> V
(IOUT)
+ V
(DO-MAX)
(1)
A
(IBAT)
Voltage gain
A
(IOUT)
= V
(IOUT)
/ V
(SRP, SRN)
20
V/V
V
(SRP, SRN)
= 40 mV and higher
2
2
%
V
(BAT)
> 2.5 V or V
(BAT)
>
V
(IOUT)
+ V
(DO-MAX)
(1)
Charge current amplifier accuracy
V
(SRP, SRN)
= 20 mV and higher
3
3
%
V
(SRP, SRN)
= 5 mV and higher
25
25
%
ACP, ACN Common-mode input
0
24
V
voltage range
V
(IOUT_IADAPT)
IOUT output voltage range with
V
(IOUT)
= V
(ACP, ACN)
A
(IADP)
0
3.5
V
IADAPT selected
V
(SRP)
> 2.5 V or V
(SRP)
> V
(IOUT)
+ 1V
A
(IADP)
Voltage gain
A
(IADP)
= V
(IOUT)
/ V
(ACP, ACN)
20
V/V
V
(ACP, ACN)
= 40 mV and higher
2
2
%
V
(BAT)
> 2.5 V or V
(BAT)
>
Adapter current amplifier accuracy
V
(ACP, ACN)
= 30 mV and higher
3
3
%
V
(IOUT)
+ V
(DO-MAX)
(1)
V
(ACP, ACN)
= 5 mV and higher
25
25
%
I
(OUT_LIM)
IOUT output current limit
IOUT shorted to AGND
4.5
mA
(1)
V
(DO-max)
is defined as the maximum drop-out voltage. V
(DO-max)
=1 V unless other wise specified. In an actual application, V
(DO - MAX)
=
(R
(SNS)
* I
O
) + V
(DSON_HIGH_SIDE_FET)
+ V
(DSON_BYPASS_FET)
.
4
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ELECTRICAL CHARACTERISTICS
bq24721
SLUS683 NOVEMBER 2005
8 Vdc
V
(VCC)
24 Vdc, 0
C
T
J
125
C, all voltages with respect to AGND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OPERATING CONDITIONS
V
(VCC)
, V
(PVCC)
, input voltage
V
(INOP)
Selector and charger operational.
8
24
V
operating range
QUIESCENT CURRENT NO ADAPTER CONNECTED
VCC and PVCC quiescent
I
(VCC,PVCC)
I
(VCC,PVCC)
= ( I
(VCC)
+ I
(PVCC)
) at V
(VCC)
= V
(PVCC)
= 16.8 V
254
A
current
ACP and ACN quiescent
I
(ACP,ACN)
= ( I
(ACP)
+ I
(ACN)
) at V
(ACP)
= V
(ACN)
= V
(VCC)
= V
(PVCC)
=
I
(ACP,ACN)
1
A
current
16.8 V
I
(BAT)
BAT quiescent current
I
(BAT)
at V
(BAT)
= V
(VCC)
= V
(PVCC)
= 16.8 V
17
A
SRP and SRN quiescent
I
(SRP,SRN)
= ( I
(SRP)
+ I
(SRN)
) at V
(SRP)
= V
(SRN)
= V
(VCC)
= V
(PVCC)
=
I
(SRP,SRN)
1
A
current
16.8 V
SYNN and SYNP quiescent
I
(SYNN,SYNP)
= ( I
(SYNN)
+ I
(SYNP)
) at V
(SYNP)
= V
(SYNN)
= V
(VCC)
=
I
(SYNN,SYNP)
1
A
current
V
(PVCC)
= 16.8 V
I
(SYS)
SYS quiescent current
I
(SYS)
at V
(SYS)
= V
(VCC)
= V
(PVCC)
= 16.8 V
25
A
I
(PH)
PH quiescent current
I
(PH)
at V
(PH)
= V
(VCC)
= V
(PVCC)
= 16.8 V
1
A
I
(BTST)
BTST quiescent current
I
(BTST)
at V
(BTST)
= V
(VCC)
= V
(PVCC)
= 16.8 V
1
A
QUIESCENT CURRENT ADAPTER CONNECTED AND READY TO CHARGE
VCC and PVCC quiescent
I
(VCC,PVCC)
I
(VCC,PVCC)
= (I
(VCC)
+ I
(PVCC)
at V
(VCC)
= V
(PVCC)
= 16.8 V
4.45
mA
current
ACP and ACN quiescent
I
(ACP,ACN)
= (I
(ACP)
+ I
(ACN)
) at V
(ACP)
= V
(ACN)
= V
(VCC)
= V
(PVCC)
=
I
(ACP,ACN)
815
A
current
16.8 V
I
(BAT)
BAT quiescent current
I
(BAT)
at V
(BAT)
= V
(VCC)
= V
(PVCC)
= 16.8 V
500
A
SRP and SRN quiescent
I
(SRP,SRN)
= ( I
(SRP)
+ I
(SRN)
) at V
(SRP)
= V
(SRN)
= V
(VCC)
= V
(PVCC)
=
I
(SRP,SRN)
305
A
current
16.8 V
I
(SYNN,SYNP,SYS
SYNN, SYNP, and SYS
I
(SYNN,SYNP,SYS)
= ( I
(SYNN)
+ I
(SYNP)
+ I
(SYS)
) at V
(SYNP)
= V
(SYNN)
=
321
A
)
quiescent current
V
(SYS)
= V
(VCC)
= V
(PVCC)
= 16.8 V
I
(PH)
PH quiescent current
I
(PH)
at V
(PH)
= V
(VCC)
= V
(PVCC)
= 16.8 V
1
A
I
(BTST)
BTST quiescent current
I
(BTST)
at V
(BTST)
= V
(VCC)
= V
(PVCC)
= 16.8 V
1
A
I
(VCC_SW)
= I
(VCC)
VCC Current while converter
FPWM = 300 kHz, charger on (CHGEN = LO) = ENABLED
I
(VCC_SW)
is switching including gate
Qg at HIDRV = Qg at LODRV = 30 nC, [No Load on VREF5]
25
mA
drive current
Gate drive switching current = Qg
FPWM = (30nC + 30nC)
300kHz = 18mA
5V REFERENCE LDO VOLTAGE AND AC DETECTION STATUS (VREF5, turns-on when AC detected)
Adapter detected (V
ACDET
>V
(ACD)
), V
CC
> 7 V
V
VREF5
5V Regulator output voltage
4.75
5
5.25
V
0
10 mA, source current
Saturation voltage when
Adapter not detected, (V
ACDET
< V
(ACD)
)
V
VREF5_SAT
0.3
V
VREF5 is off
0
10 mA, ac adapter inserted, C
O
= 1 F, discharge Load
I
VREF5_LIM
Short-circuit current
V
(VREF5)
= AGND
20
mA
UNDERVOLTAGE LOCKOUT CIRCUIT
Under voltage lockout
VREF5 rising, POR mode set at VREF5 < V
(UVLO)
3.7
V
threshold
UVLO
V
(UVLO)
hysteresis
VREF5 falling
100
mV
SBS-Like SMBus LOGIC LEVELS
V
IL
Input low threshold level
2.7 V < V
(pull-up)
< 5.5 V, SDA and SCL
0.8
V
V
IH
Input high threshold level
2.7 V < V
(pull-up)
< 5.5 V, SDA and SCL
2.1
V
I
bias
Input bias current
2.7 V < V
(pull-up)
< 5.5 V, SDA and SCL
1
A
ALARM OPEN DRAIN OUTPUTS
ALARM output low saturation
V
(ALARM_sat)
I
(ALARM)
= 5mA
0.5
V
level
I
lkg(ALARM)
ALARM leakage current
V
ALARM
= 5V
1
A
THERMAL SHUTDOWN
T
(SHUT)
Thermal shutdown Threshold
T
J
rising, Charge disabled at T
J
> T
(SHUT)
145
C
T
(SHUTH)
Hysteresis
T
J
falling, Charge enabled at T
J
< T
(SHUT)
T
(SHUTH)
15
C
Deglitch time, thermal
T
J
rising/falling
8
ms
shutdown
5
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bq24721
SLUS683 NOVEMBER 2005
ELECTRICAL CHARACTERISTICS (continued)
8 Vdc
V
(VCC)
24 Vdc, 0
C
T
J
125
C, all voltages with respect to AGND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
THERMISTOR COMPARATORS, TS
Cold temperature threshold,
V
(LTF)
V
(TS)
rising
72.8
73.5
74.2
%VREF5
TS pin voltage
V
(LTFH)
Hysteresis for LTF threshold
V
(TS)
falling
0.5
1
1.5
%VREF5
Cutoff temperature threshold,
V
(TCO)
V
(TS)
rising
28.7
29.3
29.9
%VREF5
TS pin voltage
Hot temperature threshold, TS
V
(HTF)
V
(TS)
rising/falling
33.7
34.4
35.1
%VREF5
pin voltage
Pack thermistor insertion
V
(TSDET)
V
T(S)
rising/falling
82.45
85
87.55
%VREF5
detected
Deglitch time for temperature
V
(TS)
rising above V
(LTF)
, or V
(TS)
falling below V
(TCO)
, or V
(TS)
16
s
out of range detection
falling below V
(HTF)
Deglitch time for temperature
V
(TS)
falling below (V
(LTF)
- V
(LTFH)
), or V
(TS)
rising above V
(TCO)
, or
8
ms
in valid range detection
V
(TS)
rising above V
(HTF)
Deglitch time for thermistor
V
(TS)
rising above V
(TSDET)
16
s
removal detection
V
(TS)
> V
(TSDET)
(pack removed)
Deglitch time for thermistor
V
(TS)
falling below V
(TSDET)
1
s
insertion detection
V
(TS)
< V
(TSDET)
(pack inserted)
CHARGE OVERCURRENT COMPARATOR
Overcurrent protection
V
(OLP)
V
(SRP-SRN)
rising
200
%I
(REG_CHG)
threshold
V
(OLPH)
Hysteresis
V
(SRP-SRN)
falling
20
%I
(REG_CHG)
6
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ELECTRICAL CHARACTERISTICS
bq24721
SLUS683 NOVEMBER 2005
8 Vdc
V
(VCC)
24 Vdc, 0
C
T
J
125
C, all voltages with respect to AGND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SYSTEM STATUS COMPARATORS INPUT SPECIFICATIONS
Commom mode input range at
0
5
V
pin: ACDET
Commom mode input range at
V
ICR
0.5
VREF5
V
TS pin
Common mode input voltage
0
VCC
V
range at pins: BAT, SYS
Input bias currents at pins:
I
(bias)
0.2
A
ACDET, TS, BATDEP, SYS
BATTERY DEPLETED COMPARATOR (BATDEP)
V
(BATDEP)
= 2.2 V + Vstep
batdep_dac_code, where
batdep_dac_code = 0 - 7, and Vstep = 0.1V, SMBus Charge Mode
register 0
12, bits b9, b10, b11
V
(BATDEP)
BAT depleted voltage range
2.2
2.9
V/cell
For programmed V
(BATREG)
= 9 V, then cell = 2
For programmed V
(BATREG)
= 12 V - 14.4 V, then cell = 3
For programmed V
(BATREG)
= 16 V - 19.2 V, then cel l= 4
BAT depleted accuracy
-2
2
%
Battery depleted detection
V
(BAT)
falling
1
s
deglitch time
Battery not depleted detection
V
(BAT)
rising
1
s
deglitch time
AC ADAPTER DETECT COMPARATOR (ACDET)
V
(ACDET)
rising, When adapter detected, VREF5 is enabled, and
V
(ACD)
AC adapter detect threshold
1.176
1.2
1.224
V
REGN regulates to 6 V
V
(ACDH)
AC adapter detect hysteresis
V
(ACDET)
falling
15
mV
AC adapter detected deglitch
V
(ACDET)
rising
8
ms
time
AC adapter not detected
V
(ACDET)
falling
1
s
deglitch time
AC ADAPTER (ACP) - BATTERY (BAT) COMPARATOR
ACP voltage above BAT voltage
V
(ACP-BAT)
V
(ACP)
falling with respect to V
(BAT)
250
300
mV
threshold
V
(ACP-
Hysteresis
V
(ACP-BAT)
rising with respect to V
(BAT)
50
mV
BAT)HYS
V
(ACP-BAT)
falling below
V
(ACP)
falling with respect to V
(BAT)
16
s
threshold deglitch time
V
(ACP-BAT)
rising above
V
(ACP-BAT)
rising with respect to V
(BAT)
8
ms
thresholddeglitch time
SYSTEM (SYS) - BATTERY (BAT) COMPARATOR
System voltage above pack
V
(SYS-BAT)
V
(SYS)
falling with respect to V
(BAT)
250
300
mV
voltage at V
(VS,BAT)
> V
(SYS)
V
(SYS-BAT)HYS
Hysteresis
V
(SYS-BAT)
rising with respect to V
(BAT)
50
mV
V
(SYS-BAT)
falling below
V
(SYS)
falling with respect to V
(BAT)
1
s
threshold deglitch time
V
(SYS-BAT)
rising above
V
(SYS-BAT)
rising with respect to V
(BAT)
8
ms
thresholddeglitch time
BATTERY SHORTED COMPARATOR
V
(BAT)
falling,
3.230
3.4
3.570
V
Programmed V
(BAT)
= 9V
V
(BAT)
falling,
V
(BATSHORT)
Battery shorted threshold
(1)
4.845
5.1
5.355
V
Programmed V
(BAT)
= 12-14.4V
V
(BAT)
falling,
6.460
6.8
7.140
V
Programmed V
(BAT)
= 16-19.2V
V
(SHRT_HYS))
Hysteresis
V
(BAT)
rising
200
mV/cell
Battery shorted deglitch time
V
(BAT)
rising/falling
1
s
(1)
For the bq24721: When BAT falls below the V
(BATSHORT)
threshold, the charger continues regulating at the programmed current down to
zero volts on BAT; then after 1 second deglitch time, the charge current automatically changes to 1/8 the programmed charge current.
The charge current automatically changes from 1/8 the programmed charge current to the full programmed charge current when BAT
voltage rises above (V
(BATSHORT)
+ 200 mV hysteresis), after 1 second deglitch time.
7
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ELECTRICAL CHARACTERISTICS
bq24721
SLUS683 NOVEMBER 2005
8 Vdc
V
(VCC)
24 Vdc, 0
C
T
J
125
C, all voltages with respect to AGND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
BYPASS P-Channel MOSFET DRIVER (BYPASS)
R
(DS_BYP) Hi
BYPASS off-state resistance
Driver output = HI, BYPASS = V
(PVCC)
, V
(PVCC)
= 18 V
1
2
k
Driver output = LO,
R
(DS_BYP) Lo
BYPASS on-state resistance
1
2
k
BYPASS = V
(PVCC)
- V
(REGBYPASS)
, V
(PVCC)
= 18 V
Drive regulator turn-on voltage
V
(REGBYPASS)
for BYPASS with respect to
V
(VCC, BYPASS)
, V
(VCC)
> 13 V, I
(BYPASS)
= 5 mA
-5
-6
-7.5
V
V
(PVCC)
AC ADAPTER P-Channel MOSFET DRIVER (ACDRV)
R
(DS_AC) Hi
ACDRV off-state resistance
Driver output = HI, ACDRV = PVCC, V
(PVCC)
= 18 V
100
150
R
(DS_AC) Lo
ACDRV on-state resistance
Driver output = LO, ACDRV =V
(PVCC)
-V
(REGAC)
, V
(PVCC)
= 18 V
10
20
k
Drive regulator turn-on voltage
V
(REGAC)
for ACDRV with respect to
V
(VCC, ACDRV)
, V
(VCC)
> 13 V, I
(ACDRV)
= 5 mA
-5
-6.5
-7.5
V
V
(PVCC)
BATTERY P-Channel MOSFET DRIVER (BATDRV )
R
(DS_BAT) Hi
BATDRV off-state resistance
Driver output = HI, V
(PVCC)
= 18 V
100
150
R
(DS_BAT) Lo
BATDRV on-state resistance
Driver output = LO, BATDRV=V
(PVCC)
-V
(REGBAT)
, V
(PVCC)
= 18 V
10
20
k
Drive regulator negative turn-on
V
(REGBAT)
voltage for BATDRV with
V
(VCC, BATDRV)
, V
(VCC)
> 13 V, I
(BATDRV)
= 5 mA
-5
-6.5
-7.5
V
respect to V
(SYS)
SYSTEM POWER SELECTOR TIMING
Dead time when switching
No load at ACDRV and BATDRV
1
s
between ACDRV and BATDRV
BYPASS SWITCH TIMING
Delay to turn-off BYPASS
1
s
8
www.ti.com
ELECTRICAL CHARACTERISTICS
bq24721
SLUS683 NOVEMBER 2005
8 Vdc
V
(VCC)
24 Vdc, 0
C
T
J
125
C, all voltages with respect to AGND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
PWM HIGH-SIDE N-Channel MOSFET DRIVER (HIDRV)
R
(DS_HIDRV)
High-side on-state resistance
HSD switch on, HIDRV = HI, V
(BOOST,PH)
= 5.5 V
2.2
3
Hi
R
(DS_HIDRV)
High-side off-state resistance
HSD switch off, HIDRV = LO, V
(BOOST,PH)
= 5.5 V
1.5
2.5
Lo
PWM LOW-SIDE N-Channel MOSFET DRIVER (LODRV)
R
(DS_LODRV)
Low-side on-state resistance
LSD switch on, LODRV = HI, V
(PVCC)
= 7 V
2.2
3
Hi
R
(DS_LODRV)
Low-side off-state resistance
LSD switch off, LODRV = LO, V
(PVCC)
= 7 V
1.5
2.5
Lo
PWM LOW-SIDE DRIVER REGULATOR (REGN)
V(REGN) at I(REGN) = 10 mA, sourcing,
5.5
6
6.5
V
Adapter detected (V
ACDET
> V
(ACD)
), V
(PVCC)
> 7 V
V
O(HREGN)
REGN output voltage
V(REGN) at I(REGN) = 10 mA, sourcing,
4.2
V
Adapter not detected, (V
ACDET
< V
(ACD)
), V
(PVCC)
> 7 V
2 times 25 nC load, Fs = 300 kHz
15
mA
REGN output current while
I
O(REGN_SW)
charger switching
2 times 25 nC load, Fs = 500 kHz
25
mA
VREGN = 5 V
100
mA
Adapter detected (V
ACDET
> V
(ACD)
), V
(PVCC)
> 7 V
REGN Current limit
Adapter detected
VREGN = 0 V, shorted
I
(REGN_LIM)
13.3
mA
Adapter detected (V
ACDET
> V
(ACD)
), V
(PVCC)
> 7 V
REGN Current limit
VREGN = 4.2 V
15
mA
Adapter not detected
Adapter not detected, (V
ACDET
< V
(ACD)
), V
(PVCC)
> 7 V
PWM DRIVERS TIMING
Dead time when switching
between LSD and HSD, no
30
ns
load at LSD and HSD
PWM OSCILLATOR
PWM oscillator ramp voltage ,
V
(RAMPLO)
0% duty cycle occurs below this threshold
0.35
V
low value
PWM oscillator ramp voltage ,
V
(RAMPHI)
near 100% duty cycle occurs above this threshold
3
V
high value
PWM ramp peak-to-peak
V
PP(RAMP)
0.1
VCC
V
amplitude
PWM oscillator ramp clamp
V
(RAMPCL)
3.5
V
voltage
PWM oscillator frequency (300
265
300
345
kHz
kHz)
F
S
PWM oscillator frequency (500
425
500
575
kHz
kHz)
INTERNAL SOFT START (8 steps to Ireg)
Eight steps of charge current regulation to get to programmed
SRSET pin voltage number of
value
8
step
steps during soft start.
(SRSET = 1 V).
Eight steps of charge current regulation to get to programmed
Step Duration.
value
0.8
1
1.2
ms/step
(SRSET = 1 V).
CHARGER SECTION POWER-UP SEQUENCING
Time delay between power up
of charger block references
1
ms
(first) and start charge (second)
Time delay from adapter
detected until ACDRV enable
500
ms
and charger block enable
9
www.ti.com
TYPICAL CHARACTERISTICS
4.92
4.93
4.94
4.95
4.96
4.97
4.98
4.99
5
0
5
10 15
20 25
30
35 40
45 50
I ! Load Current
L
! mA
VREF5 Load Regulation - V
T = 125 C
J
o
T = 85 C
J
o
T = 25 C
J
o
T =
J
0 C
o
V = 20 V
I
4.974
4.976
4.978
4.98
4.982
4.984
4.986
4.988
7
9
11
13
15
17
19
21
23 24
V ! Input Voltage
I
! V
VREF5 Line Regulation - V
T = 125 C
J
o
T = 85 C
J
o
T = 25 C
J
o
T =
J
0 C
o
V = 20 V
I
108
109
110
111
112
113
114
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
I
- VREF5 Current Limit - mA
L
V = 20 V
I
5.7
5.75
5.8
5.85
5.9
5.95
0
5
10 15
20 25
30
35 40
45 50
I ! Load Current
L
! mA
REGN Load Regulation - V
T = 125 C
J
o
T = 85 C
J
o
T = 25 C
J
o
T =
J
0 C
o
V = 20 V
I
5.87
5.88
5.89
5.9
5.91
5.92
7
9
11
13
15
17
19
21
23 24
V ! Input Voltage
I
! V
REGN Loin Regulation - V
T = 125 C
J
o
T = 85 C
J
o
T = 25 C
J
o
T =
J
0 C
o
V = 20 V
I
113
113.5
114
114.5
115
115.5
116
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
I
- REGN Current Limit - mA
L
V = 20 V
I
0
20
40
60
80
100
120
140
160
0
1
2
3
4
5
6
V ! Forced REGN Voltage
I
! V
I
- REGN Current Limit - mA
L
V
= 24 V
CC
200
210
230
220
240
250
270
260
280
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
Quiescent Current, No
Adapter -
A
m
V = 12.6 V
I
V = 16.8 V
I
4
4.2
4.4
4.6
4.8
5
5.2
5.4
5.6
5.8
-15
5
25
45
65
85
105 125
T ! Junction Temperature
J
! C
o
Quescent Current,
Adapter Connected - mA
V = 12.6 V
I
V = 16.8 V
I
bq24721
SLUS683 NOVEMBER 2005
VREF5 LOAD REGULATION
VREF5 LINE REGULATION
VREF5 CURRENT LIMIT
vs
vs
vs
LOAD CURRENT
INPUT VOLTAGE
JUNCTION TEMPERATURE
Figure 1.
Figure 2.
Figure 3.
REGN LOAD REGULATION
REGN LINE REGULATION
REGN CURRENT LIMIT
vs
vs
vs
LOAD CURRENT
INPUT VOLTAGE
JUNCTION TEMPERATURE
Figure 4.
Figure 5.
Figure 6.
REGN CURRENT LIMIT
QUIESCENT CURRENT, NO
QUIESCENT CURRENT, WITH
vs
ADAPTER
ADAPTER
FORCED REGN VOLTAGE
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
Figure 7.
Figure 8.
Figure 9.
10
www.ti.com
1.1996
1.1998
1.2002
1.2
1.2004
1.2006
1.201
1.2008
1.2012
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
V
-
ACDET Threshold - V
I
V = 20 V
I
18.75
18.9
18.85
18.8
19
18.95
19.05
19.1
19.2
19.15
19.25
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
V
-
ACDET Hysteresis - mV
h
y
s
V = 20 V
I
1.5
1.7
1.9
2.1
2.3
2.5
2.7
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
r
- HIDR
V Pull Up -
D
S(o
n
)
W
V = 20 V
I
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
r
- HIDR
V Pull Down -
D
S(o
n
)
W
V = 20 V
I
1.5
1.7
1.9
2.1
2.3
2.5
2.7
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
r
- LODR
V Pull Up -
D
S(o
n
)
W
V = 20 V
I
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
r
- LODR
V Pull Down -
D
S(o
n
)
W
V = 20 V
I
-0.1
-0.04
-0.06
-0.08
0
-0.02
0.02
0.04
0.08
0.06
0.1
Battery V
oltage Regulation
Accuracy - %
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
V = 12.6 V
I
V = 16.8 V
I
-1
1
3
5
7
9
11
13
15
5
15
25
35
45
55
65
V ! SPR-SRN Voltage
I
! mV
Charge Current, Regulation
Accuracy - %
V = 20 V
I
T = 125 C
J
o
T = 85 C
J
o
T = 25 C
J
o
T =
J
0 C
o
-0.1
-0.04
-0.06
-0.08
0
-0.02
0.02
0.04
0.08
0.06
0.1
9
11
13
15
17
19
V
! Battery Voltage
(BAT)
! V
Battery V
oltage Regulation
Accuracy - %
V = 24 V
I
T = 125 C
J
o
T = 85 C
J
o
T = 25 C
J
o
T =
J
0 C
o
bq24721
SLUS683 NOVEMBER 2005
TYPICAL CHARACTERISTICS (continued)
ACDET THRESHOLD
ACDET HYSTERESIS
HIDRV, r
DS(on)
, PULL UP
vs
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
Figure 10.
Figure 11.
Figure 12.
HIDRV, r
DS(on)
, PULL DOWN
LODRV, r
DS(on)
, PULL UP
LODRV, r
DS(on)
, PULL DOWN
vs
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
Figure 13.
Figure 14.
Figure 15.
BATTERY VOLTAGE REGULATION
BATTERY VOLTAGE REGULATION
CHARGE CURRENT REGULATION
ACCURACY
vs
ACCURACY
vs
JUNCTION TEMPERATURE
vs
BATTERY VOLATGE
SRP-SRN VOLTAGE
Figure 16.
Figure 17.
Figure 18.
11
www.ti.com
-1
1
3
5
7
9
11
13
5
9
13
17
21
25
29
37
33
41
V ! ACP-ACN Voltage
I
! mV
Input Current Regulation (DPM)
Accuracy - %
V = 20 V
I
T = 125 C
J
o
T = 85 C
J
o
T = 25 C
J
o
T =
J
0 C
o
-1
0
1
2
3
4
5
14
16
18
20
22
24
V ! Voltage
I
! mV
Input Current Regulation (DPM)
Accuracy - %
5.12 mV
10.24 mV
20.48 mV
V = 20 V
I
40.96 mV
0.26
0.24
0.22
0.2
0.18
0.16
0.14
0.12
0.1
0.28
0
20 30
10
40 50
60
70 80
90 100
V ! ACP-ACN Voltage
I
! mV
I
= DPM Current Sense
Amplifier
Accuracy - %
O
T = 125 C
J
o
T = 85 C
J
o
T = 25 C
J
o
T =
J
0 C
o
V = 20 V
I
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1
I
= DPM Current Sense
Amplifier Offset - mV
O
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
V = 20 V
I
5.6
5.65
5.75
5.7
5.8
5.85
5.95
5.9
6
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
I
Adapter Output Current Limit -
mA
O
-
0
-0.2
-0.4
-0.6
-0.8
-1
-1.2
-1.4
0.2
I
= Charge Current Sense
Amplifier
Accuracy - %
O
0
20 30
10
40 50
60
70 80
90 100
V ! SRP-SRN Voltage
I
! mV
T = 125 C
J
o
T = 85 C
J
o
T = 25 C
J
o
T =
J
0 C
o
V = 20 V
I
5.4
5.45
5.5
5.55
5.6
5.65
5.7
5.75
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
I
- Charge Output Current Limit - mA
O
V = 20 V
I
308
308.5
309
309.5
310
310.5
311
14
16
18
20
22
24
V ! Input Voltage
I
! V
300-kHz Switching Frequency - kHz
T = 125 C
J
o
T = 85 C
J
o
T = 25 C
J
o
T =
J
0 C
o
308.5
309
309.5
310
310.5
311
300-kHz Switching Frequency - kHz
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
V = 20 V
I
bq24721
SLUS683 NOVEMBER 2005
TYPICAL CHARACTERISTICS (continued)
INPUT CURRENT REGULATION
INPUT CURRENT REGULATION
I
O
= DPM CURRENT SENSE
(DPM) ACCURACY
(DPM) ACCURACY
AMPLIFIER ACCURACY
vs
vs
vs
ACP-ACN VOLATGE
INPUT VOLATGE
ACP-ACN VOLATGE
Figure 19.
Figure 20.
Figure 21.
I
O
= DPM CURRENT SENSE
I
O
= ADAPTER OUTPUT CURRENT
I
O
= CHARGE SENSE AMPLIFIER
AMPLIFIER OFFSET
LIMIT
ACCURACY
vs
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
SRP-SRN VOLATGE
Figure 22.
Figure 23.
Figure 24.
I
O
= CHARGE CURRENT LIMIT
300-kHz SWITCHING FREQUENCY
300-kHz SWITCHING FREQUENCY
vs
vs
vs
JUNCTION TEMPERATURE
INPUT VOLTAGE
JUNCTION TEMPERATURE
Figure 25.
Figure 26.
Figure 27.
12
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494.5
495
496
495.5
496.5
497
498
497.5
498.5
14
16
18
20
22
24
V ! Input Voltage
I
! V
500-kHz Switching Frequency - kHz
T = 125 C
J
o
T = 85 C
J
o
T = 25 C
J
o
T =
J
0 C
o
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
V = 20 V
I
494.5
495
496
495.5
496.5
497
498
497.5
498.5
500-kHz Switching Frequency - kHz
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
V = 20 V
I
73.35
73.4
73.45
73.5
73.6
73.55
73.65
VREF% - Thermister L
TF Threshold - %
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
V = 20 V
I
34.35
34.36
34.365
34.355
34.375
34.37
34.395
34.39
34.385
34.38
34.4
VREF% - Thermister HTF Threshold - %
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
V = 20 V
I
29.2
29.22
29.24
29.28
29.26
29.3
VREF% - Thermister TCO Threshold - %
0
20
40
60
80
100
110 120 125
T ! Junction Temperature
J
! C
o
V = 20 V
I
84.7
84.72
84.71
84.74
84.73
84.78
84.77
84.76
84.75
84.8
84.79
VREF% - Thermister TSDET Threshold - %
bq24721
SLUS683 NOVEMBER 2005
TYPICAL CHARACTERISTICS (continued)
500-kHz SWITCHING FREQUENCY
500-kHz SWITCHING FREQUENCY
THERMISTER LTF THRESHOLD
vs
vs
vs
INPUT VOLTAGE
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
Figure 28.
Figure 29.
Figure 30.
THERMISTER LTF THRESHOLD
THERMISTER TCO THRESHOLD
THERMISTER TSDET THRESHOLD
vs
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
Figure 31.
Figure 32.
Figure 33.
13
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75
80
85
90
95
100
0
1
2
3
4
5
7
6
8
Battery Charge Current ! A
Efficiency - %
V = 19.5 V
T
= 20 C
I
A
o
V
= 12.6 V
(BAT)
V
= 16.8 V
(BAT)
0
500
1000
1500
2000
2500
3000
3500
4000
4500
0
500
1 k
1.5 k 2 k 2.5 k
3.5 k
3 k
4.5 k
4 k
System Current ! mA
Regulation Current
mA
!
V
= 12 V
V
= 20 V
R
= 10 m
(BAT)
CC
(sns)
W
ICHG
IDPM
DPM Active
ILOOP Active
bq24721
SLUS683 NOVEMBER 2005
TYPICAL CHARACTERISTICS (continued)
EFFICIENCY
BATTERY REMOVAL (CONSTANT CURRENT MODE)
vs
BATTERY CHARGE CURRENT
Figure 34.
Figure 35.
REGULATION CURRENT
TRANSIENT SYSTEM LOAD
vs
SYSTEM CURRENT
Figure 36.
Figure 37.
14
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bq24721
SLUS683 NOVEMBER 2005
TYPICAL CHARACTERISTICS (continued)
SYSTEM SELECTOR GATE DRIVES AFTER ACDET
SYSTEM SELECTOR ADAPTER INSERTION
Figure 38.
Figure 39.
SYSTEM SELECTOR ADAPTER REMOVAL
REGN VREF5 POWER UP
Figure 40.
Figure 41.
15
www.ti.com
bq24721
SLUS683 NOVEMBER 2005
TYPICAL CHARACTERISTICS (continued)
SOFTSTART CHARGE CURRENT
NON-SYNCHRONOUS TO SYNCHRONOUS TRANSITION
Figure 42.
Figure 43.
SYNCHRONOUS TO NON-SYNCHRONOUS TRANSITION
NEAR 100% DUTY CYCLE BTST RECHARGE PULSE
Figure 44.
Figure 45.
16
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bq24721
SLUS683 NOVEMBER 2005
TYPICAL CHARACTERISTICS (continued)
BATTERY SHORT RESPONSE
CHARGE OVERCURRENT
Figure 46.
Figure 47.
ACOC ACDRV TURN OFF (32-
s DEGLITCH)
ACOC ACDRV TURN ON (500-ms DEGLITCH)
Figure 48.
Figure 49.
17
www.ti.com
bq24721
SLUS683 NOVEMBER 2005
TYPICAL CHARACTERISTICS (continued)
SWITCHING CONTINUOUS CURRENT MODE (CCM)
SWITCHING DISCONTINUOUS CURRENT MODE
vs
(DCM)
Figure 50.
Figure 51.
18
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ACP
ACN
PH
REGN
LODRV
HIDRV
SRP
IOUT
EAO
SRN
VCC
ACDET
20X
Select Adaptor current
or Charge current
Always on
BAT
VREF5
TS
BTST
SYNCHRONOUS SWITCHING
PWM CONVERTER
! current loop
! dpm loop
! voltage loop
! sync/nonsync comparator
! charge overcurrent
! comparator
! charge current reference
! dpm current reference
! break!before!make logic
! duty!cycle limited, 0% to near
100% (99.5%)
! NMOS/NMOS drivers
! Internal soft start
! PWM oscillator 300 kHz/500 kHz
Enabled only when AC is
detected and
is low
CHGEN
REFERENCE SYSTEM
!
5v ldo when ACPRES
!
Power!on reset
!
UVLO
!
Voltage references
!
Internal timebase
Always on
AGND
SYS
SYSTEM STATUS
COMPARATORS
!
Battery depleted (1)
!
AC detection (1)
! *Thermistor inserted (1)
! *Thermistor cold (2)
! *Thermistor hot (2)
!
System voltage / pack voltage (2)
!
VCC above pack voltage (2)
(1) always on
(2) enabled when AC is detected
LOGIC
! Power up/down sequencing
! Charge enable logic
! Charge enable sequencing
! System power selector logic
! System selector bbm logic
! Deglitch times
Always on
AC SW AND BAT SW DRIVERS
! break!before!make LOGIC
Always on
BYPASS SW
DRIVER
Always on
ACGOOD
BDEP, ACCHG, THDET,
TCOLD, THOT ,VSHI, TERMDET,
ADPSRC, VCCGTBAT, TCMP
CHARGERON
POWERON
ACON
BYPON
CLK, POR
SYNP
CHGOC
ACOC
PGND
SMBUS INTERFACE
Always on
MEMORY
Always on
SR IREG DAC
7BIT (1.28mV/bit)
VREG DAC
DECODER
SBS [b1!b14] to
bq24721 [7bit +1bit]
SDA
SCL
ALARM
SYNN
ISYNSET
EAI
FBO
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