1
DAC1220
20-Bit Low Power
DIGITAL-TO-ANALOG CONVERTER
FEATURES
q
20-BIT MONOTONICITY GUARANTEED
OVER 40
C to +85
C
q
LOW POWER: 2.5mW
q
VOLTAGE OUTPUT
q
SETTLING TIME: 2ms to 0.012%
q
MAX LINEARITY ERROR:
0.0015%
q
ON-CHIP CALIBRATION
APPLICATIONS
q
PROCESS CONTROL
q
ATE PIN ELECTRONICS
q
CLOSED-LOOP SERVO-CONTROL
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SMART TRANSMITTERS
q
PORTABLE INSTRUMENTS
DESCRIPTION
The DAC1220 is a 20-bit digital-to-analog (D/A)
converter offering 20-bit monotonic performance over
the specified temperature range. It utilizes delta-sigma
technology to achieve inherently linear performance
in a small package at very-low power. The resolution
of the device can be programmed to 20 bits for full-
scale, settling to 0.003% within 15ms typical, or 16
bits for full-scale, settling to 0.012% within 2ms max.
The output range is two times the external reference
voltage. On-chip calibration circuitry dramatically re-
duces low offset and gain errors.
The DAC1220 features a synchronous serial interface.
In single-converter applications, the serial interface
can be accomplished with just two wires, allowing
low-cost isolation. For multiple converters, a CS signal
allows for selection of the appropriate D/A converter.
The DAC1220 has been designed for closed-loop
control applications in the industrial process control
market and high-resolution applications in the test and
measurement market. It is also ideal for remote appli-
cations, battery-powered instruments, and isolated sys-
tems. The DAC1220 is available in a SSOP-16
package.
1998 Burr-Brown Corporation
PDS-1418B
Printed in U.S.A. April , 2000
International Airport Industrial Park Mailing Address: PO Box 11400, Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 Tel: (520) 746-1111
Twx: 910-952-1111 Internet: http://www.burr-brown.com/ Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
Clock Generator
Serial
Interface
Second-Order
Modulator
Instruction Register
Command Register
Data Register
Offset Register
Full-Scale Register
Microcontroller
First-Order
Switched
Capacitor Filter
Second-Order
Continuous
Time Post Filter
Modulator Control
AV
DD
AGND
X
IN
X
OUT
V
REF
CS
DV
DD
DGND
C
1
C
2
SDIO
V
OUT
SCLK
DAC1220
For most current data sheet and other product
information, visit www.burr-brown.com
SBAS082
2
DAC1220
SPECIFICATIONS
All specifications T
MIN
to T
MAX
, AV
DD
= DV
DD
= +5V, f
XIN
= 2.5MHz, V
REF
= +2.5V, and 16-bit mode, unless otherwise noted.
DAC1220E
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
ACCURACY
Monotonicity
16
Bits
Monotonicity
20-Bit Mode
20
Bits
Linearity Error
1
(1)
LSB
Unipolar Offset Error
(2)
V
OUT
= 20mV
4
LSB
Unipolar Offset Error Drift
(3)
1
ppm/
C
Bipolar Zero Offset Error
(2)
V
OUT
= V
REF
1
LSB
Bipolar Zero Offset Drift
(3)
1
ppm/
C
Gain Error
(2)
10
LSB
Gain Error Drift
(3)
2
ppm/
C
Power Supply Rejection Ratio
at DC, dB = 20log(
V
OUT
/
V
DD
)
60
dB
ANALOG OUTPUT
Output Voltage
(4)
0
2 V
REF
V
Output Current
0.5
mA
Capacitive Load
500
pF
Short-Circuit Current
20
mA
Short-Circuit Duration
GND or V
DD
Indefinite
DYNAMIC PERFORMANCE
Settling Time
(5)
To
0.012%
1.8
2
ms
20-Bit Mode, to
0.003%
15
ms
Output Noise Voltage
0.1Hz to 10Hz
1
Vrms
REFERENCE INPUT
Input Voltage
2.25
2.5
2.75
V
Input Impedance
100
k
DIGITAL INPUT/OUTPUT
Logic Family
TTL-Compatible CMOS
Logic Levels (all except X
IN
)
V
IH
2.0
DV
DD
+0.3
V
V
IL
0.3
0.8
V
V
OH
I
OH
= 0.8mA
3.6
V
V
OL
I
OL
= 1.6mA
0.4
V
Input-Leakage Current
10
A
X
IN
Frequency Range (f
XIN
)
0.5
2.5
MHz
Data Format
User Programmable
Offset Two's Complement
or Straight Binary
POWER SUPPLY REQUIREMENTS
Power Supply Voltage
4.75
5.25
V
Supply Current
Analog Current
360
A
Digital Current
140
A
Analog Current
20-Bit Mode
460
A
Digital Current
20-Bit Mode
140
A
Power Dissipation
2.5
3.5
mW
20-Bit Mode
3.0
mW
Sleep Mode
0.45
mW
TEMPERATURE RANGE
Specified Performance
40
+85
C
NOTES: (1) Valid from AGND + 20mV to AV
DD
20mV, in the 16-bit mode. (2) Applies after calibration, in 16-bit mode. (3) Re-calibration can remove these errors.
(4) Ideal output voltage, does not take into account gain and offset error. (5) Valid from AGND +20mV to AV
DD
20mV. Outside of this range, settling time may
be twice the value indicated. For 16-bit mode, C
1
= 2.2nF, C
2
= 0.22nF; for 20-bit mode, C
1
= 10nF, C
2
= 3.3nF.
3
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
ABSOLUTE MAXIMUM RATINGS
(1)
AV
DD
to DV
DD
...................................................................................
0.3V
AV
DD
to AGND ........................................................................ 0.3V to 6V
DV
DD
to DGND ....................................................................... 0.3V to 6V
AGND to DGND ...............................................................................
0.3V
V
REF
Voltage to AGND .......................................................... 2.0V to 3.0V
Digital Input Voltage to DGND .............................. 0.3V to DV
DD
+ 0.3V
Digital Output Voltage to DGND ........................... 0.3V to DV
DD
+ 0.3V
Package Power Dissipation ............................................. (T
JMAX
T
A
)/
JA
Maximum Junction Temperature (T
JMAX
) ..................................... +150
C
Thermal Resistance,
JA
SSOP-16 ................................................................................ 200
C/W
Lead Temperature (soldering, 10s) ............................................... +300
C
NOTE: (1) Stresses above those listed under "Absolute Maximum Ratings"
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
PIN CONFIGURATION
Top View
SSOP
PIN DESCRIPTIONS
PIN
NAME
DESCRIPTION
1
DV
DD
Digital Supply, +5V nominal
2
X
OUT
System Clock Output (for Crystal)
3
X
IN
System Clock Input
4
DGND
Digital Ground
5
AV
DD
Analog Supply, +5V nominal
6
DNC
Do Not Connect
7
DNC
Do Not Connect
8
DNC
Do Not Connect
9
C
1
Filter Capacitor, see text.
10
C
2
Filter Capacitor, see text.
11
V
OUT
Analog Output Voltage
12
V
REF
Reference Input
13
AGND
Analog Ground
14
CS
Chip Select Input
15
SDIO
Serial Data Input/Output
16
SCLK
Clock Input for Serial Data Transfer
PACKAGE/ORDERING INFORMATION
MAXIMUM
LINEARITY
PACKAGE
SPECIFICATION
ERROR
DRAWING
TEMPERATURE
ORDERING
TRANSPORT
PRODUCT
(LSB)
PACKAGE
NUMBER
RANGE
NUMBER
(1)
MEDIA
DAC1220E
1
SSOP-16
322
40
C to +85
C
DAC1220E
Rails
"
"
"
"
"
DAC1220E/2K5
Tape and Reel
NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces
of "DAC1220E/2K5" will get a single 2500-piece Tape and Reel.
1
2
3
4
5
6
7
8
DV
DD
X
OUT
X
IN
DGND
AV
DD
DNC
DNC
DNC
SCLK
SDIO
CS
AGND
V
REF
V
OUT
C
2
C
1
16
15
14
13
12
11
10
9
DAC1220E
4
DAC1220
TYPICAL PERFORMANCE CURVES
At T
A
= +25
C, AV
DD
= DV
DD
= +5.0V, f
XIN
= 2.5MHz, V
REF
= 2.5V, C
1
= 2.2nF and C
2
= 0.22nF, calibrated mode, unless otherwise specified.
Frequency (Hz)
OUTPUT NOISE VOLTAGE vs FREQUENCY
10
100
1k
10k
100k
1M
Noise (nV/
Hz)
10k
1k
100
10
1
LINEARITY ERROR vs CODE
Code
0
10000
20000
30000
40000
50000
60000
70000
Linearity Error (ppm)
10
8
6
4
2
0
2
40
C
+25
C
+85
C
POWER SUPPLY REJECTION RATIO vs FREQUENCY
Frequency (Hz)
10
100
1k
10k
PSRR (dB)
60
50
40
30
20
10
0
400mVp-p Ripple
Mid-Range Output
LARGE-SIGNAL SETTLING TIME
Time (ms)
0
1
2
3
4
(V)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
5
THEORY OF OPERATION
The DAC1220 is a precision, high dynamic range, self-
calibrating, 20-bit, delta-sigma digital-to-analog converter.
It contains a second-order delta-sigma modulator, a first-
order switched-capacitor filter, a second-order continuous-
time post filter, a microcontroller including the Instruction,
Command and Calibration registers, a serial interface, and a
clock generator circuit.
The design topology provides low system noise and good
power-supply rejection. The modulator frequency of the
delta-sigma D/A converter is controlled by the system clock.
The DAC1220 also includes complete onboard calibration
that can correct for internal offset and gain errors.
The calibration registers are fully readable and writable.
This feature allows for system calibration. The various
settings, modes, and registers of the DAC1220 are read or
written via a synchronous serial interface. This interface
operates as an externally clocked interface.
DEFINITION OF TERMS
Differential Nonlinearity Error--The differential
nonlinearity error is the difference between an actual step
width and the ideal value of 1 LSB. If the step width is
exactly 1 LSB, the differential nonlinearity error is zero.
A differential nonlinearity specification of less than 1 LSB
guarantees monotonicity.
Drift--The drift is the change in a parameter over tempera-
ture.
Full-Scale Range (FSR)--This is the magnitude of the
typical analog output voltage range which is 2 V
REF
.
For example, when the converter is configured with a 2.5V
reference, the full-scale range is 5.0V.
Gain Error--This error represents the difference in the
slope between the actual and ideal transfer functions.
Linearity Error--The linearity error is the deviation of the
actual transfer function from an ideal straight line between
the data end points.
Least Significant Bit (LSB) Weight--This is the ideal
change in voltage that the analog output will change with a
change in the digital input code of 1 LSB.
Monotonicity--Monotonicity assures that the analog out-
put will increase or stay the same for increasing digital input
codes.
Offset Error--The offset error is the difference between
the expected and actual output, when the output is zero. The
value is calculated from measurements made when
V
OUT
= 20mV.
Settling Time--The settling time is the time it takes the
output to settle to its new value after the digital code has
been changed.
f
XIN
--The frequency of the crystal oscillator or CMOS-
compatible input signal at the X
IN
input of the DAC1220.
ANALOG OPERATION
The system clock is divided down to provide the sample
clock for the modulator. The sample clock is used by the
modulator to convert the multi-bit digital input into a one-bit
digital output stream. The use of a 1-bit DAC provides
inherent linearity. The digital output stream is then con-
verted into an analog signal via the 1-bit DAC and then
filtered by the 1st-order switched capacitor filter.
The output of the switched-capacitor filter feeds into the
continuous time filter. The continuous time filter uses exter-
nal capacitors connected between the C
1
, C
2
, V
REF
, and
V
OUT
pins to adjust the settling time. The connections for the
capacitors are shown in Figure 1 (C
1
connects between the
V
REF
and C
1
pins, and C
2
connects between the V
OUT
and C
2
pins).
V
REF
V
OUT
C
2
C
1
12
11
10
9
DAC1220
C
2
C
1
FIGURE 1. External Capacitor Connections.
CALIBRATION
The DAC1220 offers a self-calibration mode which auto-
matically calibrates the output offset and gain. The calibra-
tion is performed once and then normal operation is re-
sumed. In general, calibration is recommended immediately
after power-on and whenever there is a "significant" change
in the operating environment. The amount of change which
should cause a re-calibration is dependent on the applica-
tion. Where high accuracy is important, re-calibration should
be done on changes in temperature and power supply.
After a calibration has been accomplished, the Offset Cali-
bration Register (OCR) and the Full-Scale Calibration Reg-
ister (FCR) contain the results of the calibration.
Note that the values in the calibration registers will vary
from configuration-to-configuration and from part to part.
CAPACITOR
16-BIT MODE
20-BIT MODE
C
1
2.2nF
10nF
C
2
0.22nF
3.3nF
TABLE I. External Capacitor Values.
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