16-Bit, Dual Voltage Output
DIGITAL-TO-ANALOG CONVERTER
DESCRIPTION
The DAC7642 and DAC7643 are dual channel, 16-bit, volt-
age output Digital-to-Analog Converters (DACs) which pro-
vide 15-bit monotonic performance over the specified tem-
perature range. They accept 16-bit parallel input data, have
double-buffered DAC input logic (allowing simultaneous up-
date of all DACs), and provide a readback mode of the
internal input registers. Programmable asynchronous reset
clears all registers to a mid-scale code of 8000
H
(DAC7642)
or to a zero-scale code of 0000
H
(DAC7643). These DACs
can operate from a single +5V supply or from +5V and 5V
supplies, providing an output range of 0 to +2.5V or 2.5V to
+2.5V, respectively.
Low power and small size per DAC make the DAC7642 and
DAC7643 ideal for automatic test equipment, DAC-per-pin
programmers, data acquisition systems, and closed-loop
servo-control. The DAC7642 and DAC7643 are available in
a LQFP-32 package and specified over a 40
C to +85
C
temperature range.
FEATURES
q
LOW POWER: 4mW
q
UNIPOLAR OR BIPOLAR OPERATION
q
SETTLING TIME: 10
s to 0.003% FSR
q
15-BIT LINEARITY AND MONOTONICITY:
40
C to +85
C
q
RESET TO MID-SCALE (DAC7642) OR
ZERO-SCALE (DAC7643)
q
DATA READBACK
q
DOUBLE-BUFFERED DATA INPUTS
APPLICATIONS
q
PROCESS CONTROL
q
CLOSED-LOOP SERVO-CONTROL
q
MOTOR CONTROL
q
DATA ACQUISITION SYSTEMS
q
DAC-PER-PIN PROGRAMMERS
DAC7642
DAC7643
SBAS233 DECEMBER 2001
www.ti.com
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2001, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DAC A
DAC
Register A
Input
Register A
I/O
Buffer
Control
Logic
DAC B
DAC
Register B
Input
Register B
V
REF
L
V
REF
H
V
REF
H
Sense
V
REF
L
Sense
V
OUT
B
V
OUT
A
V
OUT
B
Sense
RST
LOADDACS
DACSEL
CS
R/W
DATA I/O
16
GND
V
OUT
A
Sense
V
SS
V
CC
DAC7642
DAC7643
DAC7642
DAC7643
DAC7642, DAC7643
2
SBAS233
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SPECIFIED
PACKAGE
TEMPERATURE
PACKAGE
ORDERING
TRANSPORT
PRODUCT
MONOTONICITY
PACKAGE-LEAD
DESIGNATOR
(1)
RANGE
MARKING
NUMBER
MEDIA, QUANTITY
DAC7642VF
14 Bits
LQFP-32
VF
40
C to +85
C
DAC7642
DAC7642VFT
Tape and Reel, 250
"
"
"
"
"
"
DAC7642VFR
Tape and Reel, 1000
DAC7642VFB
15 Bits
LQFP-32
VF
40
C to +85
C
DAC7642B
DAC7642VFB T
Tape and Reel, 250
"
"
"
"
"
"
DAC7642VFB R
Tape and Reel, 1000
DAC7643VF
14 Bits
LQFP-32
VF
40
C to +85
C
DAC7643
DAC7643VFT
Tape and Reel, 250
"
"
"
"
"
"
DAC7643VFR
Tape and Reel, 1000
DAC7643VFB
15 Bits
LQFP-32
VF
40
C to +85
C
DAC7643B
DAC7643VFB T
Tape and Reel, 250
"
"
"
"
"
"
DAC7643VFB R
Tape and Reel, 1000
NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
(1)
V
CC
to V
SS
............................................................................. 0.3V to 11V
V
CC
to GND .......................................................................... 0.3V to 5.5V
V
REF
L
to V
SS
............................................................. 0.3V to (V
CC
V
SS
)
V
CC
to V
REF
H ............................................................ 0.3V to (V
CC
V
SS
)
V
REF
H
to V
REF
L ......................................................... 0.3V to (V
CC
V
SS
)
Digital Input Voltage to GND ................................... 0.3V to V
CC
+ 0.3V
Digital Output Voltage to GND ................................. 0.3V to V
CC
+ 0.3V
Maximum Junction Temperature ................................................... +150
C
Operating Temperature Range ........................................ 40
C to +85
C
Storage Temperature Range ......................................... 65
C to +125
C
Lead Temperature (soldering, 10s) ............................................... +300
C
NOTE: (1) Stresses above those listed under "Absolute Maximum Ratings"
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance
degradation to complete device failure. Precision integrated
circuits may be more susceptible to damage because very
small parametric changes could cause the device not to meet
its published specifications.
PACKAGE/ORDERING INFORMATION
DAC7642, DAC7643
3
SBAS233
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DAC7642VF
DAC7642VFB
DAC7643VF
DAC7643VFB
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
ACCURACY
Linearity Error
3
4
2
3
LSB
Linearity Match
4
2
LSB
Differential Linearity Error
2
3
1
2
LSB
Monotonicity, T
MIN
to T
MAX
14
15
Bits
Bipolar Zero Error
1
3
mV
Bipolar Zero Error Drift
5
10
ppm/
C
Full-Scale Error
1
3
mV
Full-Scale Error Drift
5
10
ppm/
C
Bipolar Zero Matching
Channel-to-Channel Matching
1
3
1
3
mV
Full-Scale Matching
Channel-to-Channel Matching
1
3
1
3
mV
Power-Supply Rejection Ratio (PSRR)
At Full-Scale
10
100
ppm/V
ANALOG OUTPUT
Voltage Output
R
L
= 10k
V
REF
L
V
REF
H
V
Output Current
1.25
+1.25
mA
Maximum Load Capacitance
No Oscillation
500
pF
Short-Circuit Current
10, +30
mA
Short-Circuit Duration
GND, V
CC
or V
SS
Indefinite
REFERENCE INPUT
Ref High Input Voltage Range
V
REF
L + 1.25
+2.5
V
Ref Low Input Voltage Range
2.5
V
REF
H 1.25
V
Ref High Input Current
500
A
Ref Low Input Current
500
A
DYNAMIC PERFORMANCE
Settling Time
To
0.003%, 5V Output Step
8
10
s
Channel-to-Channel Crosstalk
See Figure 5
0.5
LSB
Digital Feedthrough
2
nV-s
Output Noise Voltage
f = 10kHz
60
nV/
Hz
DAC Glitch
7FFF
H
to 8000
H
or 8000
H
to 7FFF
H
40
nV-s
DIGITAL INPUT
V
IH
0.7 V
CC
V
V
IL
0.3 V
CC
V
I
IH
10
A
I
IL
10
A
DIGITAL OUTPUT
V
OH
I
OH
= 0.8mA
3.6
4.5
V
V
OL
I
OL
= 1.2mA
0.3
0.4
V
POWER SUPPLY
V
CC
+4.75
+5.0
+5.25
V
V
SS
5.25
5.0
4.75
V
I
CC
0.7
1.1
mA
I
SS
1.2
0.8
mA
Power
7.5
11.5
mW
TEMPERATURE RANGE
Specified Performance
40
+85
C
Specifications same as DAC7642VF and DAC7643VF.
ELECTRICAL CHARACTERISTICS
(Dual Supply)
At T
A
= T
MIN
to T
MAX
, V
CC
= +5V, V
SS
= 5V, V
REF
H = +2.5V, and V
REF
L = 2.5V, unless otherwise noted.
DAC7642, DAC7643
4
SBAS233
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DAC7642VF
DAC7642VFB
DAC7643VF
DAC7643VFB
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
ACCURACY
Linearity Error
(1)
3
4
2
3
LSB
Linearity Match
4
2
LSB
Differential Linearity Error
2
3
1
2
LSB
Monotonicity, T
MIN
to T
MAX
14
15
Bits
Zero-Scale Error
1
3
mV
Zero-Scale Error Drift
5
10
ppm/
C
Full-Scale Error
1
3
mV
Full-Scale Error Drift
5
10
ppm/
C
Zero-Scale Matching
Channel-to-Channel Matching
1
3
1
3
mV
Full-Scale Matching
Channel-to-Channel Matching
1
3
1
3
mV
Power-Supply Rejection Ratio (PSRR)
At Full-Scale
10
100
ppm/V
ANALOG OUTPUT
Voltage Output
R
L
= 10k
0
V
REF
H
V
Output Current
1.25
+1.25
mA
Maximum Load Capacitance
No Oscillation
500
pF
Short-Circuit Current
10, +30
mA
Short-Circuit Duration
GND or V
CC
Indefinite
REFERENCE INPUT
Ref High Input Voltage Range
V
REF
L + 1.25
+2.5
V
Ref Low Input Voltage Range
0
V
REF
H 1.25
V
Ref High Input Current
250
A
Ref Low Input Current
250
A
DYNAMIC PERFORMANCE
Settling Time
To
0.003%, 2.5V Output Step
8
10
s
Channel-to-Channel Crosstalk
See Figure 6
0.5
LSB
Digital Feedthrough
2
nV-s
Output Noise Voltage, f = 10kHz
60
nV/
Hz
DAC Glitch
7FFF
H
to 8000
H
or 8000
H
to 7FFF
H
40
nV-s
DIGITAL INPUT
V
IH
0.7 V
CC
V
V
IL
0.3 V
CC
V
I
IH
10
A
I
IL
10
A
DIGITAL OUTPUT
V
OH
I
OH
= 0.8mA
3.6
4.5
V
V
OL
I
OL
= 1.2mA
0.3
0.4
V
POWER SUPPLY
V
CC
+4.75
+5.0
+5.25
V
V
SS
0
0
0
V
I
CC
0.5
0.9
mA
Power
2.5
4.5
mW
TEMPERATURE RANGE
Specified Performance
40
+85
C
Specifications same as DAC7642VF and DAC7643VF.
NOTE: (1) If V
SS
= 0V, specification applies at Code 0040
H
and above due to possible negative zero-scale error.
ELECTRICAL CHARACTERISTICS
(Single Supply)
At T
A
= T
MIN
to T
MAX
, V
CC
= +5V, V
SS
= 0V, V
REF
H = +2.5V, and V
REF
L = 0V, unless otherwise noted.
DAC7642, DAC7643
5
SBAS233
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20
R/W
Enabled by CS, Controls Data Read from and Write
to the Input Registers.
21
LOADDACS
DAC Output Registers Load Control. Rising edge
triggered. Transfers Data from the Input Registers to
the DAC Registers, Updating the DAC Output.
22
RST
Reset, Rising Edge Triggered. DAC7642 resets to
mid-scale, DAC7643 resets to zero. (Resets Both
Input Registers and DAC Registers)
23
DACSEL
Enabled by CS. Selects the individual DAC Input
Registers. (LOW Selects Register A, HIGH Selects
Register B)
24
V
SS
Negative Power Supply
25
V
OUT
B
DAC B Voltage Output
26
V
OUT
B Sense
DAC B Output Amplifier Inverting Input. Used to
close the feedback loop at the load.
27
V
REF
H Sense
DAC A and B Reference High Sense Input
28
V
REF
H
DAC A and B Reference High Input
29
V
OUT
L
DAC A and B Reference Low Input
30
V
REF
L Sense
DAC A and B Reference Low Sense Input
31
V
OUT
A Sense
DAC A Output Amplifier Inverting Input. Used to
close the feedback loop at the load.
32
V
OUT
A
DAC A Output Voltage
Top View
LQFP
PIN CONFIGURATION
V
CC
GND
DB15
DB14
DB13
DB12
DB11
DB10
V
SS
DACSEL
RST
LOADDACS
R/W
CS
DB0
DB1
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
DAC7642
DAC7643
V
OUT
A
V
OUT
A Sense
V
REF
L Sense
V
REF
L
V
REF
H
V
REF
H Sense
V
OUT
B Sense
V
OUT
B
32
31
30
29
28
27
26
25
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
9
10
11
12
13
14
15
16
PIN DESCRIPTIONS
PIN
NAME
DESCRIPTION
1
V
CC
Positive Power Supply
2
GND
Ground
3
DB15
Data Bit 15, MSB
4
DB14
Data Bit 14
5
DB13
Data Bit 13
6
DB12
Data Bit 12
7
DB11
Data Bit 11
8
DB10
Data Bit 10
9
DB9
Data Bit 9
10
DB8
Data Bit 8
11
DB7
Data Bit 7
12
DB6
Data Bit 6
13
DB5
Data Bit 5
14
DB4
Data Bit 4
15
DB3
Data Bit 3
16
DB2
Data Bit 2
17
DB1
Data Bit 1
18
DB0
Data Bit 0, LSB
19
CS
Chip Select, Active LOW
PIN
NAME
DESCRIPTION
DAC7642, DAC7643
6
SBAS233
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40
C
TYPICAL CHARACTERISTICS: V
SS
= 0V
At T
A
= +25
C, V
CC
= +5V, V
SS
= 0V, V
REF
H
= +2.5V, V
REF
L
= 0V, representative unit, unless otherwise specified.
+25
C
+85
C
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, +25
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +85
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, +85
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, 40
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, 40
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
DAC7642, DAC7643
7
SBAS233
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TYPICAL CHARACTERISTICS: V
SS
= 0V
(Cont.)
At T
A
= +25
C, V
CC
= +5V, V
SS
= 0V, V
REF
H
= +2.5V, V
REF
L
= 0V, representative unit, unless otherwise specified.
3
2
1
0
1
2
3
Temperature (
C)
40
15
85
10
35
60
NEGATIVE FULL-SCALE ERROR vs TEMPERATURE
Negative Full-Scale Error (mV)
DAC A
DAC B
Code (0040
H
)
3
2
1
0
1
2
3
Temperature (
C)
40
15
85
10
35
60
POSITIVE FULL-SCALE ERROR vs TEMPERATURE
Positive Full-Scale Error (mV)
DAC A
DAC B
Code (FFFF
H
)
1
0.8
0.6
0.4
0.2
0
SUPPLY CURRENT vs TEMPERATURE
I
CC
(mA)
Temperature (
C)
40
15
10
35
60
85
Data = FFFF
H
(all DACs)
No Load
1.0
0.8
0.6
0.4
0.2
0.0
Digital Input Code
0000
H
2000
H
4000
H
6000
H
8000
H
A000
H
C000
H
E000
H
FFFF
H
SUPPLY CURRENT vs DIGITAL INPUT CODE
I
CC
(mA)
All DACs
No Load
0.30
0.25
0.20
0.15
0.10
0.05
0.00
V
REF
H CURRENT vs CODE
(all DACs sent to indicated code)
V
REF
Current (mA)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
0.00
0.05
0.10
0.15
0.20
0.25
0.30
V
REF
L CURRENT vs CODE
(all DACs sent to indicated code)
V
REF
Current (mA)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
DAC7642, DAC7643
8
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TYPICAL CHARACTERISTICS: V
SS
= 0V
(Cont.)
At T
A
= +25
C, V
CC
= +5V, V
SS
= 0V, V
REF
H
= +2.5V, V
REF
L
= 0V, representative unit, unless otherwise specified.
1000
100
10
Frequency (Hz)
10
100
1000
10000
100000
1000000
OUTPUT NOISE VOLTAGE vs FREQUENCY
Noise (nV/
Hz)
BROADBAND NOISE
Time (10
s/div)
Noise Voltage (50
V/div)
+5V
LDAC
0
Time (2
s/div)
OUTPUT VOLTAGE vs SETTLING TIME
(0V to +2.5V)
Output Voltage
Large-Signal Settling Time: 1V/div
Small-Signal Settling Time: 500
V/div
Time (1
s/div)
OUTPUT VOLTAGE
vs MIDSCALE GLITCH PERFORMANCE
Output Voltage (20mV/div)
+5V
LDAC
0
7FFF
H
to 8000
H
Time (1
s/div)
OUTPUT VOLTAGE
vs MIDSCALE GLITCH PERFORMANCE
Output Voltage (20mV/div)
+5V
LDAC
0
8000
H
to 7FFF
H
Time (2
s/div)
OUTPUT VOLTAGE vs SETTLING TIME
(+2.5V to 2mV)
Output Voltage
+5V
LDAC
0
Large-Signal Settling Time: 1V/div
Small-Signal Settling
Time: 500
V/div
DAC7642, DAC7643
9
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TYPICAL CHARACTERISTICS: V
SS
= 0V
(Cont.)
At T
A
= +25
C, V
CC
= +5V, V
SS
= 0V, V
REF
H
= +2.5V, V
REF
L
= 0V, representative unit, unless otherwise specified.
V
SS
= 5V
At T
A
= +25
C, V
CC
= +5V, V
SS
= 5V, V
REF
H
= +2.5V, V
REF
L
= 2.5V, representative unit, unless otherwise specified.
+85
C
+25
C
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, +25
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, +85
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +85
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
5
4
3
2
1
0
R
LOAD
(k
)
0.01
0.1
1
10
100
V
OUT
vs R
LOAD
V
OUT
(V)
Source
Sink
0.50
0.40
0.30
0.20
0.10
0.00
Logic Input Level for Digital Inputs (V)
0
1
2
3
4
5
LOGIC SUPPLY CURRENT
vs LOGIC INPUT LEVEL FOR DIGITAL INPUTS
Logic Supply Current (mA)
Typical of One
Digital Input
DAC7642, DAC7643
10
SBAS233
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40
C
TYPICAL CHARACTERISTICS: V
SS
= 5V
(Cont.)
At T
A
= +25
C, V
CC
= +5V, V
SS
= 5V, V
REF
H
= +2.5V, V
REF
L
= 2.5V, representative unit, unless otherwise specified.
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, 40
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, 40
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
3
2
1
0
1
2
3
Temperature (
C)
40
15
85
10
35
60
BIPOLAR ZERO ERROR vs TEMPERATURE
Bipolar Zero Error (mV)
DAC A
DAC B
Code (8000
H
)
3
2
1
0
1
2
3
Temperature (
C)
40
15
85
10
35
60
POSITIVE FULL-SCALE ERROR vs TEMPERATURE
Positive Full-Scale Error (mV)
DAC A
DAC B
Code (FFFF
H
)
0.6
0.5
0.4
0.3
0.2
0.1
0.0
V
REF
H CURRENT vs CODE
(all DACs sent to indicated code)
V
REF
Current (mA)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
0.0
0.1
0.2
0.3
0.4
0.5
0.6
V
REF
L CURRENT vs CODE
(all DACs sent to indicated code)
V
REF
Current (mA)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
DAC7642, DAC7643
11
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TYPICAL CHARACTERISTICS: V
SS
= 5V
(Cont.)
At T
A
= +25
C, V
CC
= +5V, V
SS
= 5V, V
REF
H
= +2.5V, V
REF
L
= 2.5V, representative unit, unless otherwise specified.
5
4
3
2
1
0
1
2
3
4
5
R
LOAD
(k
)
0.01
0.1
1
10
100
V
OUT
vs R
LOAD
V
OUT
(V)
Source
Sink
Time (2
s/div)
OUTPUT VOLTAGE vs SETTLING TIME
(2.5V to +2.5V)
Output Voltage
+5V
LDAC
0
Large-Signal Settling Time: 2V/div
Small-Signal Settling Time: 500
V/div
Time (2
s/div)
OUTPUT VOLTAGE vs SETTLING TIME
(+2.5V to 2.5V)
Output Voltage
+5V
LDAC
0
Large-Signal Settling Time: 2V/div
Small-Signal Settling Time:
500
V/div
3
2
1
0
1
2
3
Temperature (
C)
40
15
85
10
35
60
NEGATIVE FULL-SCALE ERROR vs TEMPERATURE
Negative Full-Scale Error (mV)
DAC A
DAC B
Code (0000
H
)
1.00
0.75
0.50
0.25
0.00
0.25
0.50
0.75
1.00
SUPPLY CURRENT vs DIGITAL INPUT CODE
Supply Current (mA)
0000
H
2000
H
4000
H
I
CC
I
SS
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
No Load
1
0.5
0
0.5
1
1.5
SUPPLY CURRENT vs TEMPERATURE
Supply Current (mA)
I
SS
I
CC
Data = FFFF
H
(all DACs)
No Load
Temperature (
C)
40
15
10
35
60
85
DAC7642, DAC7643
12
SBAS233
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THEORY OF OPERATION
The DAC7642 and DAC7643 are dual channel, voltage
output, 16-bit DACs. The architecture is an R-2R ladder
configuration with the three MSB's segmented followed by an
operational amplifier that serves as a buffer. Each DAC has
its own R-2R ladder network, segmented MSBs, and output
op amp, as shown in Figure 1. The minimum voltage output
(zero-scale) and maximum voltage output (full-scale) are set
by the external voltage references V
REF
L and V
REF
H, respec-
tively. The digital input is a 16-bit parallel word and the DAC
input registers offer a readback capability. The converters
can be powered from either a single +5V supply or a dual
5V supply. Each device offers a reset function which imme-
diately sets all DAC output voltages, DAC registers and Input
registers to mid-scale, code 8000
H
(DAC7642), or to zero-
scale, code 0000
H
(DAC7643). See Figures 2 and 3 for the
basic configurations of the DAC7642 and DAC7643.
FIGURE 1. DAC7642 and DAC7643 Architecture.
R
2R
2R
2R
2R
2R
2R
2R
2R
2R
V
REF
H
V
OUT
V
OUT
Sense
V
REF
H Sense
V
REF
L
V
REF
L Sense
R
F
TYPICAL CHARACTERISTICS: V
SS
= 5V
(Cont.)
At T
A
= +25
C, V
CC
= +5V, V
SS
= 5V, V
REF
H
= +2.5V, V
REF
L
= 2.5V, representative unit, unless otherwise specified.
Time (1
s/div)
OUTPUT VOLTAGE
vs MIDSCALE GLITCH PERFORMANCE
Output Voltage (50mV/div)
+5V
LDAC
0
7FFF
H
to 8000
H
Time (1
s/div)
OUTPUT VOLTAGE
vs MIDSCALE GLITCH PERFORMANCE
Output Voltage (50mV/div)
+5V
LDAC
0
8000
H
to 7FFF
H
DAC7642, DAC7643
13
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FIGURE 2. Basic Single-Supply Operation of the DAC7642 and DAC7643.
V
CC
GND
DB15
DB14
DB13
DB12
DB11
DB10
V
SS
DACSEL
RST
LDAC
R/W
CS
DB0
DB1
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
DAC7642
DAC7643
9
10
11
12
13
14
15
16
DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2
32
0.1
F
31
30
29
28
+2.5V
27
26
25
V
OUTA
V
OUTA
Sense
V
REFL
Sense
V
REFL
V
REFH
V
REFH
Sense
V
OUTB
Sense
V
OUTB
DATA BUS
DATA BUS
CHIP SELECT
READ/WRITE
LOAD DAC REGISTERS
RESET DAC REGISTERS
SELECT DAC CHANNEL
0V to +2.5V
0V to +2.5V
+5V
1
F
FIGURE 3. Basic Dual-Supply Operation of the DAC7642 and DAC7643.
24
23
22
21
20
19
18
17
0.1
F
1
F
5V
DAC7642
DAC7643
9
10
11
12
13
14
15
16
32
31
30
29
28
+2.5V
27
26
25
V
OUTA
V
OUTA
Sense
V
REFL
Sense
V
REFL
V
REFH
V
REFH
Sense
V
OUTB
Sense
V
OUTB
2.5V to
+2.5V
2.5V
2.5V to
+2.5V
V
CC
GND
DB15
DB14
DB13
DB12
DB11
DB10
V
SS
DACSEL
RST
LDAC
R/W
CS
DB0
DB1
DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2
1
2
3
4
5
6
7
8
0.1
F
DATA BUS
+5V
1
F
DATA BUS
CHIP SELECT
READ/WRITE
LOAD DAC REGISTERS
RESET DAC REGISTERS
SELECT DAC CHANNEL
DAC7642, DAC7643
14
SBAS233
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that V
SS
(the negative power supply) must either be con-
nected to ground or must be in the range of 4.75V to
5.25V. The voltage on V
SS
sets several bias points within
the converter. If V
SS
is not in one of these two configurations,
the bias values may be in error and proper operation of the
device may be affected.
The current into the V
REF
H input and out of V
REF
L depends
on the DAC output voltages and can vary from a few
microamps to approximately 0.5mA. The reference input
appears as a varying load to the reference. If the references
applied can sink or source the required current, a reference
buffer is not required. The DAC7642 and DAC7643 feature
reference drive and sense connections such that the internal
errors caused by the changing reference current and the
circuit impedances can be minimized. Figures 5 through 13
show different reference configurations and the effect on the
linearity and differential linearity.
FIGURE 5. Dual Supply Configuration-Buffered References, Used for Dual-Supply Characteristic Curves.
V
OUT
A
V
OUT
A Sense
V
REF
L Sense
V
REF
L
V
REF
H
V
REF
H Sense
V
OUT
B Sense
V
OUT
B
32
31
30
29
28
27
26
25
DAC7642
DAC7643
1000pF
V
OUT
V
OUT
100
100
+2.5V
+V
2.5V
V
V
+V
OPA2234
2200pF
1000pF
2200pF
ANALOG OUTPUTS
When V
SS
= 5V (dual-supply operation), the output amplifier
can swing to within 2.25V of the supply rails over the 40
C
to +85
C temperature range. When V
SS
= 0V (single-supply
operation), and with R
LOAD
also connected to ground, the
output can swing to ground. Care must also be taken when
measuring the zero-scale error when V
SS
= 0V. Since the
DAC output cannot swing below ground, the output voltage
may not change for the first few digital input codes (0000
H
,
0001
H
, 0002
H
, etc.) if the output amplifier has a negative
offset. At the negative limit of 2mV, the first specified output
starts at code 0040
H
.
Due to the high accuracy of these DACs, system design
problems such as grounding and contact resistance become
very important. A 16-bit converter with a 2.5V full-scale range
has a 1LSB value of 38
V. With a load current of 1mA, a series
wiring and connector resistance of only 40m
(R
W2
) will cause
a voltage drop of 40
V, as shown in Figure 4. To understand
what this means in terms of a system layout, the resistivity of
a typical 1 ounce copper-clad printed circuit board is 1/2 m
per square. For a 1mA load, a 10 milli-inch wide printed circuit
conductor 600 milli-inches long will result in a voltage drop of
30
V.
The DAC7642 and DAC7643 offer a force and sense output
configuration for the high open-loop gain output amplifiers.
This feature allows the loop around the output amplifier to be
closed at the load (shown in Figure 4), thus ensuring an
accurate output voltage.
REFERENCE INPUTS
The reference inputs, V
REF
L and V
REF
H, can be any voltage
between V
SS
+ 2.5V and V
CC
2.5V provided that V
REF
H is
at least 1.25V greater than V
REF
L. The minimum output of
each DAC is equal to V
REF
L
plus a small offset voltage
(essentially, the offset of the output op amp). The maximum
output is equal to V
REF
H plus a similar offset voltage. Note
FIGURE 4. Analog Output Closed-Loop Configuration. R
W
represents wiring resistances.
V
OUT
A
V
OUT
A Sense
V
REF
L Sense
V
REF
L
V
REF
H
V
REF
H Sense
V
OUT
B Sense
V
OUT
B
32
31
30
29
28
27
26
25
DAC7642
DAC7643
R
W2
R
W1
+2.5V
+V
V
OUT
R
W1
R
W2
V
OUT
DAC7642, DAC7643
15
SBAS233
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FIGURE 6. Single-Supply Buffered Reference with V
REF
L of 50mV.
V
OUT
A
V
OUT
A Sense
V
REF
L Sense
V
REF
L
V
REF
H
V
REF
H Sense
V
OUT
B Sense
V
OUT
B
32
31
30
29
28
27
26
25
DAC7642
DAC7643
1000pF
V
OUT
V
OUT
100
+2.5V
2k
98k
+0.050V
+V
+V
OPA2350
2200pF
1000pF
2200pF
100
FIGURE 7. Integral Linearity and Differential Linearity Error
Curves for Figure 6.
FIGURE 8. Integral Linearity and Differential Linearity Error
Curves for Figure 9.
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
FIGURE 9. Single-Supply Buffered Reference with V
REF
L = +1.25V and V
REF
H = +2.5V.
V
OUT
A
V
OUT
A Sense
V
REF
L Sense
V
REF
L
V
REF
H
V
REF
H Sense
V
OUT
B Sense
V
OUT
B
32
31
30
29
28
27
26
25
DAC7642
DAC7643
1000pF
V
OUT
V
OUT
100
+V
OPA2350
2200pF
1000pF
2200pF
+2.5V
+V
+V
+1.25V
100
DAC7642, DAC7643
16
SBAS233
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V
OUT
A
V
OUT
A Sense
V
REF
L Sense
V
REF
L
V
REF
H
V
REF
H Sense
V
OUT
B Sense
V
OUT
B
32
31
30
29
28
27
26
25
DAC7642
DAC7643
V
OUT
V
OUT
+2.5V
+V
FIGURE 11. Linearity and Differential Linearity Error Curves
for Figure 10.
FIGURE 13. Linearity and Differential Linearity Error Curves
for Figure 12.
FIGURE 12. Low-Cost Single-Supply Configuration.
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
FIGURE 10. Single-Supply Buffered V
REF
H.
V
OUT
A
V
OUT
A Sense
V
REF
L Sense
V
REF
L
V
REF
H
V
REF
H Sense
V
OUT
B Sense
V
OUT
B
32
31
30
29
28
27
26
25
DAC7642
DAC7643
V
OUT
V
OUT
+V
OPA2350
+2.5V
+V
1000pF
100
2200pF
DIGITAL INTERFACE
See Table I for the basic control logic of the DAC7642 and
DAC7643. Note that each internal register is edge triggered
and not level triggered. When the LOADDACS signal is
transitioned from LOW to HIGH, the digital word existing in
the input register is latched into the DAC register. The first
set of registers (the input registers) are triggered via the
DACSEL, R/W, and CS inputs. Only one of these registers
can be transparent at any given time.
The double-buffered architecture is designed mainly so each
DAC input register can be written to at any time without
affecting the DAC outputs. All DAC voltages are updated
simultaneously by the rising edge of LOADDACS. It also
allows multiple devices to be updated simultaneously by
sharing the LOADDACS control from the host with each
device.
DAC7642, DAC7643
17
SBAS233
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INPUT
DAC
DACSEL
R/W
CS
RST
LOADDACS
REGISTER
REGISTER
MODE
DAC
L
L
L
L, H
X
Write
Hold
Write Input
A
H
L
L
L, H
X
Write
Hold
Write Input
B
L
H
L
L, H
X
Read
Hold
Read Input
A
H
H
L
L, H
X
Read
Hold
Read Input
B
X
X
H
L, H
Hold
Write
Update
All
X
X
H
L, H
L, H
Hold
Hold
Hold
All
X
X
X
L, H
Reset
Reset
Reset
All
TABLE I. DAC7642 and DAC7643 Logic Truth Table.
t
RCS
CS
t
RDS
t
RDH
t
AS
t
CSD
t
DZ
t
AH
R/W
DACSEL
Data Out
Data Valid
t
WCS
CS
t
WS
t
AS
t
AH
t
WH
R/W
DACSEL
t
LS
t
LWD
t
LH
t
S
0.003% of FSR
Error Band
0.003% of FSR
Error Band
t
LX
LOADDACS
t
DS
t
DH
Data In
V
OUT
t
S
Data Read Timing
Data Write Timing
t
RSH
RST
V
OUT
+FS
FS
(DAC7643)
Zero-Scale
V
OUT
+FS
FS
(DAC7642)
Midscale
t
RSS
FIGURE 14. Digital Input and Output Timing.
(1)
DIGITAL TIMING
Figure 14 and Table II provide detailed timing for the digital
interface of the DAC7642 and DAC7643.
DIGITAL INPUT CODING
The DAC7642 and DAC7643 input data is in Straight Binary
format. The output voltage is given by Equation 1:
V
V
L
V
H
V
L
N
OUT
REF
REF
REF
=
+
(
)
,
65 536
where N is the digital input code. This equation does not
include the effects of offset (zero-scale) or gain (full-scale)
errors.
DAC7642, DAC7643
18
SBAS233
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(2)
DIGITALLY-PROGRAMMABLE
CURRENT SOURCE
The DAC7642 and DAC7643 offer a unique set of features
that allows a wide range of flexibility in designing applications
circuits, such as programmable current sources. The
DAC7642 and DAC7643 offer both a differential reference
input, as well as an open-loop configuration around the
output amplifier. The open-loop configuration around the
output amplifier allows a transistor to be placed within the
loop to implement a digitally-programmable, unidirectional
current source. The availability of a differential reference also
allows programmability for both the full-scale and zero-scale
currents. The output current is calculated as:
I
V
H
V
L
R
N Value
V
L R
OUT
REF
REF
SENSE
REF
SENSE
=
+
(
)
,
/
65 536
FIGURE 15. 4-20mA Digitally Controlled Current Source.
V
OUT
A
V
OUT
A Sense
V
REF
L Sense
V
REF
L
V
REF
H
V
REF
H Sense
V
OUT
B Sense
V
OUT
B
32
31
30
29
28
27
26
25
DAC7642
DAC7643
1000pF
I
OUT
100
+2.5V
20k
80k
+V
+V
OPA2350
100
2200pF
1000pF
2200pF
V
PROGRAMMED
125
I
OUT
V
PROGRAMMED
125
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
t
RCS
CS LOW for Read
150
ns
t
RDS
R/W HIGH to CS LOW
10
ns
t
RDH
R/W HIGH after CS HIGH
10
ns
t
DZ
CS HIGH to Data Bus in High Impedance
10
100
ns
t
CSD
CS LOW to Data Bus Valid
100
150
ns
t
WCS
CS LOW for Write
40
ns
t
WS
R/W LOW to CS LOW
0
ns
t
WH
R/W LOW after CS HIGH
10
ns
t
AS
DACSEL Valid to CS LOW
0
ns
t
AH
DACSEL Valid after CS HIGH
10
ns
t
LS
CS LOW to LOADDACS HIGH
30
ns
t
LH
CS LOW after LOADDACS HIGH
100
ns
t
LX
LOADDACS HIGH
100
ns
t
DS
Data Valid to CS LOW
0
ns
t
DH
Data Valid after CS HIGH
10
ns
t
LWD
LOADDACS LOW
100
ns
t
RSS
RESET LOW
10
ns
t
RSH
RESET HIGH
10
ns
t
S
Settling Time
10
s
TABLE II. Timing Specifications (T
A
= 40
C to +85
C).
Figure 15 shows a DAC7642 and DAC7643 in a 4-20mA
current output configuration. The output current can be
determined by Equation 3:
I
V
V
N Value
V
OUT
=
+
2 5
0 5
125
65 536
0 5
125
.
.
,
.
At full-scale, the output current is 16mA plus the 4mA for the
zero current. At zero scale the output current is the offset
current of 4mA (0.5V/125
).
(3)
DAC7642, DAC7643
19
SBAS233
www.ti.com
PACKAGE DRAWING
MTQF002B JANUARY 1995 REVISED MAY 2000
VF (S-PQFP-G32)
PLASTIC QUAD FLATPACK
4040172/D 04/00
Gage Plane
Seating Plane
1,60 MAX
1,45
1,35
8,80
9,20
SQ
0,05 MIN
0,45
0,75
0,25
0,13 NOM
5,60 TYP
1
32
7,20
6,80
24
25
SQ
8
9
17
16
0,25
0,45
0,10
0
7
M
0,20
0,80
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
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