Burr Brown Products
from Texas Instruments

DAC8806

FEATURES

APPLICATIONS

DESCRIPTION

DAC

Parallel Bus

Input

Control

Logic

DAC

D13

RST

LDAC

REF

COM

OFS

OUT

AGND

DGND

DAC8806

SBAS385 APRIL 2006

14-Bit, Parallel Input Multiplying Digital-to-Analog Converter

Automatic Test Equipment

0.5LSB DNL

Instrumentation

1LSB INL

Digitally Controlled Calibration

14-Bit Monotonic

Industrial Control PLCs

Low Noise: 10nV/

Low Power: I

= 2

Analog Power Supply: +2.7V to +5.5V

The

DAC8806,

multiplying

digital-to-analog

1.66mA Full-Scale Current,

converter (DAC), is designed to operate from a

with V

REF

= 10V

single 2.7V to 5.5V supply.

Settling Time: 0.5

The applied external reference input voltage V

REF

4-Quadrant Multiplying Reference

determines the full-scale output current. An internal
feedback

resistor

)

provides

temperature

Reference Bandwidth: 8MHz

tracking for the full-scale output when combined with

Reference Input:

15V

external,

voltage-to-current

(I/V)

precision

Reference Dynamics: 105THD

amplifier.

SSOP-28 Package

parallel

interface

offers

high-speed

Industry-Standard Pin Configuration

communications. The DAC8806 is packaged in a
space-saving

SSOP-28

package

and

has

industry-standard pinout.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

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ABSOLUTE MAXIMUM RATINGS

DAC8806

SBAS385 APRIL 2006

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.

ORDERING INFORMATION

(1)

MINIMUM

RELATIVE

DIFFERENTIAL

PACKAGE-

SPECIFIED

TRANSPORT

ACCURACY

NONLINEARITY

LEAD

TEMPERATURE

PACKAGE

ORDERING

MEDIA,

PRODUCT

(LSB)

(DESIGNATOR)

RANGE

MARKING

NUMBER

QUANTITY

DAC8806IDB

Tubes, 48

DAC8806I

DB-28 (SSOP)

C to +85

DAC8806

DAC8806IDBR

Tape and Reel, 2000

(1)

For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at

www.ti.com

over operating free-air temperature range (unless otherwise noted)

(1)

DAC8806

UNIT

to GND

0.3 to +7

Digital input voltage to GND

0.3 to +V

+ 0.3

V (I

OUT

) to GND

0.3 to +V

+ 0.3

Operating temperature range

40 to +85

REF, R

OFS

, R

, R1, R

COM

to AGND, and DGND

Storage temperature range

65 to +150

Junction temperature range (T

max)

+125

Power dissipation

max T

)/R

Thermal impedance, R

C/W

ESD rating:

Human body model (HBM)

4000

Charged device model (CDM)

1000

(1)

Stresses above those listed under absolute maximum ratings may cause permanent damage to the device. Exposure to absolute
maximum conditions for extended periods may affect device reliability.

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ELECTRICAL CHARACTERISTICS

DAC8806

SBAS385 APRIL 2006

All specifications at 40

C to +85

C, V

= +2.7V to +5.5V, I

OUT

= virtual GND, GND = 0V, V

REF

= 10V, and T

= full

operating temperature, unless otherwise noted.

DAC8806

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

STATIC PERFORMANCE

Resolution

Bits

Relative accuracy

DAC8806

LSB

Differential nonlinearity

0.5

LSB

Output leakage current

Data = 0000h, T

= +25

Output leakage current

Data = 0000h, T

= T

MAX

Full-scale gain error

Unipolar, data = 3FFFh

LSB

Bipolar, data = 3FFFh

LSB

Full-scale temperature coefficient

ppm/

Bipolar zero scale error

LSB

PSRR

Power-supply rejection ratio; V

= 5V

10%

0.1

LSB/V

OUTPUT CHARACTERISTICS

(1)

Output current

1.66

Output capacitance

Code dependent

REFERENCE INPUT

REF

range

REF

Input resistance (unipolar)

4.5

7.5

Input capacitance

R1/R2

R1/R2 resistance (bipolar)

OFS

, R

Feedback and offset resistance

LOGIC INPUTS AND OUTPUT

(1)

Input low voltage

= +2.7V

0.6

= +5V

0.8

Input high voltage

= +2.7V

2.1

= +5V

2.4

Input leakage current

0.001

Input capacitance

INTERFACE TIMING, V

= +5.0V

(1)

(See

Figure 40

and

Table 1

)

Data to WR setup time

Data to WR hold time

WR pulse width

LDAC

LDAC pulse width

Data setup time

RST

RST pulse width

Data hold time

LWD

WR to LDAC delay time

INTERFACE TIMING, V

= +5.0V

(1)

(See

Figure 40

and

Table 1

)

Data to WR setup time

Data to WR hold time

WR pulse width

LDAC

LDAC pulse width

Data setup time

RST

RST pulse width

Data hold time

LWD

WR to LDAC delay time

(1)

Specified by design and characterization; not production tested.

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PIN ASSIGNMENTS

REF

COM

OFS

OUT

AGND

LDAC

D13

D12

D11

D10

RST

DGND

DAC8806

SBAS385 APRIL 2006

ELECTRICAL CHARACTERISTICS (continued)

All specifications at 40

C to +85

C, V

= +2.7V to +5.5V, I

OUT

= virtual GND, GND = 0V, V

REF

= 10V, and T

= full

operating temperature, unless otherwise noted.

DAC8806

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

POWER REQUIREMENTS

2.7

5.5

(normal operation)

Logic inputs = 0V

= +4.5V to +5.5V

= V

and V

= GND

= +2.7V to +3.6V

= V

and V

= GND

2.5

AC CHARACTERISTICS

(2)

Output current settling time

0.5

Reference multiplying BW

REF

= 5V

, Data = 3FFFh

MHz

REF

= 0V to 10V,

DAC glitch impulse

nVs

Data = 1FFFh to 2000h to 1FFFh

Feedthrough error V

OUT

REF

Data = 0000h, V

REF

= 10kHz;

10V

DAC

= logic low, V

REF

= 10V to +10V

Digital feedthrough

nVs

Any code change

Total harmonic distortion

REF

= 6V

RMS

, Data = 3FFF, f = 1kHz

105

Output spot noise voltage

nV/

(2)

Specified by design and characterization; not production tested.

TERMINAL FUNCTIONS

PIN #

NAME

DESCRIPTION

REF

Reference input and 4-quadrant Resistor (R2).

Center tap of two 4-quadrant resistors

COM

(R1 and R2).

4-quadrant resistor (R1).

OFS

Bipolar offset resistor

Internal matching feedback resistor

OUT

DAC current output

AGND

Analog ground

Digital input load DAC control. When LDAC is high,

LDAC

data is loaded from input register into a DAC
register, updating the DAC output.

Write control digital input. Active low. When WR is

taken to logic low, data is loaded from the digital
input pins (D0D13) into a14-bit input register.

1021

D13D2

Digital input data bits. D13 is MSB.

DGND

Digital ground

Positive power supply

24, 25

D1, D0

Digital Input data bits. D0 is LSB.

26, 27

No connection

Reset. Active low. When RST is taken to logic low,

RST

the DAC output and all internal registers are set to
zero code for the DAC8806.

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TYPICAL CHARACTERISTICS: V

= +5V

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

2048

4096

6144

8192 10240 12288 14336 16383

INL (LSB)

Code

= +25°C

= 10V

REF

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

2048

4096

6144

8192 10240 12288 14336 16383

DNL (LSB)

Code

= +25°C

= 10V

REF

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

2048

4096

6144

8192 10240 12288 14336 16383

INL (LSB)

Code

= 40

=10V

REF

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

2048

4096

6144

8192 10240 12288 14336 16383

DNL (LSB)

Code

= 40

= 10V

REF

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

2048

4096

6144

8192 10240 12288 14336 16383

INL (LSB)

Code

= +85°C

= 10V

REF

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

2048

4096

6144

8192 10240 12288 14336 16383

DNL (LSB)

Code

= +85°C

= 10V

REF

DAC8806

SBAS385 APRIL 2006

At T

= +25

C, unless otherwise noted.

LINEARITY ERROR

DIFFERENTIAL LINEARITY ERROR

vs DIGITAL INPUT CODE

Figure 1.

Figure 2.

LINEARITY ERROR

DIFFERENTIAL LINEARITY ERROR

vs DIGITAL INPUT CODE

Figure 3.

Figure 4.

LINEARITY ERROR

DIFFERENTIAL LINEARITY ERROR

vs DIGITAL INPUT CODE

Figure 5.

Figure 6.

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-6

-12
-18
-24
-30
-36
-42
-48
-54
-60
-66
-72
-78
-84
-90
-96

-102
-108
-114

100

10k

100k

10M

100M

Attenuation (dB)

Bandwidth (Hz)

0x3FFF

0x2000

0x1000

0x0800

0x0400

0x0200

0x0100

0x0080

0x0040

0x0020

0x0010

0x0008

0x0004

0x0002

0x0001

0x0000

Digital Code

180

160

140

120

100

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

Supply Current, I

(
m

Logic Input Voltage (V)

= +5.0V

= +2.7V

-6

-12
-18
-24
-30
-36
-42
-48
-54
-60
-66
-72
-78
-84
-90
-96

-102
-108
-114

100

10k

100k

10M

100M

Attenuation (dB)

Bandwidth (Hz)

0x3FFF

0x3000

0x2800

0x2400

0x2200

0x2100

0x2080

0x2040

0x2020

0x2010

0x2008

0x2004

0x2002

0x2001

0x2000

Codes from
Full-scale to
Midscale

Digital Code

-6

-12
-18
-24
-30
-36
-42
-48
-54
-60
-66
-72
-78
-84
-90
-96

-102
-108
-114

100

10k

100k

10M

100M

Attenuation (dB)

Bandwidth (Hz)

0x0000

0x1000

0x1800

0x1400

0x1200

0x1100

0x1080

0x1040

0x1020

0x1010

0x1008

0x1004

0x1002

0x1001

0x2000

Codes from
Midscale to
Zero Scale

Time (0.5 s)

Output V

oltage (20mV)

Code: 1FFFh to 2000h

LDAC Pulse

= 10V

REF

Time (0.5 s)

Output V

oltage (20mV)

Code: 2000h to 1FFFh

LDAC Pulse

= 10V

REF

DAC8806

SBAS385 APRIL 2006

TYPICAL CHARACTERISTICS: V

= +5V (continued)

At T

= +25

C, unless otherwise noted.

SUPPLY CURRENT

REFERENCE MULTIPLYING BANDWIDTH

vs LOGIC INPUT VOLTAGE

UNIPOLAR MODE

Figure 7.

Figure 8.

REFERENCE MULTIPLYING BANDWIDTH

BIPOLAR MODE

Figure 9.

Figure 10.

MIDSCALE DAC GLITCH

Figure 11.

Figure 12.

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TYPICAL CHARACTERISTICS: V

= +2.7V

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

2048

4096

6144

8192 10240 12288 14336 16383

INL (LSB)

Code

= +25°C

= 10V

REF

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

2048

4096

6144

8192 10240 12288 14336 16383

DNL (LSB)

Code

= +25°C

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

2048

4096

6144

8192 10240 12288 14336 16383

INL (LSB)

Code

= 40

°C

= 10V

REF

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

2048

4096

6144

8192 10240 12288 14336 16383

DNL (LSB)

Code

= 40

°C

= 10V

REF

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

2048

4096

6144

8192 10240 12288 14336 16383

DNL (LSB)

Code

= +85°C

= 10V

REF

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

2048

4096

6144

8192 10240 12288 14336 16383

INL (LSB)

Code

= +85°C

= 10V

REF

DAC8806

SBAS385 APRIL 2006

At T

= +25

C, unless otherwise noted.

LINEARITY ERROR

DIFFERENTIAL LINEARITY ERROR

vs DIGITAL INPUT CODE

Figure 15.

Figure 16.

LINEARITY ERROR

DIFFERENTIAL LINEARITY ERROR

vs DIGITAL INPUT CODE

Figure 17.

Figure 18.

LINEARITY ERROR

DIFFERENTIAL LINEARITY ERROR

vs DIGITAL INPUT CODE

Figure 19.

Figure 20.

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Time (0.5 s)

Output V

oltage (20mV)

Code: 2000h to 1FFFh

LDAC Pulse

= 10V

REF

Time (0.5 s)

Output V

oltage (20mV)

Code: 1FFFh to 2000h

LDAC Pulse

= 10V

REF

ull-Scale Error (mV)

= 10V

REF

4.8

3.8

2.8

1.8

0.8

1.8

2.8

3.8

4.8

-60

-40

-20

100

Temperature ( C)

-60

-40

-20

100

Bipolar

-Zero Error (mV)

Temperature ( C)

= 10V

REF

1.5

1.0

0.5

1.0

1.5

DAC8806

SBAS385 APRIL 2006

TYPICAL CHARACTERISTICS: V

= +2.7V (continued)

At T

= +25

C, unless otherwise noted.

DAC GLITCH

Figure 21.

Figure 22.

FULL-SCALE ERROR vs TEMPERATURE

BIPOLAR-ZERO ERROR vs TEMPERATURE

Figure 23.

Figure 24.

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TYPICAL CHARACTERISTICS

Time (0.5 s/div)

Output V

oltage (5V/div)

Trigger Pulse

Unipolar Mode

Voltage Output Settling

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

Temperature ( C)

- 20

(

5.0V

2.7V

100

- 40

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

-10

-5

(V)

REF

INL (LSB)

= 5V

= 2.7V

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

-10

-5

(V)

REF

INL (LSB)

= 5V

= 2.7V

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

-10

-5

(V)

REF

DNL (LSB)

= 5V

= 2.7V

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

-10

-5

(V)

REF

DNL (LSB)

= 5V

= 2.7V

DAC8806

SBAS385 APRIL 2006

At T

= +25

C, unless otherwise noted.

vs TEMPERATURE

DAC SETTLING TIME

Figure 25.

Figure 26.

INTEGRAL NONLINEARITY vs V

REF

INTEGRAL NONLINEARITY vs V

REF

UNIPOLAR MODE

BIPOLAR MODE

Figure 27.

Figure 28.

DIFFERENTIAL NONLINEARITY vs V

REF

DIFFERENTIAL NONLINEARITY vs V

REF

UNIPOLAR MODE

BIPOLAR MODE

Figure 29.

Figure 30.

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1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

1.8

2.3

2.8

3.3

3.8

(V)

4.3

4.8

5.3 5.5

= 10V

REF

= 2.5V

REF

INL (LSB)

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

1.8

2.3

2.8

3.3

3.8

(V)

4.3

4.8

5.3 5.5

= 10V

REF

= 2.5V

REF

INL (LSB)

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

1.8

2.3

2.8

3.3

3.8

(V)

4.3

4.8

5.3 5.5

= 10V

REF

= 2.5V

REF

DNL (LSB)

1.0

0.8

0.6

0.4

0.2

-0.2

-0.4

-0.6

-0.8

-1.0

1.8

2.3

2.8

3.3

3.8

(V)

4.3

4.8

5.3 5.5

= 10V

REF

= 2.5V

REF

DNL (LSB)

T
otal Harmonic Distortion (dB)

105

115

100

1000

10k 20k 30k

Frequency (Hz)

500kHz Filter

80kHz Filter
30kHz Filter

Code 3FFFh
V

= 6V

REF

RMS

= +5V

Two OPA627s
C = 20pF

T
otal Harmonic Distortion (dB)

105

115

100

1000

10k 20k 30k

Frequency (Hz)

500kHz Filter

80kHz Filter
30kHz Filter

Code 0000h
V

= 6V

REF

RMS

= +5V

Two OPA627s
C = 20pF

DAC8806

SBAS385 APRIL 2006

TYPICAL CHARACTERISTICS (continued)

At T

= +25

C, unless otherwise noted.

INTEGRAL NONLINEARITY vs

UNIPOLAR MODE

BIPOLAR MODE

Figure 31.

Figure 32.

DIFFERENTIAL NONLINEARITY vs

UNIPOLAR MODE

BIPOLAR MODE

Figure 33.

Figure 34.

BIPOLAR MULTIPLYING MODE THD

vs FREQUENCY

Figure 35.

Figure 36.

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T
otal Harmonic Distortion (dB)

105

115

100

1000

10k 20k 30k

Frequency (Hz)

500kHz Filter

80kHz Filter
30kHz Filter

Code 3FFFh
V

= 6V

REF

RMS

= +5V

One OPA627
C = 20pF

THEORY OF OPERATION

REF

OUT

GND

OUT

-V

REF

16384

(1)

DAC8806

SBAS385 APRIL 2006

TYPICAL CHARACTERISTICS (continued)

At T

= +25

C, unless otherwise noted.

UNIPOLAR MULTIPLYING MODE THD

vs FREQUENCY

Figure 37.

The DAC8806 is a multiplying, single-channel current output, 14-bit DAC. The architecture, illustrated in

Figure 38

, is an R-2R ladder configuration with the three MSBs segmented. Each 2R leg of the ladder is either

switched to GND or to the I

OUT

terminal. The I

OUT

terminal of the DAC is held at a virtual GND potential by the

use of an external I/V converter op amp. The R-2R ladder is connected to an external reference input (V

REF

) that

determines the DAC full-scale current. The R-2R ladder presents a code independent load impedance to the
external reference of 6k

25%. The external reference voltage can vary in a range of 10V to +10V, thus

providing bipolar I

OUT

current operation. By using an external I/V converter op amp and the R

resistor in the

DAC8806, an output voltage range of V

REF

to +V

REF

can be generated.

Figure 38. Equivalent R-2R DAC Circuit

The DAC output voltage is determined by V

REF

and the digital data (D) according to

Equation 1

Each DAC code determines the 2R-leg switch position to either GND or I

OUT

. The external I/V converter op amp

noise gain will also change because the DAC output impedance (as seen looking into the I

OUT

terminal) changes

versus code. Because of this, the external I/V converter op amp must have a sufficiently low offset voltage such
that the amplifier offset is not modulated by the DAC I

OUT

terminal impedance change. External op amps with

large offset voltages can produce INL errors in the transfer function of the DAC8806 because of offset
modulation versus DAC code. For best linearity performance of the DAC8806, an op amp (OPA277) is
recommended; see

Figure 39

. This circuit allows V

REF

to swing from 10V to +10V.

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OPA277

DAC8806

+15V

GND

OFS

OUT

REF

V+

15V

LWD

LDAC

RST

DATA

LDAC

RST

DAC8806

SBAS385 APRIL 2006

THEORY OF OPERATION (continued)

Figure 39. Voltage Output Configuration

Figure 40. DAC8806 Timing Diagram

Table 1. Function of Control Inputs

CONTROL INPUTS

REGISTER OPERATION

RST

LDAC

Asynchronous operation. Reset the input and DAC register to a predetermined value. The DAC8806

is reset to all 0s.

Load the input register with all 14 data bits.

Load the DAC register with the contents of the input register.

The input and DAC register are transparent.

LDAC and WR are tied together and programmed as a pulse. The 14 data bits are loaded into the

input register on the falling edge of the pulse and then loaded into the DAC register on the rising
edge of the pulse.

No register operation.

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APPLICATION INFORMATION

Multiplying Mode THD versus Frequency

Stability Circuit

DAC8806

OPA277

GND

OFS

OUT

REF

Bipolar Output Circuit

OUT

8192

REF

(2)

DAC8806

SBAS385 APRIL 2006

Figure 35

and

Figure 36

show the DAC8806 bipolar 4-quadrant multiplying mode total harmonic distortion (THD)

versus frequency.

Figure 35

shows the bipolar mode THD with the DAC8806 set to a full-scale code of 3FFFh.

Figure 36

shows the bipolar multiplying mode THD with the DAC8806 set to a minus full-scale code of 0000h. In

both graphs, two OPA627s are used for both the DAC output op amp and the reference inverting amplifier. A
6V

RMS

sine wave is used for the reference input V

REF

and is swept in frequency from 10Hz to 30kHz. The THD

levels versus frequency are illustrated at various DAC output filtering levels using an external ac-coupled
low-pass filter.

Figure 37

illustrates the DAC8806 unipolar 2-quadrant multiplying mode THD versus frequency. The DAC8806

is set to a full-scale code of 3FFFh. A single OPA627 is used for the DAC output op amp.

For a current-to-voltage (V/I) design, as shown in

Figure 41

, the DAC8806 current output (I

OUT

) and the

connection with the inverting node of the op amp should be as short as possible and laid out according to
correct printed circuit board (PCB) layout design. For each code change there is a step function. If the gain
bandwidth product (GBP) of the op amp is limited and parasitic capacitance is excessive at the inverting node,
then gain peaking is possible. Therefore, a compensation capacitor C1 (4pF to 20pF, typ) can be added to the
design for circuit stability, as shown in

Figure 41

Figure 41. Gain Peaking Prevention Circuit with Compensation Capacitor

The DAC8806, as a 4-quadrant multiplying DAC, can be used to generate a bipolar output. The polarity of the
full-scale output (I

OUT

) is the inverse of the input reference voltage at V

REF

Using a dual op amp, such as the OPA2277, full 4-quadrant operation can be achieved with minimal
components.

Figure 42

demonstrates a

10V

OUT

circuit with a fixed +10V reference.

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DAC

Parallel Bus

Input

Control

Logic

DAC

D13

RST

LDAC

REF

COM

OFS

OUT

AGND

DGND

DAC8806

OPA2277

REF

OPA2277

OUT

Programmable Current Source Circuit

(R2

)

R3) R1

REF

(3)

R1 R3(R1

)

R2)

R1(R2

)

R3 )

R1 (R2

)

R3)

(4)

DAC8806

SBAS385 APRIL 2006

Figure 42. Bipolar Output Circuit

A DAC8806 can be integrated into the circuit in

Figure 43

to implement an improved Howland current pump for

precise V/I conversions. Bidirectional current flow and high-voltage compliance are two features of the circuit.
With a matched resistor network, the load current of the circuit is shown by

Equation 3

The value of R3 in the previous equation can be reduced to increase the output current drive of U3. U3 can
drive

20mA in both directions with voltage compliance limited up to 15V by the U3 voltage supply. Elimination

of the circuit compensation capacitor (C1) in the circuit is not suggested as a result of the change in the output
impedance (Z

), according to

Equation 4

As shown in

Equation 4

, Z

with matched resistors is infinite and the circuit is optimum for use as a current

source. However, if unmatched resistors are used, Z

is positive or negative with negative output impedance

being a potential cause of oscillation. Therefore, by incorporating C1 into the circuit, possible oscillation
problems are eliminated. The value of C1 can be determined for critical applications; for most applications,
however, a value of several pF is suggested.

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DAC8806

GND

OFS

OUT

REF

10pF

OPA277

R2¢

15kW

R3¢
50kW

R1¢

150kW

R3
50W

15kW

150kW

LOAD

Cross-Reference

DAC8806

SBAS385 APRIL 2006

Figure 43. Programmable Bidirectional Current Source Circuit

The DAC8806 has an industry-standard pinout.

Table 2

provides the cross-reference information.

Table 2. Cross-Reference

SPECIFIED

CROSS-

INL

DNL

TEMPERATURE

PACKAGE

REFERENCE

PRODUCT

BIT

(LSB)

RANGE

DESCRIPTION

OPTION

PART

DAC8806IDB

C to +85

SSOP-28

LTC1591AIG

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PACKAGING INFORMATION

Orderable Device

Status

(1)

Package

Type

Package

Drawing

Pins Package

Qty

Eco Plan

(2)

Lead/Ball Finish

MSL Peak Temp

(3)

DAC8806IDB

ACTIVE

SSOP

Green (RoHS &

no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

DAC8806IDBR

ACTIVE

SSOP

2000 Green (RoHS &

no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

DAC8806IDBRG4

ACTIVE

SSOP

2000 Green (RoHS &

no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent

for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.

PACKAGE OPTION ADDENDUM

www.ti.com

22-May-2006

Addendum-Page 1

MECHANICAL DATA

MSSO002E JANUARY 1995 REVISED DECEMBER 2001

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

DB (R-PDSO-G**)

PLASTIC SMALL-OUTLINE

4040065 /E 12/01

28 PINS SHOWN

Gage Plane

8,20
7,40

0,55

0,95

0,25

12,90

12,30

10,50

8,50

Seating Plane

9,90

7,90

10,50

9,90

0,38

5,60
5,00

0,22

6,50

0,05 MIN

5,90

DIM

A MAX

A MIN

PINS **

2,00 MAX

6,90

7,50

0,65

0,15

 8

0,10

0,09

0,25

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
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Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: DAC8806IDB

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: DAC8806IDB