Document Outline
- FEATURES
- APPLICATIONS
- DESCRIPTION
- ORDERING INFORMATION
- ABSOLUTE MAXIMUM RATINGS
- ELECTRICAL CHARACTERISTICS
- PIN ASSIGNMENTS
- Terminal Functions
- FUNCTIONAL BLOCK DIAGRAM
- TYPICAL PERFORMANCE CURVES
- DIGITAL FILTER
- Digital Filter Response
- De-Emphasis Filter
- ANALOG DYNAMIC PERFORMANCE
- Supply Voltage Characteristics
- Temperature Characteristics
- SYSTEM CLOCK AND RESET FUNCTIONS
- System Clock Input
- Power-On and External Reset Functions
- AUDIO DATA INTERFACE
- Audio Serial Interface
- PCM Audio Data Formats and Timing
- (1) Standard Data Format (Right Justified); L-Channel = HIGH, R-Channel = LOW
- (2) Left Justified Data Format; L-Channel = HIGH, R-Channel = LOW
- (3) I2S Data Format; L-Channel = LOW, R-Channel = HIGH
- External Digital Filter Interface and Timing
- Direct Stream Digital (DSD) Format Interface and Timing
- SERIAL CONTROL INTERFACE (I2C)
- Slave Address
- Packet Protocol
- Write Register
- Read Register
- Noise Suppression
- TIMING DIAGRAM
- TIMING CHARACTERISTICS
- MODE CONTROL REGISTERS
- User-Programmable Mode Controls
- Register Map
- Register Definitions
- R/W\: Read/Write Mode Select
- ATx[7:0]: Digital Attenuation Level Setting
- ATx[7:0] Decimal Value Attenuation Level Setting
- R/W\: Read/Write Mode Select
- ATLD: Attenuation Load Control
- FMT[2:0]: Audio Interface Data Format
- DMF[1:0]: Sampling Frequency Selection for the De-Emphasis Function
- DME: Digital De-Emphasis Control
- MUTE: Soft Mute Control
- R/W\: Read/Write Mode Select
- REV: Output Phase Reversal
- ATS[1:0]: Attenuation Rate Select
- OPE: DAC Operation Control
- ZOE: Zero Flag Pin Operation Control
- DFMS: Stereo DF Bypass Mode Select
- FLT: Digital Filter Rolloff Control
- INZD: Infinite Zero Detect Mute Control
- R/W\: Read/Write Mode Select
- SRST: System Reset Control
- DSD: DSD Interface Mode Control
- DFTH: Digital Filter Bypass (or Through Mode) Control
- MONO: Monaural Mode Selection
- CHSL: Channel Selection for Monaural Mode
- OS[1:0]: Delta-Sigma Oversampling Rate Selection
- R/W\: Read/Write Mode Select
- DZ[1:0]: DSD Zero Output Enable
- PCMZ: PCM Zero Output Enable
- R: Read Mode Select
- ZFGx: Zero-Detection Flag
- TYPICAL CONNECTION DIAGRAM
- APPLICATION INFORMATION
- APPLICATION CIRCUIT
- I/V Section
- Differential Section
- APPLICATION FOR EXTERNAL DIGITAL FILTER INTERFACE
- Application for Interfacing With an External Digital Filter
- System Clock (SCK) and Interface Timing
- Audio Format
- Functions Available in the External Digital Filter Mode
- FMT[2:0]: Audio Data Format Selection
- OS[1:0]: Delta-Sigma Modulator Oversampling Rate Selection
- APPLICATION FOR DSD FORMAT (DSD MODE) INTERFACE
- Feature
- Pin Assignment When DSD Format Interface
- ANALOG FIR FILTER PERFORMANCE IN DSD MODE
- DSD MODE CONFIGURATION AND FUNCTION CONTROLS
- Configuration for the DSD Interface Mode
- DMF[1:0]: Analog FIR Performance Selection
- OS[1:0]: Analog-FIR Operation-Speed Selection
- Requirements for System Clock
- THEORY OF OPERATION
DSD1794
SLES077A - MARCH 2003 - REVISED NOVEMBER 2003
24 BIT, 192 kHz SAMPLING, ADVANCED SEGMENT,
AUDIO STEREO DIGITAL TO ANALOG CONVERTER
FEATURES
D
Supports Both DSD and PCM Formats
D
24-Bit Resolution
D
Analog Performance:
- Dynamic Range:
- 132 dB (9 V RMS, Mono)
- 129 dB (4.5 V RMS, Stereo)
- 127 dB (2 V RMS, Stereo)
- THD+N: 0.0004%
D
Differential Current Output: 7.8 mA p-p
D
8
Oversampling Digital Filter:
- Stop-Band Attenuation: 130 dB
- Pass-Band Ripple:
0.00001 dB
D
Sampling Frequency: 10 kHz to 200 kHz
D
System Clock: 128, 192, 256, 384, 512, or
768 f
S
With Autodetect
D
Accepts 16-, 20-, and 24-Bit Audio Data
D
PCM Data Formats: Standard, I
2
S, and
Left-Justified
D
Optional Interface to External Digital Filter or
DSP Available
D
I
2
C-Compatible Serial Port
D
User-Programmable Mode Controls:
- Digital Attenuation: 0 dB to 120 dB,
0.5 dB/Step
- Digital De-Emphasis
- Digital Filter Rolloff: Sharp or Slow
- Soft Mute
D
Dual-Supply Operation:
- 5-V Analog, 3.3-V Digital
D
5-V Tolerant Digital Inputs
D
Small 28-Lead SSOP Package, Lead-Free
Product
APPLICATIONS
D
A/V Receivers
D
SACD Player
D
DVD Players
D
HDTV Receivers
D
Car Audio Systems
D
Digital Multitrack Recorders
D
Other Applications Requiring 24-Bit Audio
DESCRIPTION
The DSD1794 is a monolithic CMOS integrated circuit that
includes stereo digital-to-analog converters and support
circuitry in a small 28-lead SSOP package. The data
converters use TI's advanced-segment DAC architecture
to achieve excellent dynamic performance and improved
tolerance to clock jitter. The DSD1794 provides balanced
current outputs, allowing the user to optimize analog
performance externally. The DSD1794 accepts the PCM
and DSD audio data formats, providing easy interfacing to
audio DSP and decoder chips. The DSD1794 also
interfaces with external digital filter devices (DF1704,
DF1706, PMD200). Sampling rates up to 200 kHz are
supported. A full set of user-programmable functions is
accessible through an I
2
C-compatible serial port.
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate
precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to
damage because very small parametric changes could cause the device not to meet its published specifications.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
Burr Brown Products
from Texas Instruments
Copyright
2003, Texas Instruments Incorporated
DSD1794
SLES077A - MARCH 2003 - REVISED NOVEMBER 2003
www.ti.com
2
ORDERING INFORMATION
PRODUCT
PACKAGE
PACKAGE CODE
OPERATION
TEMPERATURE RANGE
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA
DSD1794DB
28-lead SSOP
28DB
-25
C to 85
C
DSD1794
DSD1794DB
Tube
DSD1794DB
28-lead SSOP
28DB
-25
C to 85
C
DSD1794
DSD1794DBR
Tape and reel
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
DSD1794
Supply voltage
VCC1, VCC2L, VCC2R
-0.3 V to 6.5 V
Supply voltage
VDD
-0.3 V to 4 V
Supply voltage differences: VCC1, VCC2L, VCC2R
0.1 V
Ground voltage differences: AGND1, AGND2, AGND3L, AGND3R, DGND
0.1 V
Digital input voltage
PLRCK, PDATA, PBCK, SCK, RST, SCL, SDA(2), ADR0, ADR1, DSDL(2), DSDR(2),
DBCK
0.3 V to 6.5 V
Digital input voltage
DSDL(3), DSDR(3), SDA(3)
-0.3 V to (VDD + 0.3 V) < 4 V
Analog input voltage
-0.3 V to (VCC + 0.3 V) < 6.5 V
Input current (any pins except supplies)
10 mA
Ambient temperature under bias
-40
C to 125
C
Storage temperature
-55
C to 150
C
Junction temperature
150
C
Lead temperature (soldering)
260
C, 5 s
Package temperature (IR reflow, peak)
250
C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input mode
(3) Output mode
ELECTRICAL CHARACTERISTICS
all specifications at TA = 25
C, VCC1 = VCC2L = VCC2R = 5 V, VDD = 3.3. V, fS = 44.1 kHz, system clock = 256 fS, and 24-bit data, unless
otherwise noted
PARAMETER
TEST CONDITIONS
DSD1794DB
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
RESOLUTION
24
Bits
DATA FORMAT (PCM Mode)
Audio data interface format
Standard, I2S, left justified
Audio data bit length
16-, 20-, 24-bit selectable
Audio data format
MSB first, 2s complement
fS
Sampling frequency
10
200
kHz
System clock frequency
128, 192, 256, 384, 512, 768 fS
DATA FORMAT (DSD Mode)
Audio data interface format
DSD (direct stream digital)
Audio data bit length
1 bit
fS
Sampling frequency
2.8224
MHz
System clock frequency
2.8224
11.2896
MHz
DSD1794
SLES077A - MARCH 2003 - REVISED NOVEMBER 2003
www.ti.com
3
ELECTRICAL CHARACTERISTICS (Continued)
all specifications at TA = 25
C, VCC1 = VCC2L = VCC2R = 5 V, VDD = 3.3. V, fS = 44.1 kHz, system clock = 256 fS, and 24-bit data, unless
otherwise noted
PARAMETER
TEST CONDITIONS
DSD1794DB
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DIGITAL INPUT/OUTPUT
Logic family
TTL compatible
VIH
Input logic level
2
VDC
VIL
Input logic level
0.8
VDC
IIH
Input logic current
VIN = VDD
10
A
IIL
Input logic current
VIN = 0 V
10
A
VOH
Output logic level
IOH = -2 mA
2.4
VDC
VOL
Output logic level
IOL = 2 mA
0.4
VDC
DYNAMIC PERFORMANCE (PCM MODE, 2-V RMS OUTPUT) (1)(2)
fS = 44.1 kHz
0.0004%
0.0008%
THD+N at VOUT = 0 dB
fS = 96 kHz
0.0008%
THD+N at VOUT = 0 dB
fS = 192 kHz
0.0015%
EIAJ, A-weighted, fS = 44.1 kHz
123
127
Dynamic range
EIAJ, A-weighted, fS = 96 kHz
127
dB
Dynamic range
EIAJ, A-weighted, fS = 192 kHz
127
dB
EIAJ, A-weighted, fS = 44.1 kHz
123
127
Signal-to-noise ratio
EIAJ, A-weighted, fS = 96 kHz
127
dB
Signal-to-noise ratio
EIAJ, A-weighted, fS = 192 kHz
127
dB
fS = 44.1 kHz
120
123
Channel separation
fS = 96 kHz
122
dB
Channel separation
fS = 192 kHz
120
dB
Level linearity error
VOUT = 120 dB
1
dB
DYNAMIC PERFORMANCE (PCM Mode, 4.5-V RMS Output) (1)(3)
fS = 44.1 kHz
0.0004%
THD+N at VOUT = 0 dB
fS = 96 kHz
0.0008%
THD+N at VOUT = 0 dB
fS = 192 kHz
0.0015%
EIAJ, A-weighted, fS = 44.1 kHz
129
Dynamic range
EIAJ, A-weighted, fS = 96 kHz
129
dB
Dynamic range
EIAJ, A-weighted, fS = 192 kHz
129
dB
EIAJ, A-weighted, fS = 44.1 kHz
129
Signal-to-noise ratio
EIAJ, A-weighted, fS = 96 kHz
129
dB
Signal-to-noise ratio
EIAJ, A-weighted, fS = 192 kHz
129
dB
fS = 44.1 kHz
124
Channel separation
fS = 96 kHz
123
dB
Channel separation
fS = 192 kHz
121
dB
(1) Filter condition:
THD+N: 20-Hz HPF, 20-kHz apogee LPF
Dynamic range: 20-Hz HPF, 20-kHz AES17 LPF, A-weighted
Signal-to-noise ratio: 20-Hz HPF, 20-kHz AES17 LPF, A-weighted
Channel separation: 20-Hz HPF, 20-kHz AES17 LPF
Analog performance specifications are measured using the System Two
t
Cascade audio measurement system by Audio Precision
in the
averaging mode.
(2) Dynamic performance and dc accuracy are specified at the output of the postamplifier as shown in Figure 33.
(3) Dynamic performance and dc accuracy are specified at the output of the postamplifier as shown in Figure 34.
Audio Precision and System Two are trademarks of Audio Precision, Inc.
Other trademarks are the property of their respective owners.
DSD1794
SLES077A - MARCH 2003 - REVISED NOVEMBER 2003
www.ti.com
4
ELECTRICAL CHARACTERISTICS (Continued)
all specifications at TA = 25
C, VCC1 = VCC2L = VCC2R = 5 V, VDD = 3.3. V, fS = 44.1 kHz, system clock = 256 fS, and 24-bit data, unless
otherwise noted
PARAMETER
TEST CONDITIONS
DSD1794DB
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DYNAMIC PERFORMANCE (MONO MODE) (1)(2)
fS = 44.1 kHz
0.0004%
THD+N at VOUT = 0 dB
fS = 96 kHz
0.0008%
THD+N at VOUT = 0 dB
fS = 192 kHz
0.0015%
EIAJ, A-weighted, fS = 44.1 kHz
132
Dynamic range
EIAJ, A-weighted, fS = 96 kHz
132
dB
Dynamic range
EIAJ, A-weighted, fS = 192 kHz
132
dB
EIAJ, A-weighted, fS = 44.1 kHz
132
Signal-to-noise ratio
EIAJ, A-weighted, fS = 96 kHz
132
dB
Signal-to-noise ratio
EIAJ, A-weighted, fS = 192 kHz
132
dB
DSD MODE DYNAMIC PERFORMANCE (1) (3) (44.1 kHz, 64 FS)
THD+N at FS
4.5 V rms
0.0005%
Dynamic range
60 dB, EIAJ, A-weighted
128
dB
Signal-to-noise ratio
EIAJ, A-weighted
128
dB
ANALOG OUTPUT
Gain error
6
2
6
% of FSR
Gain mismatch, channel-to-channel
3
0.5
3
% of FSR
Bipolar zero error
At BPZ
2
0.5
2
% of FSR
Output current
Full scale (0 dB)
7.8
mA p-p
Center current
At BPZ
6.2
mA
DIGITAL FILTER PERFORMANCE
De-emphasis error
0.004
dB
FILTER CHARACTERISTICS-1: SHARP ROLLOFF
Pass band
0.00001 dB
0.454 fS
Pass band
3 dB
0.49 fS
Stop band
0.546 fS
Pass-band ripple
0.00001
dB
Stop-band attenuation
Stop band = 0.546 fS
130
dB
Delay time
55/fS
s
FILTER CHARACTERISTICS-2: SLOW ROLLOFF
Pass band
0.04 dB
0.254 fS
Pass band
3 dB
0.46 fS
Stop band
0.732 fS
Pass-band ripple
0.001
dB
Stop-band attenuation
Stop band = 0.732 fS
100
dB
Delay time
18/fS
s
(1) Filter condition:
THD+N: 20-Hz HPF, 20-kHz apogee LPF
Dynamic range: 20-Hz HPF, 20-kHz AES17 LPF, A-weighted
Signal-to-noise ratio: 20-Hz HPF, 20-kHz AES17 LPF, A-weighted
Channel separation: 20-Hz HPF, 20-kHz AES17 LPF
Analog performance specifications are measured using the System Two Cascade audio measurement system by Audio Precision in the averaging
mode.
(2) Dynamic performance and dc accuracy are specified at the output of the postamplifier as shown in Figure 34.
(3) Dynamic performance and dc accuracy are specified at the output of the postamplifier as shown in Figure 35.
DSD1794
SLES077A - MARCH 2003 - REVISED NOVEMBER 2003
www.ti.com
5
ELECTRICAL CHARACTERISTICS (Continued)
all specifications at TA = 25
C, VCC1 = VCC2L = VCC2R = 5 V, VDD = 3.3. V fS = 44.1 kHz, system clock = 256 fS, and 24-bit data, unless
otherwise noted
PARAMETER
TEST CONDITIONS
DSD1794DB
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLY REQUIREMENTS
VDD
3
3.3
3.6
VDC
VCC1
Voltage range
VCC2L
Voltage range
4.75
5
5.25
VDC
VCC2R
(1)
fS = 44.1 kHz
12
15
IDD
(1)
fS = 96 kHz
23
mA
IDD
Supply current (1)
fS = 192 kHz
45
mA
Supply current (1)
fS = 44.1 kHz
33
40
ICC
fS = 96 kHz
35
mA
ICC
fS = 192 kHz
37
mA
(1)
fS = 44.1 kHz
205
250
Power dissipation (1)
fS = 96 kHz
250
mW
Power dissipation (1)
fS = 192 kHz
335
mW
TEMPERATURE RANGE
Operation temperature
25
85
C
JA
Thermal resistance
28-pin SSOP
100
C/W
(1) Input is BPZ data.
PIN ASSIGNMENTS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DSDL
DSDR
DBCK
PLRCK
PDATA
PBCK
SCK
DGND
V
DD
ADR0
ADR1
SCL
SDA
RST
V
CC
2L
AGND3L
I
OUT
L-
I
OUT
L+
AGND2
V
CC
1
V
COM
L
V
COM
R
I
REF
AGND1
I
OUT
R-
I
OUT
R+
AGND3R
V
CC
2R
DSD1794
(TOP VIEW)
PDF 
ZIP