DSD1796

24 BIT, 192 kHz SAMPLING, ADVANCED SEGMENT,

AUDIO STEREO DIGITAL TO ANALOG CONVERTER

SLES101 DECEMBER 2003

FEATURES

Supports Both DSD and PCM Formats

24-Bit Resolution

Analog Performance:

- Dynamic Range: 123 dB
- THD+N: 0.0005%

Differential Current Output: 4 mA p-p

Oversampling Digital Filter:

- Stop-Band Attenuation: 98 dB
- Pass-Band Ripple:

0.0002 dB

Sampling Frequency: 10 kHz to 200 kHz

System Clock: 128, 192, 256, 384, 512, or
768 f

With Autodetect

Accepts 16-, 20-, and 24-Bit Audio Data

PCM Data Formats: Standard, I

S, and

Left-Justified

DSD Format Interface Available

Interface Available for Optional External
Digital Filter or DSP

TDMCA Interface Available

User-Programmable Mode Controls:

- Digital Attenuation: 0 dB to 120 dB,

0.5 dB/Step

- Digital De-Emphasis
- Digital Filter Rolloff: Sharp or Slow
- Soft Mute

Compatible With DSD1792 (Pins and Mode
Controls)

Dual Supply Operation:

- 5 V Analog, 3.3 V Digital

5-V Tolerant Digital Inputs

Small 28-Lead SSOP Package, Lead-Free
Product

APPLICATIONS

A/V Receivers

SACD Players

DVD Players

HDTV Receivers

Car Audio Systems

Digital Multi-Track Recorders

Other Applications Requiring 24-Bit Audio

DESCRIPTION

The DSD1796 is a monolithic CMOS integrated circuit that
includes stereo digital-to-analog converters and support
circuitry in a small 28-lead SSOP package. The data
converters use TI's advanced-segment DAC architecture
to achieve excellent dynamic performance and improved
tolerance to clock jitter. The DSD1796 provides balanced
current outputs, allowing the user to optimize analog
performance externally. The DSD1796 accepts the PCM
and DSD audio data formats, providing easy interfacing to
audio DSP and decoder chips. The DSD1796 also
interfaces with external digital filter devices (DF1704,
DF1706, PMD200). Sampling rates up to 200 kHz are
supported. A full set of user-programmable functions is
accessible through an SPI serial control port, which
supports register write and readback functions. The
DSD1796 also supports the time-division-multiplexed
command and audio (TDMCA) data format.

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate
precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to
damage because very small parametric changes could cause the device not to meet its published specifications.

PRODUCTION DATA information is current as of publication date. Products

conform to specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.

Burr Brown Products

from Texas Instruments

2003, Texas Instruments Incorporated

DSD1796

SLES101 DECEMBER 2003

www.ti.com

ORDERING INFORMATION

PRODUCT

PACKAGE

PACKAGE CODE

OPERATION

TEMPERATURE RANGE

PACKAGE

MARKING

ORDERING

NUMBER

TRANSPORT

MEDIA

DSD1796DB

28-lead SSOP

28DB

C to 85

DSD1796

DSD1796DB

Tube

DSD1796DB

28-lead SSOP

28DB

C to 85

DSD1796

DSD1796DBR

Tape and reel

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted(1)

DSD1796

Supply voltage

VCC1, VCC2L, VCC2R

0.3 V to 6.5 V

Supply voltage

VDD

0.3 V to 4 V

Supply voltage differences: VCC1, VCC2L, VCC2R

0.1 V

Ground voltage differences: AGND1, AGND2, AGND3L, AGND3R, DGND

0.1 V

Digital input voltage

PLRCK, PDATA, PBCK, SCK, RST, MS(2), MDI, MC, DSDL(2), DSDR(2), DBCK

0.3 V to 6.5 V

Digital input voltage

DSDL(3), DSDR(3), MS(3), MDO

0.3 V to (VDD + 0.3 V) < 4 V

Analog input voltage

0.3 V to (VCC + 0.3 V) < 6.5 V

Input current (any pins except supplies)

10 mA

Ambient temperature under bias

C to 125

Storage temperature

C to 150

Junction temperature

150

Lead temperature (soldering)

260

C, 5 s

Package temperature (IR reflow, peak)

260

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Input mode
(3) Output mode

ELECTRICAL CHARACTERISTICS

all specifications at TA = 25

C, VCC1 = VCC2L = VCC2R = 5 V, VDD = 3.3 V, fS = 44.1 kHz, system clock = 256 fS, and 24-bit data unless

otherwise noted

PARAMETER

TEST CONDITIONS

DSD1796DB

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

RESOLUTION

Bits

DATA FORMAT (PCM Mode)

Audio data interface format

Standard, I2S, left-justified

Audio data bit length

16-, 20-, 24-bit selectable

Audio data format

MSB first, 2s complement

Sampling frequency

200

kHz

System clock frequency

128, 192, 256, 384, 512, 768 fS

DATA FORMAT (DSD Mode)

Audio data interface format

DSD (direct stream digital)

Audio data bit length

1 bit

Sampling frequency

2.8224

MHz

System clock frequency

2.8224

11.2896

MHz

DSD1796

SLES101 DECEMBER 2003

www.ti.com

ELECTRICAL CHARACTERISTICS (Continued)

all specifications at TA = 25

C, VCC1 = VCC2L = VCC2R = 5 V, VDD = 3.3 V, fS = 44.1 kHz, system clock = 256 fS, and 24-bit data unless

otherwise noted

PARAMETER

TEST CONDITIONS

DSD1796DB

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

DIGITAL INPUT/OUTPUT

Logic family

TTL compatible

VIH

Input logic level

VDC

VIL

Input logic level

0.8

VDC

IIH

Input logic current

VIN = VDD

IIL

Input logic current

VIN = 0 V

VOH

Output logic level

IOH = 2 mA

2.4

VDC

VOL

Output logic level

IOL = 2 mA

0.4

VDC

IOHZ

High-impedance output logic current(1)

VOUT = VDD

IOLZ

High-impedance output logic current(1)

VOUT = 0 V

DYNAMIC PERFORMANCE (PCM MODE) (2)(3)

fS = 44.1 kHz

0.0005%

0.001%

THD+N at VOUT = 0 dB

fS = 96 kHz

0.001%

THD+N at VOUT = 0 dB

fS = 192 kHz

0.0015%

EIAJ, A-weighted, fS = 44.1 kHz

120

123

Dynamic range

EIAJ, A-weighted, fS = 96 kHz

123

Dynamic range

EIAJ, A-weighted, fS = 192 kHz

123

EIAJ, A-weighted, fS = 44.1 kHz

120

123

Signal-to-noise ratio

EIAJ, A-weighted, fS = 96 kHz

123

Signal-to-noise ratio

EIAJ, A-weighted, fS = 192 kHz

123

fS = 44.1 kHz

116

119

Channel separation

fS = 96 kHz

118

Channel separation

fS = 192 kHz

117

Level linearity error

VOUT = 120 dB

DYNAMIC PERFORMANCE (MONO MODE) (2)(3)(4)

fS = 44.1 kHz

0.0005%

THD+N at VOUT = 0 dB

fS = 96 kHz

0.001%

THD+N at VOUT = 0 dB

fS = 192 kHz

0.0015%

EIAJ, A-weighted, fS = 44.1 kHz

126

Dynamic range

EIAJ, A-weighted, fS = 96 kHz

126

Dynamic range

EIAJ, A-weighted, fS = 192 kHz

126

EIAJ, A-weighted, fS = 44.1 kHz

126

Signal-to-noise ratio

EIAJ, A-weighted, fS = 96 kHz

126

Signal-to-noise ratio

EIAJ, A-weighted, fS = 192 kHz

126

(1) Pin 13 (MDO)
(2) Filter condition:

THD+N: 20-Hz HPF, 20-kHz AES17 LPF
Dynamic range: 20-Hz HPF, 20-kHz AES17 LPF, A-weighted
Signal-to-noise ratio: 20-Hz HPF, 20-kHz AES17 LPF, A-weighted
Channel separation: 20-Hz HPF, 20-kHz AES17 LPF
Analog performance specifications are measured using the System Two

Cascade audio measurement system by Audio Precision

in the

averaging mode.

(3) Dynamic performance and DC accuracy are specified at the output of the postamplifier as shown in Figure 32.
(4) Dynamic performance and DC accuracy are specified at the output of the measurement circuit as shown in Figure 34.

Audio Precision and System Two are trademarks of Audio Precision, Inc.
Other trademarks are the property of their respective owners.

DSD1796

SLES101 DECEMBER 2003

www.ti.com

ELECTRICAL CHARACTERISTICS (Continued)

all specifications at TA = 25

C, VCC1 = VCC2L = VCC2R = 5 V, VDD = 3.3 V, fS = 44.1 kHz, system clock = 256 fS, and 24-bit data unless

otherwise noted

PARAMETER

TEST CONDITIONS

DSD1796DB

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

DSD MODE DYNAMIC PERFORMANCE (1) (2) (44.1 kHz, 64 fS)

THD+N at FS

2 V rms

0.0007%

Dynamic range

60 dB, EIAJ, A-weighted

122

Signal-to-noise ratio

EIAJ, A-weighted

122

ANALOG OUTPUT

Gain error

% of FSR

Gain mismatch, channel-to-channel

0.5

% of FSR

Bipolar zero error

At BPZ

0.5

% of FSR

Output current

Full scale (0 dB)

mA p-p

Center current

At BPZ

3.5

DIGITAL FILTER PERFORMANCE

De-emphasis error

0.1

FILTER CHARACTERISTICS-1: SHARP ROLLOFF

Pass band

0.0002 dB

0.454 fS

Pass band

3 dB

0.49 fS

Stop band

0.546 fS

Pass-band ripple

0.0002

Stop-band attenuation

Stop band = 0.546 fS

Delay time

38/fS

FILTER CHARACTERISTICS-2: SLOW ROLLOFF

Pass band

0.001 dB

0.21 fS

Pass band

3 dB

0.448 fS

Stop band

0.79 fS

Pass-band ripple

0.001

Stop-band attenuation

Stop band = 0.732 fS

Delay time

38/fS

(1) Filter condition:

(2) Dynamic performance and DC accuracy are specified at the output of the postamplifier as shown in Figure 33.

DSD1796

SLES101 DECEMBER 2003

www.ti.com

ELECTRICAL CHARACTERISTICS (Continued)

all specifications at TA = 25

C, VCC1 = VCC2L = VCC2R = 5 V,, VDD = 3.3 V, fS = 44.1 kHz, system clock = 256 fS, and 24-bit data unless

otherwise noted

PARAMETER

TEST CONDITIONS

DSD1796DB

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

POWER SUPPLY REQUIREMENTS

VDD

3.3

3.6

VDC

VCC1

Voltage range

VCC2L

Voltage range

4.75

5.25

VDC

VCC2R

(1)

fS = 44.1 kHz

IDD

(1)

fS = 96 kHz

IDD

Supply current (1)

fS = 192 kHz

Supply current (1)

fS = 44.1 kHz

ICC

fS = 96 kHz

ICC

fS = 192 kHz

(1)

fS = 44.1 kHz

115

150

Power dissipation (1)

fS = 96 kHz

140

Power dissipation (1)

fS = 192 kHz

180

TEMPERATURE RANGE

Operation temperature

Thermal resistance

28-pin SSOP

100

C/W

(1) Input is BPZ data.

PIN ASSIGNMENTS

DSDL

DSDR

DBCK

PLRCK

PDATA

PBCK

SCK

DGND

MDI

MDO

RST

AGND3L
I

OUT

L+

AGND2
V

COM

REF

AGND1
I

OUT

R+

AGND3R
V

DSD1796

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