ONET2501PA
155 Mbps TO 2.5 Gbps LIMITING AMPLIFIER
SLLS602A - MARCH 2004 - REVISED JULY 2004
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
features
D
Multi-Rate Operation from 155 Mbps Up to
2.5 Gbps
D
Low Power Consumption
D
Input Offset Cancellation
D
High Input Dynamic Range
D
Output Disable
D
Output Polarity Select
D
CML Data Outputs
D
Receive Signals Strength Indicator (RSSI)
D
Loss of Signal Detection
D
Single 3.3-V Supply
D
Surface Mount Small Footprint 3 mm
3 mm 16-Pin QFN Package
applications
D
SONET/SDH Transmission Systems at OC3,
OC12, OC24, OC48
D
1.0625-Gbps and 2.125-Gbps Fibre Channel
Receivers
D
Gigabit Ethernet Receivers
description
The ONET2501PA is a versatile high-speed limiting amplifier for multiple fiber optic applications with data rates
up to 2.5 Gbps.
This device provides a gain of about 50 dB, which ensures a fully differential output swing for input signals as
low as 3 mV
p-p
.
The high input signal dynamic range ensures low jitter output signals even when overdriven with input signal
swings as high as 1200 mV
p-p
.
The ONET2501PA is available in a small footprint 3 mm
3 mm 16-pin QFN package. The circuit requires a
single 3.3-V supply.
This power efficient limiting amplifier is characterized for operation from 40
C to 85
C
available options
TA
PACKAGED DEVICE
FEATURES
-40
C to 85
C
ONET2501PARGT
2.5-Gbps limiting amplifier with LOS and RSSI
Copyright
2004, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ONET2501PA
155 Mbps TO 2.5 Gbps LIMITING AMPLIFIER
SLLS602A - MARCH 2004 - REVISED JULY 2004
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
block diagram
A simplified block diagram of the ONET2501PA is shown in Figure 1.
These compact, low power 2.5-Gbps limiting amplifiers consist of a high-speed data path with offset cancellation
block, a loss of signal and RSSI detection block, and a bandgap voltage reference and bias current generation
block.
The limiting amplifier requires a single 3.3-V supply voltage. All circuit parts are described in detail below.
+
Input Buffer
DOUT+
DOUT-
DIN+
DIN-
+
Gain Stage
+
+
+
COC2 COC1
DISABLE
LOS
TH
VCC
GND
OUTPOL
Bandgap Voltage
Reference and
Bias Current
Generation
Gain Stage
Gain Stage
Loss of Signal
and
RSSI Detection
Offset
Cancellation
-
-
VCCO
RSSI
CML
Output
Buffer
Figure 1. Block Diagram
high-speed data path
The high-speed data signal is applied to the data path by means of the input signal pins DIN+/DIN. The data
path consists of the input stage with 2
50-
on-chip line termination to VCC, three gain stages, which provide
the required typical gain of about 50 dB, and a CML output stage. The amplified data output signal is available
at the output pins DOUT+/DOUT, which provide 2
50-
back-termination to VCCO. The output stage also
includes a data polarity switching function, which is controlled by the OUTPOL input, and a disable function,
controlled by the signal applied to the DISABLE input pin.
An offset cancellation compensates inevitable internal offset voltages and thus ensures proper operation even
for very small input data signals.
The low frequency cutoff is as low as 45 kHz with the built-in filter capacitor.
For applications, which require even lower cutoff frequencies, an additional external filter capacitor may be
connected to the COC1/COC2 pins.
los of signal and RSSI detection
The output signal of the input buffer is monitored by the loss of signal and RSSI detection circuitry. In this block
a signal is generated, which is linear proportional to the input amplitude over a wide input voltage range. This
signal is available at the RSSI output pin.
Furthermore, this circuit block compares the input signal to a threshold, which can be programmed by means
of an external resistor connected to the TH pin. If the input signal falls below the specified threshold, a loss of
signal is indicated at the LOS pin.
ONET2501PA
155 Mbps TO 2.5 Gbps LIMITING AMPLIFIER
SLLS602A - MARCH 2004 - REVISED JULY 2004
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
bandgap voltage and bias generation
The ONET2501PA limiting amplifier is supplied by a single 3.3-V
10% supply voltage connected to the VCC
and VCCO pins. This voltage is referred to ground (GND).
An on-chip bandgap voltage circuitry generates a supply voltage independent reference from which all other
internally required voltages and bias currents are derived.
package
For the ONET2501PA a small footprint 3 mm
3 mm 16-pin QFN Package is used, with
a lead pitch of 0,5 mm.
The pinout is shown in Figure 2.
VCC
DIN+
DIN-
VCC
VCCO
DOUT+
DOUT-
OUTPOL
GND
GND
RSSI
LOS
DISABLE
COC2
COC1
TH
Figure 2. Pinout of ONET2501PA in a 3 mm
y
3 mm 16-Pin QFN Package
terminal functions
The following table shows a pin description for the ONET2501PA in a 3 mm x 3 mm 16-pin QFN package.
TERMINAL
TYPE
DESCRIPTION
NAME
NO.
TYPE
DESCRIPTION
VCC
1, 4
Supply
3.3-V
10% supply voltage
DIN
+
2
Analog in
Noninverted data input. On-chip 50-
terminated to VCC.
DIN
3
Analog in
Inverted data input. On-chip 50-
terminated to VCC.
TH
5
Analog in
LOS threshold adjustment with resistor to GND.
DISABLE
6
CMOS in
Disables CML output stage when set to high level.
LOS
7
CMOS out
High level indicates that the input signal amplitude is below the programmed threshold level.
GND
8, 16, EP
Supply
Circuit ground. Exposed die pad (EP) must be grounded.
OUTPOL
9
CMOS in
Output data signal polarity select (internally pulled up): Setting to high level or leaving pin open selects
normal polarity. Low level selects inverted polarity.
DOUT
10
CML out
Inverted data output. On-chip 50-
back-terminated to VCCO
DOUT+
11
CML out
Noninverted data output. On-chip 50-
back-terminated to VCCO
VCCO
12
Supply
3.3-V
10% supply voltage for output stage
RSSI
13
Analog out
Analog output voltage proportional to the input data amplitude. Indicates the strength of the received
signal (RSSI).
COC1
14
Analog
Offset cancellation filter capacitor terminal 1. Connect an additional filter capacitor between this pin
and COC2 (pin 15). To disable the offset cancellation loop connect COC1 and COC2 (pins 14 and 15).
COC2
15
Analog
Offset cancellation filter capacitor terminal 2. Connect an additional filter capacitor between this pin
and COC1 (pin 14). To disable the offset cancellation loop connect COC1 and COC2 (pins 14 and 15).
ONET2501PA
155 Mbps TO 2.5 Gbps LIMITING AMPLIFIER
SLLS602A - MARCH 2004 - REVISED JULY 2004
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings
over operating free-air temperature range unless otherwise noted
VALUE
UNIT
VCC, VCCO
Supply voltage, See Note 1
0.3 to 4
V
VDIN+, VDIN-
Voltage at DIN+, DIN, See Note 1
0.5 to 4
V
VTH, VDISABLE, VLOS, VOUTPOL, VDOUT+,
VDOUT-, VRSSI, VCOC1, VCOC2+
Voltage at TH, DISABLE, LOS, OUTPOL, DOUT+, DOUT, RSSI,
COC1, and COC2, See Note 1
0.3 to 4
V
VCOC,DIFF
Differential voltage between COC1 and COC2
1
V
VDIN,DIFF
Differential voltage between DIN+ and DIN
2.5
V
ILOS
Current into LOS
1 to 9
mA
IDIN+, IDIN-, IDOUT+, IDOUT
Continuous current at inputs and outputs
25 to 25
mA
ESD
ESD rating at all pins
3
kV (HBM)
TJ(max)
Maximum junction temperature
125
C
Tstg
Storage temperature range
-65 to 85
C
TA
Characterized free-air operating temperature range
-40 to 85
C
TL
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to network ground terminal.
recommended operating conditions
MIN
TYP
MAX
UNIT
Supply voltage, VCC, VCCO
3
3.3
3.6
V
Operating free-air temperature, TA
-40
85
C
dc electrical characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VCC, VCCO Supply voltage
3
3.3
3.6
V
ICC
Supply current
DISABLE = low (excludes CML output current)
32
40
mA
VOD
Differential data output voltage swing
DISABLE = high
0.25
10
mVp-p
VOD
Differential data output voltage swing
DISABLE = low
600
780
1200
mVp-p
rIN, rOUT
Data input/output resistance
Single ended
50
RSSI output voltage
Input = 2 mVp-p, RRSSI
10 k
100
mV
RSSI output voltage
Input = 80 mVp-p, RRSSI
10 k
2800
mV
RSSI linearity
20-dB input signal, VIN
60 mVpp
3%
8%
V(IN_MIN)
Data input sensitivity
BER < 1010
3
5
mVp-p
V(IN_MAX) Data input overload
1200
mVp-p
CMOS input high voltage
2.1
V
CMOS input low voltage
0.6
V
LOS high voltage
ISOURCE = 30
A
2.4
V
LOS low voltage
ISINK = 1 mA
0.8
V
LOS hysteresis
223-1 PRBS (at 2.5 Gbps and 155 Mbps)
2.5
4.5
dB
VTH
LOS assert threshold range
223-1 PRBS (at 2.5 Gbps and 155 Mbps)
2-40
mVp-p
PSNR
Power supply noise rejection
f < 2 MHz
26
dB
ONET2501PA
155 Mbps TO 2.5 Gbps LIMITING AMPLIFIER
SLLS602A - MARCH 2004 - REVISED JULY 2004
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
ac electrical characteristics
over recommended operating conditions (unless otherwise noted) typical operating condition is at V
CC
= 3.3 V and
T
A
= 25
C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Low frequency -3-dB bandwidth
COC = open
45
70
kHz
Low frequency -3-dB bandwidth
COC = 2.2 nF
0.8
kHz
Data rate
2.5
Gb/s
vNI
Input referred noise
300
VRMS
K28.5 pattern at 2.5 Gbps
8.5
25
DJ
Deterministic jitter, See Note 2
223-1 PRBS equivalent pattern at 2.5 Gbps
9.3
30
psp-p
DJ
Deterministic jitter, See Note 2
223-1 PRBS equivalent pattern at 155 Mbps
25
50
psp-p
RJ
Random jitter
Input = 5 mVpp
6.5
psRMS
RJ
Random jitter
Input = 10 mVpp
3
psRMS
tr
Output rise time
20% to 80%
60
85
ps
tf
Output fall time
20% to 80%
60
85
ps
tDIS
Disable response time
20
ns
tLOS
LOS assert/deassert time
2
100
s
NOTE 2: Deterministic jitter does not include pulse-width distortion due to residual small output offset voltage.
APPLICATION INFORMATION
Figure 3 shows the ONET2501PA connected with an ac-coupled interface to the data signal source as well as
to the output load.
Besides the ac-coupling capacitors C
1
through C
4
in the input and output data signal lines, the only required
external component is the LOS threshold setting resistor R
TH
. In addition, an optional external filter capacitor
(C
OC
) may be used if a low cutoff frequency is desired.
VCC
DIN+
DIN-
DISABLE
LOS
DOUT-
DOUT+
C3
C4
C1
C2
GND
DIN+
DIN-
DOUT-
DOUT+
GND
VCCO
OUTPOL
VCC
VCC
RSSI
LOS
DISABLE
ONET2501PA
16 Pin QFN
COC2
COC1
OUTPOL
RTH
TH
RSSI
COC
Optional
Figure 3. Basic Application Circuit With AC-Coupled I/Os
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
MSL Peak Temp
(3)
ONET2501PARGT
ACTIVE
QFN
RGT
16
121
TBD
CU NIPDAU
Level-2-220C-1 YEAR
ONET2501PARGTR
ACTIVE
QFN
RGT
16
3000
TBD
CU NIPDAU
Level-2-220C-1 YEAR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco
Plan
-
The
planned
eco-friendly
classification:
Pb-Free
(RoHS)
or
Green
(RoHS
&
no
Sb/Br)
-
please
check
http://www.ti.com/productcontent
for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2005
Addendum-Page 1
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