SN54LVTH125, SN74LVTH125
3.3 V ABT QUADRUPLE BUS BUFFERS
WITH 3 STATE OUTPUTS
SCBS703I - AUGUST 1997 - REVISED OCTOBER 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V V
CC
)
D
Support Unregulated Battery Operation
Down to 2.7 V
D
Typical V
OLP
(Output Ground Bounce)
<0.8 V at V
CC
= 3.3 V, T
A
= 25
C
D
I
off
and Power-Up 3-State Support Hot
Insertion
D
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D
Latch-Up Performance Exceeds 500 mA Per
JESD 17
D
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
SN54LVTH125 . . . J OR W PACKAGE
SN74LVTH125 . . . D, DB, DGV, NS,
OR PW PACKAGE
(TOP VIEW)
SN54LVTH125 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OE
1A
1Y
2OE
2A
2Y
GND
V
CC
4OE
4A
4Y
3OE
3A
3Y
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
4A
NC
4Y
NC
3OE
1Y
NC
2OE
NC
2A
1A
1OE
NC
3Y
3A
V
4OE
2Y
GND
NC
CC
NC - No internal connection
SN74LVTH125 . . . RGY PACKAGE
(TOP VIEW)
1
14
7
8
2
3
4
5
6
13
12
11
10
9
4OE
4A
4Y
3OE
3A
1A
1Y
2OE
2A
2Y
1OE
3Y
V
GND
CC
description/ordering information
These bus buffers are designed specifically for low-voltage (3.3-V) V
CC
operation, but with the capability to
provide a TTL interface to a 5-V system environment.
The 'LVTH125 devices feature independent line drivers with 3-state outputs. Each output is in the
high-impedance state when the associated output-enable (OE) input is high.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QFN - RGY
Tape and reel
SN74LVTH125RGYR
LXH125
SOIC - D
Tube
SN74LVTH125D
LVTH125
SOIC - D
Tape and reel
SN74LVTH125DR
LVTH125
-40
C to 85
C
SOP - NS
Tape and reel
SN74LVTH125NSR
LVTH125
-40
C to 85
C
SSOP - DB
Tape and reel
SN74LVTH125DBR
LXH125
TSSOP - PW
Tube
SN74LVTH125PW
LXH125
TSSOP - PW
Tape and reel
SN74LVTH125PWR
LXH125
TVSOP - DGV
Tape and reel
SN74LVTH125DGVR
LXH125
CDIP - J
Tube
SNJ54LVTH125J
SNJ54LVTH125J
-55
C to 125
C
CFP - W
Tube
SNJ54LVTH125W
SNJ54LVTH125W
-55 C to 125 C
LCCC - FK
Tube
SNJ54LVTH125FK
SNJ54LVTH125FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright
2003, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN54LVTH125, SN74LVTH125
3.3 V ABT QUADRUPLE BUS BUFFERS
WITH 3 STATE OUTPUTS
SCBS703I - AUGUST 1997 - REVISED OCTOBER 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
When V
CC
is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V
CC
through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using I
off
and power-up 3-state. The I
off
circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
logic diagram (positive logic)
1
1OE
2
1A
1Y
3
4
2OE
5
2A
2Y
6
10
3OE
9
3A
3Y
8
13
4OE
12
4A
4Y
11
Pin numbers shown are for the D, DB, DGV, J, NS, PW, RGY, and W packages.
SN54LVTH125, SN74LVTH125
3.3 V ABT QUADRUPLE BUS BUFFERS
WITH 3 STATE OUTPUTS
SCBS703I - AUGUST 1997 - REVISED OCTOBER 2003
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
-0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1)
-0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high-impedance
or power-off state, V
O
(see Note 1)
-0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state, V
O
(see Note 1)
-0.5 V to V
CC
+ 0.5 V
. . . . . . . . . . . . .
Current into any output in the low state, I
O
: SN54LVTH125 96
mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74LVTH125 128
mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current into any output in the high state, I
O
(see Note 2): SN54LVTH125
48 mA
. . . . . . . . . . . . . . . . . . . . . . .
SN74LVTH125 64
mA
. . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0)
-50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0)
-50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 3): D package
86
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): DB package
96
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): DGV package
127
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): NS package
76
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): PW package
113
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 4): RGY package
47
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
-65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This current flows only when the output is in the high state and VO > VCC.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. The package thermal impedance is calculated in accordance with JESD 51-5.
recommended operating conditions (see Note 5)
SN54LVTH125
SN74LVTH125
UNIT
MIN
MAX
MIN
MAX
UNIT
VCC
Supply voltage
2.7
3.6
2.7
3.6
V
VIH
High-level input voltage
2
2
V
VIL
Low-level input voltage
0.8
0.8
V
VI
Input voltage
5.5
5.5
V
IOH
High-level output current
-24
-32
mA
IOL
Low-level output current
48
64
mA
t/
v
Input transition rise or fall rate
Outputs enabled
10
10
ns/V
t/
VCC
Power-up ramp rate
200
200
s/V
TA
Operating free-air temperature
-55
125
-40
85
C
NOTE 5: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
SN54LVTH125, SN74LVTH125
3.3 V ABT QUADRUPLE BUS BUFFERS
WITH 3 STATE OUTPUTS
SCBS703I - AUGUST 1997 - REVISED OCTOBER 2003
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54LVTH125
SN74LVTH125
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
VIK
VCC = 2.7 V,
II = -18 mA
-1.2
-1.2
V
VCC = 2.7 V to 3.6 V,
IOH = -100
A
VCC-0.2
VCC-0.2
VOH
VCC = 2.7 V,
IOH = -8 mA
2.4
2.4
V
VOH
VCC = 3 V
IOH = -24 mA
2
V
VCC = 3 V
IOH = -32 mA
2
VCC = 2.7 V
IOL = 100
A
0.2
0.2
VCC = 2.7 V
IOL = 24 mA
0.5
0.5
VOL
IOL = 16 mA
0.4
0.4
V
VOL
VCC = 3 V
IOL = 32 mA
0.5
0.5
V
VCC = 3 V
IOL = 48 mA
0.55
IOL = 64 mA
0.55
VCC = 0 or 3.6 V,
VI = 5.5 V
10
10
II
Control
inputs
VCC = 3.6 V,
VI = VCC or GND
1
1
A
II
Data inputs
VCC = 3.6 V
VI = VCC
1
1
A
Data inputs
VCC = 3.6 V
VI = 0
-5
-5
Ioff
VCC = 0,
VI or VO = 0 to 4.5 V
100
A
VCC = 3 V
VI = 0.8 V
75
75
II(hold) Data inputs
VCC = 3 V
VI = 2 V
-75
-75
A
II(hold) Data inputs
VCC = 3.6 V,
VI = 0 to 3.6 V
500
A
IOZH
VCC = 3.6 V,
VO = 3 V
5
5
A
IOZL
VCC = 3.6 V,
VO = 0.5 V
-5
-5
A
IOZPU
VCC = 0 to 1.5 V, VO = 0.5 V to 3 V,
OE = don't care
50
50
A
IOZPD
VCC = 1.5 V to 0, VO = 0.5 V to 3 V,
OE = don't care
50
50
A
VCC = 3.6 V,
Outputs high
0.12
0.19
0.12
0.19
ICC
VCC = 3.6 V,
IO = 0,
V = V
or GND
Outputs low
4.5
7
4.5
7
mA
ICC
IO = 0,
VI = VCC or GND
Outputs disabled
0.12
0.19
0.12
0.19
mA
ICC
VCC = 3 V to 3.6 V, One input at VCC - 0.6 V,
Other inputs at VCC or GND
0.3
0.2
mA
Ci
VI = 3 V or 0
4
4
pF
Co
VO = 3 V or 0
6.5
6.5
pF
On products compliant to MIL-PRF-38535, this parameter is not production tested.
All typical values are at VCC = 3.3 V, TA = 25
C.
This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another.
This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
SN54LVTH125, SN74LVTH125
3.3 V ABT QUADRUPLE BUS BUFFERS
WITH 3 STATE OUTPUTS
SCBS703I - AUGUST 1997 - REVISED OCTOBER 2003
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range, C
L
= 50 pF
(unless otherwise noted) (see Figure 1)
SN54LVTH125
SN74LVTH125
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 3.3 V
0.3 V
VCC = 2.7 V
VCC = 3.3 V
0.3 V
VCC = 2.7 V
UNIT
(INPUT)
(OUTPUT)
MIN
MAX
MIN
MAX
MIN
TYP
MAX
MIN
MAX
tPLH
A
Y
1
4.2
4.7
1
2
3.5
4.5
ns
tPHL
A
Y
1
4.1
5.1
1
2.1
3.9
4.9
ns
tPZH
OE
Y
1
4.9
5.6
1
2
4
5.5
ns
tPZL
OE
Y
1.1
4.9
5.6
1.1
2.1
4
5.4
ns
tPHZ
OE
Y
1.5
5.3
5.9
1.5
2.3
4.5
5.7
ns
tPLZ
OE
Y
1.3
4.7
4.2
1.3
2.8
4.5
4
ns
All typical values are at VCC = 3.3 V, TA = 25
C.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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