UCC25705, UCC25706, UCC35705, UCC35706
HIGH SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
SLUS473A NOVEMBER 1999 REVISED MARCH 2001
1
www.ti.com
D
Greater Than 4-MHz Operation
D
Integrated Oscillator / Voltage Feed Forward
Compensation
D
>4:1 Input Voltage Range
D
25-ns Current Limit Delay
D
Programmable Maximum Duty Cycle Clamp
D
Optocoupler Interface
D
50-
A Start-Up Current
D
4.2-mA Operating Current @ 1 MHz
D
Smallest Footprint of the 8-pin MSOP
Package Minimizes Board Area and Height
description
The UCC35705 and UCC35706 devices are 8-pin voltage mode primary side controllers with fast over-current
protection. These devices are used as core high-speed building blocks in high performance isolated and non-isolated
power converters.
UCC35705/UCC35706 devices feature a high speed oscillator with integrated feed-forward compensation for
improved converter performance. A typical current sense to output delay time of 25 ns provides fast response to
overload conditions. The IC also provides an accurate programmable maximum duty cycle clamp for increased
protection which can also be disabled for the oscillator to run at maximum possible duty cycle.
Two UVLO options are offered. The UCC35705 with lower turn-on voltage is intended for dc-to-dc converters while
the higher turn-on voltage and the wider UVLO range of the UCC35706 is better suited for offline applications.
The UCC35705/UCC35706 family is offered in 8-pin MSOP (DGK), SOIC (D) and PDIP (P) packages.
typical application schematic
UDG-99181
VDD
OUT
GND
RC
ILIM
VFF
DISCH
UCC35705/6
+
V
OUT
+
V
IN
SOFT
START
CIRCUIT
4
5
3
6
8
7
1
TPS2829
FB
2
MODE = 1
FET DRIVER
Copyright
2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
8
7
6
5
ILIM
FB
VFF
DISCH
VDD
OUT
GND
RC
D, OR P PACKAGE
(TOP VIEW)
ILIM
2
1
4
3
7
8
5
6
FB
VFF
DISCH
VDD
OUT
GND
RC
DGK PACKAGE
(TOP VIEW)
UCC25705, UCC25706, UCC35705, UCC35706
HIGH SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
SLUS473A NOVEMBER 1999 REVISED MARCH 2001
2
www.ti.com
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage
15 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage (VFF,RC,ILIM)
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage (FB)
15 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current (DISCH)
1 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current (OUT) dc
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Junction temperature, T
J
55
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature (soldering, 10 sec.)
300
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of the Power
Supply Control Data Book (TI Literature Number SLUD003) for thermal limitations and considerations of packages.
AVAILABLE OPTIONS
Packaged Devices
TA = TJ
UVLO Option
SOIC-8
Small Outline (D)
PDIP-8
Plastic Dip (P)
MSOP-8
Small Outline
(DGK)
40
C to 85
C
8.8V/8V
UCC25705D
UCC25705P
UCC25705DGK
40
C to 85
C
12V/8V
UCC25706D
UCC25706P
UCC25706DGK
0
C to 70
C
8.8V/8V
UCC35705D
UCC35705P
UCC35705DGK
0
C to 70
C
12V/8V
UCC35706D
UCC35706P
UCC35706DGK
D (SOIC8) and DGK (MSOP8) packages are available taped and reeled. Add R suffix to device type (e.g.
UCC35705DR) to order quantities of 2500 devices per reel for SOIC-8 and 2000 devices per reel for the MSOP-8.
electrical characteristics, V
DD
= 11 V, V
IN
= 30 V, R
T
= 47 k, R
DISCH
= 400 k, R
FF
= 14 k, C
T
= 220 pF,
C
VDD
= 0.1
F, and no load on the outputs, 0
C
T
A
70
C for the UCC3570x and 40
C
T
A
85
C
for the UCC2570x, T
A
= T
J
, (unless otherwise specified)
UVLO section (UCCx5705)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Start threshold
8.0
8.8
9.6
V
Stop threshold
7.4
8.2
9.0
V
Hysteresis
0.3
0.6
1.0
V
UVLO section (UCCx5706)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Start threshold
11.2
12.0
12.8
V
Stop threshold
7.2
8.0
8.8
V
Hysteresis
3.5
4.0
4.5
V
supply current section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Start-up current
VDD = UVLO start 1 V, VDD comparator off
30
90
A
IDD active
VDD comparator on, oscillator running at 1 MHz
4.2
5.0
mA
UCC25705, UCC25706, UCC35705, UCC35706
HIGH SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
SLUS473A NOVEMBER 1999 REVISED MARCH 2001
3
www.ti.com
electrical characteristics, V
DD
= 11 V, V
IN
= 30 V, R
T
= 47 k, R
DISCH
= 400 k, R
FF
= 14 k, C
T
= 220 pF,
C
VDD
= 0.1
F, and no load on the outputs, 0
C
T
A
70
C for the UCC3570x and 40
C
T
A
85
C
for the UCC2570x, T
A
= T
J
, (unless otherwise specified)
line sense section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Low line comparator threshold
0.95
1.00
1.05
V
Input bias current (VFF)
100
100
nA
oscillator section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Frequency
VFF = 1.2 V to 4.8 V
0.9
1.0
1.1
MHz
CT peak oltage
VFF = 1.2 V,
See Note 1
1.2
V
CT peak voltage
VFF = 4.8 V,
See Note 1
4.8
V
CT valley voltage
See Note 1
0
V
NOTE 1: Ensured by design. Not production tested.
current limit section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Input bias current
0.2
0.2
1
A
Current limit threshold
180
200
220
mV
Propagation delay, ILIM to OUT
50 mV overdrive
25
35
ns
pulse width modulator section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
FB input impedance
VFB = 3 V
30
50
90
k
Minimum duty cycle
VFB < 2 V
0
%
Ma im m d t c cle
VFB = VDD,
FOSC = 1 MHz
70
75
80
%
Maximum duty cycle
VDISCH = 0 V,
FOSC = 1 MHz
93
%
PWM gain
VFF = 2.5 V,
MODE = 1
12
%/V
Propagation delay, PWM to OUT
65
120
ns
output section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
VOH
IOUT = 5 mA,
VDD output
0.3
0.6
V
VOL
IOUT = 5 mA
0.15
0.4
V
Rise time
CLOAD = 50 pF
10
25
ns
Fall time
CLOAD = 50 pF
10
25
ns
UCC25705, UCC25706, UCC35705, UCC35706
HIGH SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
SLUS473A NOVEMBER 1999 REVISED MARCH 2001
4
www.ti.com
pin descriptions
DISCH: A resistor to VIN sets the oscillator discharge current programming a maximum duty cycle. When grounded,
an internal comparator switches the oscillator to a quick discharge mode. A small 100-pF capacitor between DISCH
and GND may reduce oscillator jitter without impacting feed-forward performance. I
DISCH
must be between 25
A
and 250
A over the entire V
IN
range.
FB: Input to the PWM comparator. This pin is intended to interface with an optocoupler. Input impedance is 50-k
typical.
GND: Ground return pin.
ILIM: Provides a pulse-by-pulse current limit by terminating the PWM pulse when the input is above 200 mV. This
provides a high speed (25 ns typical) path to reset the PWM latch, allowing for a pulse-by-pulse current limit.
OUT: The output is intended to drive an external FET driver or other high impedance circuits, but is not intended to
directly drive a power MOSFET. This improves the controller's noise immunity. The output resistance of the PWM
controller, typically 60
pull-up and 30
pull-down, will result in excessive rise and fall times if a power MOSFET
is directly driven at the speeds for which the UCC35705/6 is optimized.
RC: The oscillator can be configured to provide a maximum duty cycle clamp. In this mode the ontime is set by RT
and CT, while the off-time is set by RDISCH and CT. Since the voltage ramp on CT is proportional to VIN, feed-forward
action is obtained. Since the peak oscillator voltage is also proportional to VIN, constant frequency operation is
maintained over the full power supply input range. When the DISCH pin is grounded, the duty cycle clamp is disabled.
The RC pin then provides a low impedance path to ground CT during the off time.
VDD: Power supply pin. This pin should be bypassed with a 0.1-
F capacitor for proper operation. The undervoltage
lockout function of the UCC35705/6 allows for a low current startup mode and ensures that all circuits become active
in a known state. The UVLO thresholds on the UCC35705 are appropriate for a dc-to-dc converter application. The
wider UVLO hysteresis of the UCC35706 (typically 4 V) is optimized for a bootstrap startup mode from a high
impedance source.
VFF: The feed-forward pin provides the controller with a voltage proportional to the power supply input voltage. When
the oscillator is providing a duty cycle clamp, a current of 2
I
DISCH
is sourced from the VFF pin. A single resistor
RFF between VFF and GND then set VFF to:
VFF
[
VIN
2
R
FF
2
R
FF
)
R
DISCH
When the DISCH pin is grounded and the duty cycle clamp is not used, the internal current source is disabled and
a resistor divider from VIN is used to set VFF. In either case, when the voltage on VFF is less than 1.0 V, both the
output and oscillator are disabled.
UCC25705, UCC25706, UCC35705, UCC35706
HIGH SPEED VOLTAGE MODE PULSE WIDTH MODULATOR
SLUS473A NOVEMBER 1999 REVISED MARCH 2001
5
www.ti.com
pin descriptions (continued)
7
2
5
8
OUT
VDD
6
GND
S
Q
Q
RD
RD
RD
1
ILIM
200 mV
CURRENT LIMIT
1 pF
20 k
30 k
+
0.7 V
PWM
S
Q
Q
RD
CLK
PWM
LATCH
100 mV
2 * I (MODE=1)
0 (MODE = 0)
LOW LINE
1.0 V
30 * I (MODE=1)
80
(MODE = 0)
I
RC
VFF
FB
3
DISCH
4
50 mV
VDD
MODE
UCC35705 (8.8 V/8 V)
UCC35706 (12 V/8 V)
UVLO
+
+
+
+
+
+
Figure 1. Block Diagram
FUNCTIONAL DESCRIPTION
oscillator and PWM
The oscillator can be programmed to provide a duty cycle clamp or be configured to run at the maximum possible
duty cycle.
The PWM latch is set during the oscillator discharge and is reset by the PWM comparator when the C
T
waveform
is greater than the feedback voltage. The voltage at the FB pin is attenuated before it is applied to the PWM
comparator. The oscillator ramp is shifted by approximately 0.65-V at room temperature at the PWM comparator. The
offset has a temperature coefficient of approximately 2 mV/
C.
The ILIM comparator adds a pulse by pulse current limit by resetting the PWM latch when V
ILIM
> 200 mV. The PWM
latch is also reset by a low line condition (V
FF
<1.0 V).
All reset conditions are dominant; asserting any output will force a zero duty cycle output.
oscillator with duty cycle clamp (MODE = 1)
The timing capacitor CT is charged from ground to VFF through RT. The discharge path is through an on-chip current
sink that has a value of 30
I
DISCH
, where I
DISCH
is the current through the external resistor RDISCH. Since the
charge and discharge currents are both proportional to VIN, their ratio, and the maximum duty cycle remains constant
as VIN varies.
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