Off-line Power Supply Controller
Transformerless Off-line
Power Supply
Wide 100VDC to 400VDC
Allowable Input Range
Fixed 5VDC or Adjustable
Low Voltage Output
Output Sinks 200mA, Sources
150mA Into a MOSFET Gate
Uses Low Cost SMD Inductors
Short Circuit Protected
Optional Isolation Capability
The UCC3888 controller is optimized for use as an off-line, low power, low voltage,
regulated bias supply. The unique circuit topology utilized in this device can be
visualized as two cascaded flyback converters, each operating in the discontinu-
ous mode, both driven from a single external power switch. The significant benefit
of this approach is the ability to achieve voltage conversion ratios as high as 400V
to 2.7V with no transformer and low internal losses.
The control algorithm utilized by the UCC3888 sets the switch on time inversely
proportional to the input line voltage and sets the switch off time inversely propor-
tional to the output voltage. This action is automatically controlled by an internal
feedback loop and reference. The cascaded configuration allows a voltage conver-
sion from 400V to 2.7V to be achieved with a switch duty cycle of 7.6%. This topol-
ogy also offers inherent short circuit protection since as the output voltage falls to
zero, the switch off time approaches infinity.
The output voltage is set internally to 5V. It can be programmed for other output
voltages with two external resistors. An isolated version can be achieved with this
topology as described further in Unitrode Application Note U-149.
UCC1888
UCC2888
UCC3888
3/97
FEATURES
DESCRIPTION
OPERATION
With reference to the application diagram below, when input voltage is first applied,
the current through R
ON
into T
ON
is directed to V
CC
where it charges the external
capacitor, C3, connected to V
CC
. As voltage builds on V
CC
, an internal undervol-
tage lockout holds the circuit off and the output at DRIVE low until V
CC
reaches
8.4V. At this time, DRIVE goes high turning on the power switch, Q1, and redirect-
ing the current into T
ON
to the timing capacitor, C
T
. C
T
charges to a fixed threshold
with a current I
CHG
=0.8
(V
IN
- 4.5V)/R
ON
. Since DRIVE will only be high for as
long as C
T
charges, the power switch on time will be inversely proportional to line
voltage. This provides a constant (line voltage)
(switch on time) product.
Note: This device incorporates patented technology used under license from Lambda Electronics, Inc.
TYPICAL APPLICATION
UDG-96013
UCC1888
UCC2888
UCC3888
OPERATION (cont.)
At the end of the on time, Q1 is turned off and the current
through R
ON
is again diverted to V
CC
. Thus the current
through R
ON
, which charges C
T
during the on time, con-
tributes to supplying power to the chip during the off time.
The power switch off time is controlled by the discharge
of C
T
which, in turn, is programmed by the regulated out-
put voltage. The relationship between C
T
discharge cur-
rent, I
DCHG
, and output voltage is illustrated as follows:
Region 1. When V
OUT
= 0, the off time is infinite. This
feature provides inherent short circuit protec-
tion. However, to ensure output voltage
startup when the output is not a short, a high
value resistor, R
S
, is placed in parallel with C
T
to establish a minimum switching frequency.
Region 2. As V
OUT
rises above approximately 0.7V to its
regulated value, I
DCHG
is defined by R
OFF
,
and is equal to:
I
DCHG
= (V
OUT
- 0.7V) / R
OFF
As V
OUT
increases, I
DCHG
increases reducing off time.
The operating frequency increases and V
OUT
rises
quickly to its regulated value.
Region 3. In this region, a transconductance amplifier re-
duces I
DCHG
in order to maintain a regulated
V
OUT
.
Region 4. If V
OUT
should rise above its regulation range,
I
DCHG
falls to zero and the circuit returns to
the minimum frequency established by R
S
and
C
T
.
The range of switching frequencies is established by
R
ON
, R
OFF
, R
S
, and C
T
as follows:
Frequency = 1/(T
ON
+ T
OFF
)
T
ON
= R
ON
C
T
4.6
V/(V
IN
- 4.5V)
T
OFF
(max) = 1.4
R
S
C
T
Regions 1 and 4
T
OFF
= R
OFF
C
T
3.7V /(V
OUT
- 0.7V)
Region 2, excluding the effects of R
S
which have a minimal impact on T
OFF
.
The above equations assume that V
CC
equals 9V. The
voltage at T
ON
increases from approximately 2.5V to
6.5V while C
T
is charging. To take this into account, V
IN
is adjusted by 4.5V in the calculation of T
ON
. The voltage
at T
OFF
is approximately 0.7V.
DESIGN EXAMPLE
The UCC3888 regulates a 5 volt, 1 Watt nonisolated DC output from AC inputs between 80 and 265 volts. In this ex-
ample, the IC is programmed to deliver a maximum on time gate drive pulse width of 2.2 microseconds which occurs
at 80 VAC. The corresponding switching frequency is approximately 100kHz at low line, and overall efficiency is ap-
proximately 50%. Additional design information is available in Unitrode Application Note U-149.
UDG-96014
2
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
General
V
CC
Zener Voltage
I
CC
< 1.5mA
8.6
9.0
9.3
V
Startup Current
V
OUT
= 0
150
250
A
Operating Current I(V
CC
)
V
CC
= V
CC
(zener) 100mV, F = 150kHz
1.2
2.5
mA
Under-Voltage-Lockout
Start Threshold
V
OUT
= 0
8.0
8.4
8.8
V
Minimum Operating Voltage after Start
V
OUT
= 0
6.0
6.3
6.6
V
Hysteresis
V
OUT
= 0
1.8
V
Oscillator
Amplitude
V
CC
= 9V
3.5
3.7
3.9
V
C
T
to DRIVE high Propagation Delay
Overdrive = 0.2V
100
200
ns
C
T
to DRIVE low Propagation Delay
Overdrive = 0.2V
50
100
ns
Driver
VOL
I = 20mA, V
CC
= 9V
0.15
0.4
V
I = 100mA, V
CC
= 9V
0.7
1.8
V
VOH
I =
-
20mA, V
CC
= 9V
8.5
8.8
V
I =
-
100mA, V
CC
= 9V
6.1
7.8
V
Rise Time
C
LOAD
= 1nF
35
70
ns
Fall Time
C
LOAD
= 1nF
30
60
ns
Line Voltage Detection
Charge Coefficient: I
CHG
/ I(T
ON
)
VCT = 3V, DRIVE = High, I(T
ON
) = 1mA
0.73
0.79
0.85
Minimum Line Voltage for Fault
R
ON
= 330k
60
80
100
V
Minimum Current I(T
ON
) for Fault
R
ON
= 330k
220
A
On Time During Fault
C
T
= 150pF, V
LINE
= Min
-
1V
2
s
Oscillator Restart Delay after Fault
0.5
ms
V
OUT
Error Amp
V
OUT
Regulated 5V (ADJ Open)
V
CC
= 9V, I
DCHG
= I(T
OFF
)/2
4.5
5.0
5.5
V
Discharge Ratio: I
DCHG
/ I(T
OFF
)
I(T
OFF
) = 50
A
0.95
1.01
1.07
Voltage at T
OFF
I(T
OFF
) = 50
A
0.6
0.95
1.3
V
Regulation gm (Note 1)
Max I
DCHG
= 50
A
2.4
mA/V
Max I
DCHG
= 125
A
1.9
4.1
7.0
mA/V
Unless otherwise stated, these specifications hold for T
A
= 0
C to 70
C for the
UCC3888, -40
C
to
+85
C for the UCC2888, and -55
C to +125
C for the UCC1888.
No load at DRIVE pin (C
LOAD
=0).
ELECTRICAL CHARACTERISTICS
DIL-8, SOIC-8 (Top View)
N or J, D Package
CONNECTION DIAGRAM
I
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mA
Current into T
ON
Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5mA
Voltage on V
OUT
Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V
Current into T
OFF
Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250
A
Storage Temperature . . . . . . . . . . . . . . . . . . . . -65
C to +150
C
Note: Unless otherwise indicated, voltages are referenced to
ground and currents are positive into, negative out of, the speci-
fied terminals.
ABSOLUTE MAXIMUM RATINGS
UCC1888
UCC2888
UCC3888
Note 1: gm is defined as
I
DCHG
V
OUT
for the values of V
OUT
when V
OUT
is in regulation. The two points used to calculate gm are for
I
DCHG
at 65% and 35% of its maximum value.
3
ADJ: The ADJ pin is used to provide a 5V regulated sup-
ply without additional external components. Other output
voltages can be obtained by connecting a resistor divider
between V
OUT
, ADJ and GND. Use the formula
V
OUT
=
2.5V
R1
+
R2
R2
where R1 is connected between V
OUT
and ADJ, and R2
is connected between ADJ and GND. R1 || R2 should be
less than 1k
to minimize the effect of the temperature
coefficient of the internal 30k resistors which also connect
to V
OUT
, ADJ, and GND. See Block Diagram.
C
T
(timing capacitor): The signal voltage at C
T
has a
peak-to-peak swing of 3.7V for 9V V
CC
. As the voltage at
C
T
crosses the oscillator upper threshold, DRIVE goes
low. As the voltage on C
T
crosses the oscillator lower
threshold, DRIVE goes high.
DRIVE: This output is a CMOS stage capable of sinking
200mA peak and sourcing 150mA peak. The output volt-
age swing is 0 to V
CC
.
GND (chip ground): All voltages are measured with re-
spect to GND.
T
OFF
(regulated output control): T
OFF
sets the dis-
charge current of the timing capacitor through an external
resistor connected between V
OUT
and T
OFF
.
T
ON
(line voltage control): T
ON
serves three functions.
When C
T
is discharging (off time), the current through
T
ON
is routed to V
CC.
When C
T
is charging (on time), the
current through T
ON
is split 80% to set the C
T
charge
time and 20% to sense minimum line voltage which oc-
curs for a T
ON
current of 220
A. For a minimum line volt-
age of 80V, R
ON
is 330k
.
The C
T
voltage slightly affects the value of the charge
current during the on time. During this time, the voltage at
the T
ON
pin increases from 2.5V to 6.5V.
V
CC
(chip supply voltage): The supply voltage of the
device at pin V
CC
is internally clamped at 9V. The device
needs an external supply, from a source such as the rec-
tified AC line or derived from the switching circuit. Pre-
cautions must be taken to ensure that total I
CC
does not
exceed 8mA.
V
OUT
(regulated output): The V
OUT
pin is directly con-
nected to the power supply output voltage. When V
OUT
is
greater than V
CC
, V
OUT
bootstraps V
CC
.
UCC1888
UCC2888
UCC3888
PIN DESCRIPTIONS
BLOCK DIAGRAM
UDG-96015
4
UNITRODE CORPORATION
7 CONTINENTAL BLVD.
MERRIMACK, NH 03054
TEL. (603) 424-2410
FAX (603) 424-3460
UCC1888
UCC2888
UCC3888
TYPICAL CHARACTERISTICS CURVES
5
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