TP6311
1/8 TO 1/16-DUTY VFD CONTROLLER
Version 1.1
Page 1 of 9
http://www.topro.com.tw
November 2003
General Description
The TP6311 is a VFD (Vacuum Fluorescent Display)
controller/driver that is driven on a 1/8 to 1/16-duty
factor. It consists of 12 segment output lines, 8 grid
output lines, 8 segment/grid output drivelines, a
display memory, a control circuit, and a key scan
circuit. Serial data is input to TP6311 through a
three-line serial interface. This VFD controller/driver
is ideal as a peripheral device of a single-chip
microcomputer.
Features
Multiple display modes (12-segment & 16-digit to
20-segment & 8-digit)
Key scanning (12
4 matrices)
Dimming circuit (eight steps)
High-voltage output (V
DD
35V max)
LED ports (5 chs, 20 mA max)
General-purpose input port (4 bits)
No external resistor necessary for driver outputs
(P-ch open-drain + pull-down resistor output)
Serial interface (CLK, STB, D
IN
, D
OUT
)
Ordering Information
TP 6311
Block Diagram
D
IN
D
OUT
CLK
STB
Serial I/F
OSC
Command decoder
Display memory
20 bit x 16 word
Timing generator key
scan
Key data memory
(4 x 12)
5 bit latch
4 b
i
t
l
a
t
c
h
4
4
Dimming circuit
1
6
-
b
i
t
o
u
tp
u
t
la
tc
h
1
6
-b
it
o
u
tp
u
t
l
a
tc
h
Se
gm
ent
dr
i
v
e
r
S
e
g
m
e
n
t
/
g
r
id
d
r
iv
e
r
G
r
id
d
r
iv
e
r
Da
t
a
s
e
l
e
c
t
o
r
16
8
8
8
8
20
12
V
DD
V
SS
V
EE
(+5V)
(0V)
(-30V)
LED
1
LED
5
Seg
1
Seg
12
Seg
13
/Gird
16
Seg
12
/Gird
9
Grid
1
Grid
8
R
Key1
to
Key4
SW1
to
SW4
VDD
Footprint
Version
Package Type
Package Type Q: QFP
Footprint
L: 3.2 mm
TP6311
1/8 TO 1/16-DUTY VFD CONTROLLER
Version 1.1
Page 2 of 9
http://www.topro.com.tw
November 2003
Pin Configuration (Top View)
Use all the power pins.
Pin Description
Pin No
Symbol
Pin Name
Description
6 D
IN
Date
input
Input serial data at rising edge of shift clock, starting from
lower bit.
5 D
OUT
Date
output
Outputs serial data at falling edge of shift clock, starting from
lower bit. This is N-ch open-drain output pin.
9 STB
Strobe
Initializes serial interface at rising or falling edge to make
TP6311 waiting for reception of command. Data input after
STB has fallen is processed as command. While command
data is processed, current processing is stopped, and serial
interface is initialized. While STB is high, CLK is ignored.
8 CLK Clock
input
Reads serial data at rising edge, and outputs data at falling
edge.
52 OSC Oscillator
pin
Connect resistor for determining oscillation frequency to this
pin.
15 to 26
Seg1/KS1 to
Seg12/KS12
High-voltage output
(Segment)
Segment output pins (Dual function as key source)
44 to 37
Grid1 to Grid8
High-voltage output
(Grid)
Grid output pins
27 to 32
35 to 36
Seg13/Grid16 to
Seg20/Grid9
High-voltage output
(Segment/grid)
These pins are selectable for segment or grid output.
50 to 46
LED1 to LED5
LED output
CMOS output. +20 mA max
10 to 13
Key1 to Key4
Key data input
Data input to these pins is latched at end of display cycle.
1 to 4
SW1 to SW4
Switch input
These pins constitute 4-bit general-purpose input port.
14, 33, 45
V
DD
Logic
power
5V
10%
51 V
SS
Logic ground
Connect this pin to GND of system.
34 V
EE
Pull-down level
VDD 35 V max
7
IC
Internally connected
Be sure to leave this pin open (this pin is at V
DD
level).
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
TP6311
VD
D
Se
g1
/
K
S1
OS
C
VS
S
LE
D
1
LE
D
2
LE
D
3
LE
D
4
LE
D
5
VD
D
Gr
i
d
1
Gr
i
d
2
Gr
i
d
3
Gr
i
d
4
Gr
i
d
5
Se
g2
/
K
S2
Se
g3
/
K
S3
Se
g4
/
K
S4
Se
g5
/
K
S5
Se
g6
/
K
S6
Se
g7
/
K
S7
Se
g8
/
K
S8
Se
g9
/
K
S9
Se
g
1
0
/
K
S
1
0
Se
g
1
1
/
K
S
1
1
SW 1
SW 2
SW 3
SW 4
DOUT
DIN
IC
CLK
STB
KEY 1
KEY 2
KEY 3
KEY 4
Grid 6
Grid 7
Grid 8
VEE
VDD
Seg13/Grid16
Seg14/Grid15
Seg15/Grid14
Seg16/Grid13
Seg17/Grid12
Seg18/Grid11
Seg20/Grid9
Seg19/Grid10
Se
g
1
2
/
K
S
1
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
TP6311
VD
D
Se
g1
/
K
S1
OS
C
VS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
TP6311
VD
D
Se
g1
/
K
S1
OS
C
VS
S
LE
D
1
LE
D
2
LE
D
3
LE
D
4
LE
D
5
VD
D
Gr
i
d
1
Gr
i
d
2
Gr
i
d
3
Gr
i
d
4
Gr
i
d
5
Se
g2
/
K
S2
Se
g3
/
K
S3
Se
g4
/
K
S4
Se
g5
/
K
S5
Se
g6
/
K
S6
Se
g7
/
K
S7
Se
g8
/
K
S8
Se
g9
/
K
S9
Se
g
1
0
/
K
S
1
0
Se
g
1
1
/
K
S
1
1
SW 1
SW 2
SW 3
SW 4
DOUT
DIN
IC
CLK
STB
KEY 1
KEY 2
KEY 3
KEY 4
Grid 6
Grid 7
Grid 8
VEE
VDD
Seg13/Grid16
Seg14/Grid15
Seg15/Grid14
Seg16/Grid13
Seg17/Grid12
Seg18/Grid11
Seg20/Grid9
Seg19/Grid10
Se
g
1
2
/
K
S
1
2
TP6311
1/8 TO 1/16-DUTY VFD CONTROLLER
Version 1.1
Page 3 of 9
http://www.topro.com.tw
November 2003
Functional Description
Display RAM Address and Display Mode
The display RAM stores the data transmitted from an
external device to TP6311 through the serial interface,
and is assigned addresses as follows, in units of 8
bits:
Seg
1
Seg
4
Seg
8
Seg
12
Seg
16
Seg
20
00H
L
00H
U
01H
L
01H
U
02H
L
DIG1
03H
L
03H
U
04H
L
04H
U
05H
L
DIG2
06H
L
06H
U
07H
L
07H
U
08H
L
DIG3
09H
L
09H
U
0AH
L
0AH
U
0BH
L
DIG4
0CH
L
0CH
U
0DH
L
0DH
U
0EH
L
DIG5
0FH
L
0FH
U
10H
L
10H
U
11H
L
DIG
12H
L
12H
U
13H
L
13H
U
14H
L
DIG7
15H
L
15H
U
16H
L
16H
U
17H
L
DIG8
18H
L
18H
U
19H
L
19H
U
1AH
L
DIG9
1BH
L
1BH
U
1CH
L
1CH
U
1DH
L
DIG10
1EH
L
1EH
U
1FH
L
1FH
U
20H
L
DIG11
21H
L
21H
U
22H
L
22H
U
23H
L
DIG12
24H
L
24H
U
25H
L
25H
U
26H
L
DIG13
27H
L
27H
U
28H
L
28H
U
29H
L
DIG14
2AH
L
2AH
U
2BH
L
2BH
U
2CH
L
DIG15
2DH
L
2DH
U
2EH
L
2EH
U
2FH
L
DIG16
b
0
b
3
b
4
b
7
XX H
L
XX
H
U
Lower 4 bits
Higher 4 bits.
Only the lower 4 bits of the addresses assigned to
Seg17 through Seg20 are valid, and the higher 4 bits
are ignored.
Key Matrix and Key-Input Data Storage
RAM
The Key matrix is of 12
4 configuration, as shown
below:
KEY 1
KEY 2
KEY 3
KEY 4
Se
g1
/
K
S
1
Se
g2
/
K
S
2
Se
g3
/
K
S
3
Se
g4
/
K
S
4
Se
g5
/
K
S
5
Se
g6
/
K
S
6
Se
g7
/
K
S
7
Se
g8
/
K
S
8
Se
g9
/
K
S
9
S
e
g
10/
K
S
1
0
S
e
g
11/
K
S
1
1
S
e
g
12/
K
S
1
2
The data of each Key is stored as illustrated below,
and is read by a read command, starting from the
least significant bit.
KEY
1
......
KEY
4
KEY
1
......
KEY
4
Seg
1
/ KS
1
Seg
2
/ KS
2
Seg
3
/ KS
3
Seg
4
/ KS
4
Seg
5
/ KS
5
Seg
6
/ KS
6
Seg
7
/ KS
7
Seg
8
/ KS
8
Seg
9
/ KS
9
Seg
10
/ KS
10
Seg
11
/ KS
11
Seg
12
/ KS
12
b0
.........
b3 b4
.........
b7
When the most significant bit data (Seg12 b7) has
been read, the least significant bit of the next data
(Seg1 b0) is read.
LED Port
Data is written to the LED port by a writing command,
starting from the least significant bit of the port.
When a bit of this port is 0, the corresponding LED
lights; when the bit is 1, the LED goes off. The data
of bits 6 through 8 is ignored.
----
----
----
b4
b3
b2
b1
b0
Irrelevant
LED1
LED2
LED3
LED4
LED5
On power application, all the LEDs remain dark.
SW Data
The SW data is read by a reading command, starting
from the least significant bit. Bits 5 through 8 of the
SW data are 0.
0
0
0
0
b3
b2
b1
b0
SW1
SW2
SW3
SW4
MSB
LSB
Commands
A command sets the display mode and status of the
VFD driver.
Reading
Sequence
TP6311
1/8 TO 1/16-DUTY VFD CONTROLLER
Version 1.1
Page 4 of 9
http://www.topro.com.tw
November 2003
The first 1 byte input to TP6311 through the D
IN
pin
after the STB pin has fallen is regarded as a
command.
If STB is high while a command/data is transmitted,
serial communication is initialized, and the
transmitting command/data is invalid; however, the
command/data already transmitted remains valid.
(1) Display mode setting command
This command initializes the TP6311 and selects the
number of segments and number of grids (1/8 to 1/11-
duty, 12 segments to 20 segments).
On power application, the 16-digit, 12-segment mode
is selected.
0
0
----
----
b3
b2
b1
b0
MSB
LSB
Selects display mode
Irrelevant
0XXX : 8 digits, 20 segments
1000 : 9 digits, 19 segments
1001 : 10 digits, 18 segments
1010 : 11 digits, 17 segments
1011 : 12 digits, 16 segments
1100 : 13 digits, 15 segments
1101 : 14 digits, 14 segments
1110 : 15 digits, 13 segments
1111 : 16 digits, 12 segments
(2) Data setting commands
This command sets data write and read modes.
0
1
----
----
b3
b2
b1
b0
MSB
LSB
Irrelevant
Sets address increment mode (display memory).
0:Increments address after data has been written.
1:Fixes address.
Sets data write and read modes.
00:Writes data to display memory
01:Writes data to LED port
10:Reads key data.
11:Reads SW data.
Sets test mode.
0:Normal operation.
1:Test mode.
On power application, the normal operation mode and
address increment mode set.
(3) Address setting command
This command sets an address of the display
memory.
1
1
b5
b4
b3
b2
b1
b0
Address (00H-2FH)
MSB
LSB
If address 30H or higher is set, the data is ignored
and unit a correct address is set.
On power application, the address is set to 00H.
(4) Display control command
1
0
----
----
b3
b2
b1
b0
Dimming quantity settings.
000 : Sets pulse width to 1/16.
001 : Sets pulse width to 2/16.
010 : Sets pulse width to 4/16.
011 : Sets pulse width to 10/16.
100 : Sets pulse width to 11/16.
101 : Sets pulse width to 12/16.
110 : Sets pulse width to 13/16.
111 : Sets pulse width to 14/16.
MSB
LSB
Irrelevant
Turns on/off display
0:Display off (key scan continues*)
1:Display on.
"*": On power application, the key scanning is stopped.
On power application, the 14/16-pulse width is set and
the display is turned off.
Key Scanning and Display Timing
DIG1
DIG2
DIG3
..............
DIGn
1 2
... 12
SEG Output
DIG1
G1
G2
G3
Gn
1 frame=T
DISP
x (n+1)
TDISP500
s
Key scan data
1/16
T
DISP
One cycle of key scanning consists of two frames,
and data of 12
4 matrices is stored in RAM.
TP6311
1/8 TO 1/16-DUTY VFD CONTROLLER
Version 1.1
Page 5 of 9
http://www.topro.com.tw
November 2003
Serial Communication Format
Reception (command/data write)
b0
b1
b2
......
b6
b7
......
STB
DIN
CLK
If data is cintiguous
Transmission (data read)
b0
b1
b2
b3
b5
b4
b6
b7
1
2
3
4
5
6
7
8
1
2
3
4
5
6
b0
b1
b2
b3
b5
b4
STB
DIN
CLK
DOUT
t
WAIT
Data reading command is set.
Data reading starts.
Because the D
OUT
pin is an N-ch open-drain output
pin, be sure to connect an external pull-up resistor to
this pin (1k
to 10 k
).
"*": When data is read, a wait time (t
WAIT
) of 1
s is
necessary from the rising of the eighth clock that has
set the command till the falling of the first clock that
has read the data.
Absolute Maximum Ratings (Ta = 25C, V
SS
= 0V)
Parameter
Symbol
Ratings
Unit
Logic Supply Voltage
V
DD
-0.5 to + 7.0
V
Driver Supply Voltage
V
EE
V
DD
+0.5 to V
DD
-40
V
Logic Input Voltage
V
IL
-0.5 to V
DD
+0.5
V
VFD Driver Output Voltage
V
o2
V
EE
0.5 to V
DD
+0.5
V
LED Driver Output Current
I
o1
+25
mA
VFD Driver Output Current
I
o2
-40 (grid)
-15 (segment)
mA
Power Dissipation
P
D
1200
*
mW
Operating Ambient Temperature
T
opt
-40 to +85
C
Storage Temperature
T
stg
-65 to +150
C
* Derate at 9.6 mW/
C at Ta = 25
C or higher.
Recommended Operating Conditions (Ta = -20C to +70C, V
SS
= 0V)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Logic Supply Voltage
V
DD
4.5 5
5.5
V
High-Level Input Voltage
V
IH
0.7V
DD
V
DD
V
Low-Level Input Voltage
V
IL
0
0.3V
DD
V
Driver Supply Voltage
V
EE
0
V
DD
-35
V
Maximum power consumption P
MAX
= VFD driver dissipation + R
L
dissipation + LED driver dissipation + dynamic power consumption.
When segment current = 3 mA, grid current = 15mA, and LED current = 20 mA,
VFD driver dissipation = number of segments x 6 + number of grids/(number of grids + 1) x 30(mW)
R
L
dissipation
(V
DD
-V
EE
)
2
/50 x (segment+1) (mW)
LED driver dissipation = number of LEDs x 20(mW)
Dynamic power consumption = V
DD
x 5(mW)
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