CMOS Logic
930
13
XC74WL157ASR is 2-channel Multiplexer manufactured using silicon
gate CMOS processes. The small quiescent current, which is one of the
features of the CMOS logic, gives way to high speed operations which
enables LS-TTL.
With wave forming buffers connected internally, stabilized output can be
achieved as the series offers high noise immunity.
As the series is integrated into a mini molded, MSOP-8B package, high
density mounting is possible.
Description
High Speed Operations
: tpd = 4.1ns TYP (V
CC
=5V)
Operating Voltage Range : 2V ~ 5.5V
Low Power Consumption : 2
A (max)
Small Package
: MSOP-8B
GPalmtops
GDigital Equipment
Features
Applications
NCMOS Logic 2-Channel Multiplexer
NOperating Voltage Range : 2V ~ 5.5V
NHigh Speed Operations : tpd =4.1ns TYP
NLow Power Consumption : 2A (max)
NMSOP-8B Package
Pin Configuration
Functions
V
CC
SELECT
A
B
Y
GND
ST
Y
1
2
3
4
5
6
7
8
MSOP-8B
TOP VIEW
H = High Level
L = Low Level
X = Don't care
INPUT
OUTPUT
ST
SELECT
H
X
L
L
L
H
Y
H
H
L
A
X
L
X
B
X
X
H
Y
L
L
H
L
L
L
H
X
H
L
H
H
X
L
L
13S_13XC74WL157ASR 02.09.12 16:00 930
XC74WL157ASR
931
13
Recommended Operating Conditions
DC Electrical Characteristics
PARAMETER
Supply Voltage
SYMBOL
CONDITIONS
UNITS
-40+85
Input Voltage
Output Voltage
Operating Temperature
Input Rise and Fall Time
V
CC
V
IN
V
OUT
Topr
tr, tf
25.5
05.5
0V
CC
0200V
CC
=3.3V
ns
0100V
CC
=5V
PARAMETER
SYMBOL
CONDITIONS
UNITS
Input Voltage
Input Current
V
IL
Output Voltage
V
IH
V
OL
I
CC
Quiscent Supply
Current
V
IN
=V
IH
V
IN
=V
IL
V
IN
=V
CC
or GND
V
IN
=V
CC
or GND
I
OH
=-50A
I
OH
=-4mA
I
OH
=-8mA
I
OL
=50A
I
OL
=4mA
I
OL
=8mA
2.0
3.0
5.5
2.0
3.0
5.5
2.0
3.0
4.5
3.0
4.5
2.0
3.0
4.5
3.0
4.5
5.5
05.5
Ta=25
Ta=-4085
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.44
0.44
20.0
1.0
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.48
3.80
-
-
-
-
-
-
-1.0
-
-
-
0.5
0.9
1.65
-
-
-
-
-
0.1
0.1
0.1
0.36
0.36
2.0
0.1
-
-
-
-
-
-
2.0
3.0
4.5
-
-
-
-
-
-
-
-
-
1.5
2.1
3.85
-
-
-
1.9
2.9
4.4
2.58
3.94
-
-
-
-
-
-
-0.1
V
V
V
V
A
A
I
IN
V
OH
V
CC
V
MIN
TYP
MAX
MIN
MAX
Absolute Maximum Ratings
PARAMETER
Power Supply Voltage
Input Voltage
Output Voltage
Input Diode Current
Output Diode Current
Switch Output Current
VCC, GND Current
Power Dissipation (Ta = 25)
Storage Temperature
SYMBOL
RATINGS
UNITS
-20
V
CC
V
IN
V
OUT
I
IK
I
OK
I
CC
, I
GND
-0.5+6.0
-0.5+6.0
-0.5V
CC
0.5
20
50
mA
mA
mA
Ta=-4085
I
OUT
25
mA
Tstg
-65150
P
d
300
mW
Note : Voltage is all Ground standardized.
13S_13XC74WL157ASR 02.09.12 16:00 931
Switching Electrical Characteristics
Propagation Delay
Time
(A, B-Y, Y)
Propagation Delay
Time
(SELECT-Y, Y)
Propagation Delay
Time
(ST-Y, Y)
PARAMETER
SYMBOL
CONDITIONS
UNITS
Input Capacitance
tPHL
tPLH
Power Dissipation
Capacitance
15pF
50pF
15pF
50pF
-
Ta=25
Ta=-4085
11.5
7.5
15
9.5
11.5
7.5
15
9.5
10
-
1
1
1
1
1
1
1
1
-
-
9.7
6.4
13.2
8.4
9.7
6.4
13.2
8.4
10
-
6.2
4.1
8.7
5.6
6.2
4.1
8.7
5.6
4
20
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
pF
pF
C
IN
Cpd
C
L
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
-
-
-
V
CC
V
tPHL
tPLH
15pF
50pF
15pF
50pF
15.5
9.5
19
11.5
15.5
9.5
19
11.5
1
1
1
1
1
1
1
1
13.2
8.1
16.7
10.1
13.2
8.1
16.7
10.1
8.4
5.3
10.9
6.8
8.4
5.3
10.9
6.8
-
-
-
-
-
-
-
-
ns
ns
ns
ns
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
tPHL
tPLH
15pF
50pF
15pF
50pF
16
10
19.5
12
16
10
19.5
12
1
1
1
1
1
1
1
1
13.6
8.6
17.1
10.6
13.6
8.6
17.1
10.6
8.7
5.6
11.2
7.1
8.7
5.6
11.2
7.1
-
-
-
-
-
-
-
-
ns
ns
ns
ns
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
tr=tf=3ns
-
-
-
-
MIN
TYP
MAX
MIN
MAX
XC74WL157ASR
932
13
Noise Characteristics
( tr=tf=3ns )
PARAMETER
SYMBOL
CONDITIONS
Ta=25
UNITS
C
L
V
CC
(V)
Not functioning output maximum dynamic V
OL
V
OLP
50pF
5.0
-
0.3
0.8
V
V
Not functioning output minimum dynamic V
OL
V
OLV
50pF
5.0
-0.8
-0.3
-
Minimum dynamic V
IH
V
IHD
50pF
5.0
-
-
3.5
V
Maximum dynamic V
IL
V
ILD
50pF
5.0
-
-
1.5
V
MIN
TYP
MAX
13S_13XC74WL157ASR 02.09.12 16:00 932
XC74WL157ASR
933
13
Typical Application Circuit
Waveforms
OUTPUT Y
Pulse
Generator
Pulse
Generator
INPUT
INPUT
OUTPUT Y
V
CC
GND
SELECT
ST
B
A
Y
Y
Pulse
Generator
INPUT
Pulse
Generator
INPUT
V
CC
C
L
C
L
Z
OUT
=50
Z
OUT
=50
Z
OUT
=50
Z
OUT
=50
tr
tf
90%
10%
50%
INPUT
90%
50%
10%
OUTPUT Y
50%
50%
50%
50%
OUTPUT Y
t
PHL
t
PHL
t
PLH
V
CC
GND
V
OH
V
OH
V
OL
V
OL
PRR=1MHz
duty cycle 50%
tr=tf=3ns
t
PLH
13S_13XC74WL157ASR 02.09.12 16:00 933
PDF 
ZIP