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Электронный компонент: LTM10C306L

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(1/10) 1999-10-14 (Ver.3.2)
LIQUID CRYSTAL DISPLAY DIVISION
PRODUCT INFORMATION
FEATURES
(1) 10.4"XGA display size for notebook PC
(2) LVDS interface system
(3) Slim(5.5mmMAX) & light weight(265gTYP) design
MECHANICAL SPECIFICATIONS
Item
Specifications
Dimensional Outline (Typ.)
241.5(W) x 171.9(H) x 5.5max(D) mm
Number of Pixels
1024(W) x 768(H) pixels
Active Area
210.432(W) x 157.824(H) mm
Pixel Pitch
0.2055(W) x 0.2055(H)
Weight (approximately)
265g
Backlight
Single CCFL, Sidelight type
ABSOLUTE MAXIMUM RATINGS
Item
Min.
Max.
Unit
(V
DD
)
-0.3
4.5
V
Supply Voltage
(V
FL
)
0
2.0
kV(rms)
FL Driving Frequency (f
FL
)
-
100
kHz
Input Signal Voltage (V
IN
)
-0.3
V
DD
+0.3
V
Operating Temperature
0
50
C
Storage Temperature
-20
60
C
Storage Humidity
10
90
%(RH)
ELECTRICAL SPECIFICATION
Item
Min.
Typ.
Max.
Unit
Remarks
(V
DD
)
3.0
3.3
3.6
V
Supply Voltage
(V
FL
)
600
650
700
V(rms)
I
FL
=2.5 mA(rms)
FL Start Voltage (Ta=0
C)
1200
---
1600
V(rms)
Receiver Input Voltage
0
---
2.4
V
Differential Input High Threshold(V
TH
)*1
---
---
V
OS
+0.1
V
Differential Input Low Threshold(V
TL
)*1
V
OS
-0.1
---
---
V
V
OS
:Offset Mode Voltage
V
OS
=1.2V
*2 (I
DD
)
---
360
---
mA
Current Consumption
*3 (I
FL
)
2.0
2.5
5.0
mA(rms)
*2 *3 Power Consumption
---
2.8
---
W
@70cd/m
2
*1 : Refer to DF90CF364 Specification by National Semiconductor Corporation. This LCD module conforms to LVDS
standard (TIA/EIA-644)
*2 : 8 color bars pattern
*3 : Excepting the efficiency FL inverter
*4 : not use Hsync nor Vsync. Only ENAB control.
OPTICAL SPECIFICATION (Ta=25
C)
Item
Min.
Typ.
Max.
Unit
Remarks
Contrast Ratio (CR)
100
250
---
---
(t
ON
)
---
---
50
ms
Response Time
(t
OFF
)
---
---
50
ms
50
70
---
cd/m
2
I
FL
=2.5mA(rms)
Luminance (L)
---
200
---
cd/m
2
I
FL
=5mA(rms)
*The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
Toshiba or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Toshiba or others.
*The information contained herein may be changed without prior notice. It is therefore advisable to contact Toshiba before
proceeding with the design of equipment incorporating this product.
26cm COLOUR TFT-LCD MODULE
(10.4 TYPE)
LTM10C306L
(p-Si TFT)
TENTATIVE
(2/10) 1999-10-14 (Ver.3.2)
LTM10C306L
DIMENSIONAL OUTLINE (front figure)
Unit : mm
Standard tolerance :
0.5
CN1
C
3.5
3.5
3.6
7.3
R1
R3
.5
3.5
R3.5
R1
3.5
3.5
3.0
3.5
3.5
4.
0
R3
R1
R3
.5
3.5
3.5
3.5
R3.5
.9
3
.5
3
145.4
153.4
50
1
0
D
1
.
7
0.3
(
4.1max)
1.3
0
.3
(5.5max)
B
3.
2
0.
3
161.2(BEZEL OPENING)
157.824(ACTIVE AREA)
A
3.
2
0.
3
23
7.4
234.8
0.3
120.7
4.1
2.
6
3.9
152.90.3
171.9
161.9
155.9
137.9
77.6
21.7
33.5
No.1
4.1
2.6
5.7 6.9
234.8
0.3
235.4
2.
7
0.
1
CN2
Pin
No.1
High
Pin
N
o.2
Low
210.432(AC
TIVE
AREA
)
21
3.8(BEZEL
O
PENING)
(MOLEX
55176-149
1)
5.4
MA
X

Connector
Only
9.5
24.5
3.2
0
.
3
2.70.3
4.6
3.0
3.
0
241.5
4.0
10.0
13.0
10.0
3.0
3.0
3.0
3.0
10.0
3.0
232.0
1.312
15.484
(3/10) 1999-10-14 (Ver.3.2)
LTM10C306L
BLOCK DIAGRAM
1, 1
2, 1
X2
n-1
, 1
X2
n
, 1
1024, 1
1, 2
1, Y
X
2n-1
, Y
X
2n
, Y
1, 768
1024,768
CN2
Conn
ec
tor
LVDS
DC/DC
Converter
Panel
Controller
Gray scale
Manipulation
Voltage
Generation
Circuit
Y
-
dr
i
v
er
Liquid Crystal Panel
1024 x 768 pixels
X-driver
Backlight
1024 pixels
768 pixels
D/A
Converter
Circuit
CN1
FPC
I/F PCB
(4/10) 1999-10-14 (Ver.3.2)
LTM10C306L
TIMING CHART
VALID
DATA
1023,Y
1024,Y
1022,Y
1
021,Y
X,Y
7,
Y
6,
Y
5,
Y
4,
Y
3,
Y
2,
Y
X,4
X,2
X,3
X,1
X,767
X,768
X,Y
1,
Y
(1)Verti
cal
Timing
(2)Horiz
ontal
Timin
g
TCIH
TCIL
TSTC
THTC
IH
(MIN):2.2(V)
IL(M
AX):0.8(V)
V
V
I
H(MIN):2.2(V)
IL(M
AX):0.8(V)
V
V
(5/10) 1999-10-14 (Ver.3.2)
LTM10C306L
TIMING SPECIFICATION
1)2)3)4)5)6)
Item
Symbol
Min.
Typ.
Max.
Unit
Remarks
Frame Period
t1
778
t3
-
806
t3
16.67
860
t3
17.25
-
ms
Vertical
Display Term
t2
768
t3
768
t3
768
t3
-
One Line Scanning
Time
t3
1319
t5
20.04
1344
t5
20.68
1462
t5
-
-
s
Horizontal
Display Term
t4
1024
t5
1024
t5
1024
t5
-
Clock Period
t5
15.0
15.38
-
ns
Note 1) Refer to "TIMING CHART" and LVDS (DF90CF364MTD) specifications by National Semiconductor.
Note 2) If ENAB is fixed to "H" or "L" level for certain period while NCLK is supplied, the panel displays black with some
flicker.
Note 3) If NCLK is fixed to "H" or "L" level for certain period while ENAB is supplied, the panel may be damaged.
Note 4) Please adjust LCD operating signal timing and FL driving frequency, to optimize the display quality.
There is a possibility that flicker is observed by the interference of LCD operating signal timing and FL driving
Condition (especially driving frequency ), even if the condition satisfies above timing specifications and
recommended operating conditions shown in 3.
Note 5) Do not make t1,t2 and t3 fluctuate.
If t1,t2 and t3 are fluctuate, the panel displays black.
SEQUENCE OF POWER SUPPLIES AND SIGNALS
DD
NCLK
DATA
ENAB
3.0V
3.0V
0.2V
0.2V
0.2V
DD
500ms(min.)
10ms(max.)
40ms(max.)
10ms(max.)
40ms(max.)
0ms(min.)
0.2 V
V
0ms(min.)
DD
0.2 V