TA1316AN

2002-10-04

Toshiba Bipolar Linear Integrated Circuit Silicon Monolithic

TA1316AN

YCbCr/YPbPr Signal and Sync Processor for Digital TV, Progressive Scan TV and Double

Scan TV

TA1316AN is a component signal and sync processor for Digital

TV, Progressive scan TV and Double scan TV.

TA1316AN provides high performance signal processors in the

luminance and color difference blocks. The sync circuit can
process 525I/P, 625I/P, 750P, 1125I/P, PAL100 Hz and
NTSC120 Hz formats.

TA1316AN provides I

C bus interface, so various functions and

controls are adjustable via the bus.

Features

Luminance Block

· Black stretch, DC restoration
· Dynamic correction
· SRT (LTI)
· Y group delay correction (shoot balance correction)
· APACON white peak limit
· White pulse limit (white letter improvement)
· Hi-bright color
· Color detail enhancer (CDE)
· VSM output

Color Difference Block

· Flesh color correction
· Dynamic Y/C correction
· Color SRT (CTI)
· Color
· White peak blue correction

Text Block

· OSD blending SW
· ACB (only black level)
· 2 analog RGB inputs

Synchronization Block

· Horizontal synchronization

(15.75 kHz, 31.5 kHz, 33.75 kHz, 45 kHz)

· Vertical synchronization

(525I/P, 625I/P, 750P, 1125I/P, PAL 100 Hz, NTSC 120 Hz)

· 2-and 3-level sync. separation circuit
· Accept both positive and negative HD/VD input
· Mask for copy-guard signal
· Vertical blanking

Weight: 5.55 g (typ.)

TA1316AN

2002-10-04

Block Diagram

DAC2

(ACB PLUSE)

HORIZONTAL

FREQUENCY

AFC FILTER

H CURVE

CORRECTION

/
D

C V

HORIZONTAL

PHASE

CBUS

DECODER

FREQUENCY

CLAMP

H DUTY

L V

L GND

/
D

C GND

VP OUT

PbPr/YCbCr YUV CONVERT

H CURVE

CORRECTION

SYNC

SEPA

HD IN SW

INTEGRAL

VD IN SW

RGB OUT

H C/D

HVCO

H-AFC

H-RAMP

V C/D

FREQUENCY

ACB

PULSE

POLARITY

CLAMP

PULSE

EXT

V-BLK

H-BLK

V-BLK

V-CLP

DRIVE

CLAMP

BLK

CUT OFF

RGB

BRIGHTNESS

CLAMP

RGB

CONTRAST

MIXER SW/

BLUE BACK

RGB

MATRIX

CLAMP

WP BLUE

HALF TONE

/C MUTE

COLOR

G-Y

MATRIX

RELATIVE

PHASE/

AMPLITUDE

H-BPP

V-BPP

UNI-COLOR

COLOR

CLAMP

PULSE

EXT

CP/BPP

SYNC OUT

BPP

EXT

BPP

DL/

COLOR

SRT

TINT

Y/C LEVEL

COMP

IQ UV

CONVERTER

UV IQ

CONVERTER

FRESH

COLOR

CLAMP

BLACK

STRETCH

BLACK PEAK

DETECT

DARK

DET

BLACK LEVEL

CORECTION

DYNAMIC

DC REST

SHARPNESS

DELAY LINE

APL

DETECT

GROUP

DELAY

CORRECTION

YNR

SRT

WPL

CLAMP

UNI-

COLOR

APACON

WPL

SUB-

CONTRAST

WPS

HALF TONE

HI-BRIGHT

COLOR

Yout-

COLOR

PEAK

DETECT

SHARPNESS

CONTROL

Y DETAIL

CONTROL

CDE

BRIGHTNESS

ABCL

AMP

VSM

MUTE

VSM AMP

HPF

OSD

AMP

CLAMP

OSD

ACL SW

MATRIX SW

DARK AREA

DET FILTER

BPH FILTER

APL FILTER

ABCL IN

COLOR

LIMITER

ANALOG

OSD G IN

ANALOG

OSD R IN

VSM OUT

ANALOG

OSD B IN

(ANALOG OSD)

R I

R S/

G S

/
H

B S/H

B IN

LOG

RGB

)

/P-

/
B

L
K

Y/C V

RGB GND

Y/C GND

RGB V

SCL

SDA

SCP OUT

SCP IN

HVCO

H-OUT

FBP IN

VP OUT

SYNC IN

VD1 IN

HD1 IN

HD2 IN

VD2 IN

R OUT

G OUT

B OUT

DAC2

DAC1

S/H

49 52

B-Y

G-Y

R-Y

FBP/BLK

TA1316AN

2002-10-04

Pin Assignment

APL FILTER

Y/C V

VSM OUT

ABCL IN

/P-MUTE/BLK

1 (analog OSD)

DARK AREA DET FILTER

BPH FILTER

Y1 IN

Y/C GND

MATRIX SW

2 (analog OSD)

Y2 IN

COLOR LIMITER

VD2 IN

HD2 IN

SYNC IN

VD1 IN 15

HD1 IN

SCP IN

SCP OUT

DEF/DAC V

AFC FILTER

HVCO

HORIZONTAL FREQUENCY SW 22

H CURVE CORRECTION

FBP IN

DEF/DAC GND

H-OUT

VP OUT

3 (analog RGB)

R S/H

G S/H

B S/H

RGB GND

R OUT

G OUT

B OUT

40 RGB V

ANALOG OSD R IN

ANALOG OSD G IN

ANALOG OSD B IN

DAC2 (ACB pulse)

ANALOG R IN

ANALOG G IN

ANALOG B IN

L GND

SDA

30 SCL

L V

TA1316AN

TA1316AN

2002-10-04

No.

Pin Name

Function

Interface Circuit

Input Signal/Output Signal

5 C

Inputs C

signal via clamp

capacitor.

Recommended input
amplitude: 700 mV

p-p

at 100%

color bar.

100 mV

p-p

at 100% color bar for C

Y/C GND

GND pin for Y/C block.

7 MATRIX

Matrix switching pin for YCbCr
or YPbPr input.

Switches matrix according to
voltage value input to this pin
when BUS control "YUV
INPUT MODE"

00 or 01.

Then, control by pin has
priority over control by BUS
(see table 4).

When pin is not used, connect
0.01

F capacitor between pin

and GND.

When YUV INPUT MODE

00 or 01,

0~0.6 V: YCbCr

Internal YUV

0.9~5 V: YPbPr

Internal YUV

Open: BUS control

1 k

5 k

1 k

112 k

BUS

TA1316AN

2002-10-04

No.

Pin Name

Function

Interface Circuit

Input Signal/Output Signal

16 HD1

Inputs horizontal sync signal
HD1. Input signal can have
both positive and negative
polarity.

17 SCP

Inputs SCP from up converter.

Input signals are clamp pulse
(CP) and black peak detection
stop pulse (BPP).

2.2 V~2.8 V: BPP

4.7 V~9 V: CP

18 SCP

OUT

Outputs SCP.

Output signals are clamp pulse
(CP) and black peak detection
stop pulse (BPP).

(Note) Don't use
Horizontal-BPP (H-BPP) for
the timing pulse of picture
period on the screen (e.g.
H-BLK) because H-BPP width
will be changed by the
temperature.

1 k

50 k

500

5 k

200

CP: 5.0 V

BPP: 2.5 V

0 V

5 k

50 k

40 k

Threshold:
0.75 V

TA1316AN

2002-10-04

No.

Pin Name

Function

Interface Circuit

Input Signal/Output Signal

HORIZONTAL
FREQUENCY
SW

Horizontal frequency select
pin.
Selects horizontal frequency
according to voltage value
input to this pin.

When selecting horizontal
frequency by BUS control,
leave pin open. Control by pin
has priority over control by
BUS.

When this IC will be used on
CRT, the frequency of H-out
(pin 26) should be controlled
by DC voltage which is divided
from voltage of DEF V

(pin

19) by resisters.

At BUS control (horizontal frequency):
output voltage value
00 (15.75 kHz): DC 9 V
01 (31.5 kHz): DC 6 V
10 (33.75 kHz): DC 3 V
11 (45 kHz):

DC 0 V

At pin 22 control, horizontal frequency
and input voltage value

0~1.0

kHz

2.0~4.0

33.75

kHz

5.0~7.0

31.5

kHz

8.0~9.0

15.75

kHz

H CURVE
CORRECTION

Corrects curve at high-tension
fluctuation.
Input AC component of
high-tension fluctuation.

When pin is not used, connect
0.01

F capacitor between pin

and GND.

1 k

65 k

25 k

50 k

130 k

6.5 V

1 k

30 k

1 k

20 pF

60 k

16 k

4.5 V

7.5 V

1.5 V

TA1316AN

2002-10-04

No.

Pin Name

Function

Interface Circuit

Input Signal/Output Signal

27 VP

OUT

Outputs vertical pulse.

When a current is applied to
the pin, external blanking is
carried out by ORing this
signal with the internal
blanking signal.

(Note) When H-POSITION will
be changed, VP width will
change. Use the start phase of
VP.

V-BLK input current: 780

A~1 mA

28 DAC1

(SYNC OUT)

Outputs 1-bit DAC or
composite SYNC signal after
sync separation.

Open-collector output
(The output level for this pin
cannot be guaranteed since
leakage from internal signals
may occur.)

DC or SYNC OUT

29 I

L V

pin for I

L block.

Connect 2 V (typ.).

Power to pin 29 should be
supplied from pin 19 via zener
diode through resister.

5 V

0 V

Start phase

VP output:

500

200

TA1316AN

2002-10-04

No.

Pin Name

Function

Interface Circuit

Input Signal/Output Signal

ANALOG OSD B IN

ANALOG OSD G IN

ANALOG OSD R IN

Inputs analog OSD signal via
clamp capacitor.

Recommended input
amplitude: 0.7 V

p-p

(no sync)

at 100% white

100 IRE: 0.7 V

p-p

40 RGB

pin for text/RGB block.

To ascertain the correct
voltage for V

, please refer to

the table entitled Maximum
Ratings.

B OUT

G OUT

R OUT

Outputs R/G/B signal.

Recommended output
amplitude: 100 IRE

2.3 V

p-p

100 IRE: 2.3 V

p-p

Conditions:

UNI-COLOR

max

SUB-CONT

Cent

0.7 V

p-p

44 RGB GND

GND pin for text/RGB block.

1 k

37
38
39

1 k

41
42
43

200

100

7 m

TA1316AN

2002-10-04

No.

Pin Name

Function

Interface Circuit

Input Signal/Output Signal

49 Y

(analog RGB)

Selects input between internal
RGB and external analog RGB
according to voltage value
input to this pin.

When analog RGB is selected,
mutes VSM output.

0~0.5 V: Internal

1.5~9 V: Analog RGB, VSM mute

(analog OSD)

Switches between internal
RGB and OSD input signals.

Voltage applied to Y

1 and

2 adjusts blend ratio of

internal RGB and OSD signals.

When Y

1 or Y

2 is High,

mutes VSM output.

2 Y

Blend ratio
Int RGB:
OSD RGB

L L 10:0

H L 7:3

L H 5:5

H H 0:10

0~0.5 V: Internal

1.1~1.7 V: VSM mute

2.9~9 V: OSD, VSM mute

300

50
51

300

50 k

TA1316AN

2002-10-04

Bus Control Map

Write Mode

Slave Address: 88H

Sub-Add

D7 D6 D5 D4 D3 D2 D1 D0 Preset

00 H-FREQ

H-DUTY

YUV-SW

DAC1

DAC2

SYNC

INPUT-SW

1000

0000

01 HORIZONTAL

POSITION

CLP-PHS

1000

0000

02 ACB-MODE

SCP-SW

HBP-PHS

SYNC

SEP-LEVEL TEST 1000

0000

03 V-BLK

PHASE VERTICAL

FREQUENCY

1000

0000

COMPRESSION-BLK PHASE-1

COMPRESSION-BLK PHASE-2

1000

0000

05 P-MODE1

UNI-COLOR

1000

0000

06 BRIGHTNESS

1000

0000

07 OSD-ACL

COLOR

1000

0000

08 TINT

RGB-ACL

1000

0000

09 PICTURE

SHARPNESS YNR

1000

0000

0A RGB

BRIGHTNESS

DCRR-SW

1000

0000

0B HI

BRT

RGB

CONTRAST

1000

0000

SUB CONTRAST

WPS

YUV INPUT MODE

1000

0000

0D DRIVE

GAIN1 DR-R

1000

0000

0E DRIVE

GAIN2

DR-B/G

1000

0000

R CUT OFF

1000

0000

G CUT OFF

1000

0000

11 B

CUT

OFF

1000

0000

12 R-Y/B-Y

GAIN

R-Y/B-Y

PHASE

1000

0000

13 G-Y/B-Y

GAIN

G-Y/B-Y

PHASE

1000

0000

COLOR SRT GAIN

C-SRT FREQ

COLOR

CLT

1000

0000

C.D.E.

Y/C GAIN COMP1

Y/C GAIN COMP2

FRESH-COLOR

1000

0000

VSM PHASE

VSM GAIN

APACON PEAK FREQ 1000

0000

DC REST POINT

DC REST RATE

DC REST LIMIT

1000

0000

BLACK STRETCH POINT

APL VS BSP

B.L.C.

B.D.L

BS-ARE

1000

0000

19 SHR-TRACKING

WPL-LEVEL

WPL-FREQ

1000

0000

DYNAMIC ABL POINT

DYNAMIC ABL GAIN

P-MODE2

1000

0000

ABL POINT

ABL GAIN

RGB OUT MODE

1000

0000

1C DYNC

-POINT DYNC

GAIN VS DARK AREA

STATIC

-GAIN Y-OUT

1000 0000

1D OSD

BRIGHT

OSD

CONTRAST

Y/C-DL1

APACON

WPL

1000

0000

Y DETAIL CONTROL

WP BLUE POINT

1000 0000

Y GROUP DELAY CORRECTION

Y/C-DL2

WP BLUE GAIN

1000

0000

Read Mode

Slave Address: 89H

D7 D6 D5 D4 D3 D2 D1 D0

0 POR

IK-IN

RGB-OUT

YUV-IN

H-OUT

VP-OUT

RGB-IN

SYNC-IN

TA1316AN

2002-10-04

Bus Control Functions

Write Mode

Parameter Explanation

Preset

H-FREQUENCY

Selects horizontal oscillation frequency.

00: 15.75 kHz, 01: 31.5 kHz, 10: 33.75 kHz, 11: 45 kHz

Control by pin 22 has priority over BUS control. When this IC will be used on CRT,
the frequency of H-out should be controlled by pin 22.

33.75 kHz

H-DUTY

Switches horizontal output duty.

0: 41%, 1: 47%

41%

YUV-SW

Switches YUV input.

0: INPUT-1 (Y1/C

), 1: INPUT-2 (Y2/C

)

INPUT-1

DAC 1

Switches DAC control output.

Don't use this function

Open

DAC 2

Switches DAC control output.

0: On (low), 1: Open (high)

When TEST

00, controls 1-bit DAC when output is open-collector.

When TEST

01, outputs ACB reference pulse from pin 36.

SYNC INPUT-SW

Selects sync input.

00: Selects HD1/VD1 input.

01: Selects HD2/VD2 input.

10/11: Selects SYNC input.

HD/VD1

HORIZONTAL
POSITION

Adjusts horizontal picture phase.

0000000 (

10.5%)~1111111 (

10.5%)

(Note) When H-POSITION will be changed, VP width (pin 27) will change.

Center

CLP-PHS

Switches clamp pulse phase.

0: 0.7-

s (2.5%) width with 1.1-

s (3.8%) delay from HD stop phase

1: 0.7-

s (2.4%) width with 0.2-

s (0.7%) delay from HD stop phase

While quiescent, 0.8-

s (2.7%) width with 1.2-

s (4.2%) delay from FBP start

phase

Also switches CP phase of SCP-OUT (pin 18).

1.1-

s delay

ACB MODE

Sets ACB mode. Selects reference level for convergence.

00: ACB off (cutoff BUS control), 01: ACB on (5 IRE),

10: ACB on (10 IRE), 11: ACB on (20 IRE)

ACB on (10 IRE)

SCP-SW

Switches SCP (sandcastle pulse) mode.

0: Internal mode, 1: External input mode

Also switches SCP-OUT (pin 18).

(Note) Don't use H-BPP for the timing pulse, because H-BPP width of internal

mode will be changed by the temperature.

Inside IC

HBP-PHS

Switches horizontal black peak detection pulse phase.

6.3% of FBP, 1:

3.5% of FBP

6.3% width

SYNC SEP-LEVEL

Selects SYNC separation level.

00: 8.5%, 01: 20%, 10: 30%, 11: 40%

min

TEST

Test mode

When TEST

00, controls 1-bit DAC when output is open-collector.

When TEST

01, outputs H-SYNC from pin 28 and ACB reference pulse from pin

36.

Do not use TEST

10/11 because this is used for IC Shipment Test mode.

TA1316AN

2002-10-04

Parameter Explanation

Preset

V-BLK PHASE

Adjusts vertical BLK stop phase.

00000 (16H) ~11110 (46H) (1 H/STEP),

11111: Internal V-BLK off

32 H

V-FREQUENCY

Vertical free-running frequency. Sets vertical pull-in range (Table 1).

1281 H

COMPRESSION-BLK
PHASE-1/2

Adjusts compression BLK phase. Adjusts BLK at top and bottom (Table 2).

Off

P-MODE1/2

Selects picture mode. Selects between picture mute, half-tone, blue background,
and Y mute (Table 3).

P-MUTE 1

UNI-COLOR

Adjusts unicolor.

0000000 (

16.5dB) ~111 (0dB)

min

BRIGHTNESS

Adjusts brightness.

00000000 (

40 IRE) ~11111111 (

40 IRE)

Center

OSD-ACL

Turns OSD-ACL on/off.

0: Off, 1: On

COLOR

Adjusts color.

0000000: Color mute,

0000001 (

20dB or more) ~1111111 (

4.6dB)

C-MUTE

TINT

Adjusts tint.

0000000 (

32 deg) ~1111111 (

32 deg)

Center

RGB-ACL

Switches analog RGB-ACL sensitivity.

6dB, 1: Normal

6 dB

PICTURE-SHARPNESS

Adjusts sharpness.

0000000 (

10dB or more) ~1111111 (

17dB (at peak FREQ) )

Center

YNR

YNR: Turns luminance (Y) noise reduction (NR) on/off.

0: Off, 1: On

Lower two bits of PICTURE-SHARPNESS (09-D2/D1)

00: Trap (at peak FREQ)

11: Flat

YNR level is controlled by lower two bits (09-D2) of PICTURE-SHARPNESS.

DL-APACON gain control by PICTURE-SHARPNESS is invalid.

Off

RGB-BRIGHTNESS

Adjusts RGB brightness.

0000000 (

20 IRE) ~1111111 (

20 IRE)

Center

DCRR-SW

Switches DC restoration rate.

0: 100% or more, 1: 100% or less

100% or more

HI BRT

Turns high bright color on/off.

0: Off, 1: On

RGB-CONTRAST

Adjusts RGB contrast.

0000000 (

16.5dB) ~1111111 (0dB)

min

SUB-CONTRAST

Adjusts sub-contrast.

00000 (

3.5dB) ~11111 (

2.6dB)

Center

WPS

Adjusts WPS level.

0: 110 IRE 1: 130 IRE

110 IRE

YUV INPUT MODE

Selects Y/color difference signal input mode.

00: Y/Cb/Cr, 01: Y/Pb/Pr, 10: Through, 11: Y/U/V (TA1270)

Control by pin takes priority at 00 and 01 (table 4).

(Ref.) Y/Cb/Cr: ITU-R BT 601

Y/Pb/Pr: ITU-R BT 709 (1125/60/2:1)

Y/Cb/Cr

TA1316AN

2002-10-04

Parameter Explanation

Preset

DRIVE GAIN1/2

Adjusts drive gain 1 and drive gain 2.

0000000 (

5dB) ~1111111 (

3dB)

Center

DR-R

DR-B/G

Switches reference RGB drive gain (Table 5).

R/G/B CUT OFF

Adjusts R/G/B cutoff.

1) RGB-OUT when ACB off

00000000 (1.9 V) ~11111111 (2.9 V)

2)SENS-IN when ACB on

00000000 (0.5 V

p-p

) ~11111111 (1.5 V

p-p

)

Center

R-Y/B-Y GAIN

Adjusts R-Y/B-Y relative amplitude.

0000 (0.54) ~1111 (0.85)

Center

R-Y/B-Y PHASE

Adjusts R-Y/B-Y relative phase.

0000 (90 deg) ~1111 (111.5 deg)

min

G-Y/B-Y GAIN

Adjusts G-Y/B-Y relative amplitude.

0000 (0.28) ~1111 (0.38)

Center

G-Y/B-Y PHASE

Adjusts G-Y/B-Y relative phase.

0000 (232 deg) ~1111 (256 deg)

min

COLOR SRT GAIN

Adjusts color SRT gain.

000 (min) ~111 (max)

Center

C-SRT-FREQ

Selects color SRT peak frequency.

00: 4.5 MHz, 01: 5.8 MHz, 10: 8.5 MHz, 11: Off

4.3 MHz

COLOR

Selects color

correction point.

00: Off, 01: 0.23 V

p-p

, 10: 0.40 V

p-p

, 11: 0.58 V

p-p

Off

CLT

Switches color limiter level.

0: 1.65 V

p-p

, 1: 2 V

p-p

1.65 V

p-p

CDE

Adjusts color detail enhancer.

00: min 11: max

Center

Y/C GAIN COMP1/2

Selects dynamic Y/C compensation.

COMP1, 00: Off, 01: min, 10: mid, 11: max

COMP2, 00: Off, 01: min, 10: mid, 11: max

All off

FRESH-COLOR

Selects flesh color.

00: Off, 01:

33.7 deg, Normal,

10:

9.5 deg, High, 11:

9.5 deg, Normal

Off

VSM-PHASE

Adjusts VSM phase.

000 (

37.5 ns) ~101 (normal) ~111 (

15 ns)

7.5 ns

VSM GAIN

Adjusts VSM gain.

000: OFF, 001:

3 dB, 111:

19 dB

Off

APACON PEAK f

Selects APACON peak frequency.

00: 13.5 MHz, 01: 9.5 MHz, 10: 7.3 MHz, 11: 4.7 MHz

13.5 MHz

DC REST POINT

DC restoration point

000: 0%, 111: 51%

Center

DC REST RATE

Adjusts DC restoration rate.

000 (100%) ~111 (135% (65%) )

100%

DC REST LIMIT

Selects DC restoration limit point.

00: 57%, 01: 71

, 10: 78%, 11: 78%

min

TA1316AN

2002-10-04

Parameter Explanation

Preset

BLACK STRETCH POINT

Adjusts black stretch point 1.

000: OFF, 001 (34 IRE) ~111 (53 IRE)

Center

APL VS BSP

Adjusts black stretch point 2.

00 (0 IRE) ~11 (24 IRE) up

0 IRE

B.L.C

Turns black level automatic correction on/off.

Max: 8.5 IRE, black stretch has priority.

0: Off, 1: On

Off

B.D.L.

Switches black detection level.

0: 3 IRE, 1: 0 IRE

3 IRE

BS-ARE

Turns black stretch area on/off.

0: On, 1: Off

SHR-TRACKING

SHR tracking (adjusts SRT component gain.)

00 (SRT-GAIN max) ~11 (SRT-GAIN min)

Center

WPL-LEVEL

Adjusts white letter improvement amplitude.

000: min 111: max

min

WPL-FREQ

Adjusts white letter improvement start frequency.

000 (5 MHz) ~111 (16 MHz)

5 MHz

DYNAMIC ABL POINT

Adjusts dynamic ABL detection voltage.

000 (min) ~111 (max)

Center

DYNAMIC ABL GAIN

Adjusts dynamic ABL sensitivity.

000 (min) ~111 (max)

min

ABL POINT

Adjusts ABL detection voltage.

000 (min) ~111 (max)

Center

ABL GAIN

Adjusts ABL sensitivity.

000 (min) ~111 (max)

min

RGB-OUT MODE

Switches RGB output mode (switch for RGB output mode for test and adjustment).

00: Normal, 01: R only, 10: G only, 11: B only

Normal

DYNC

-POINT

Switches dynamic Y

point.

00: 20 IRE, 01: 21.5 IRE, 10: 23.5 IRE, 11: 25 IRE

23.5 IRE

DYNC

GAIN VS DARK

AREA

Turns dynamic Y

gain VS dark area on/off.

000 (min) ~

111 (max (when 25 IRE or below is 25% or more of area ratio,

3dB) )

min

STATIC

-GAIN

Turns static Y

dark area gain on/off.

00: Off (0dB) 11: max (1.5dB, at this time, DYNC

gain is

1.5dB max)

Off

Y-out

Turns Y-out

on/off.

0: Off, 1: On

Off

OSD BRIGHT

Adjusts OSD brightness.

00: 5 IRE, 01: 0 IRE, 10:

5 IRE, 11:

10 IRE

5 IRE

OSD-CONTRAST

Adjusts OSD contrast.

00 (min (

9.5dB) ) ~11 (max (0dB) )

min

Y/C DL1/2

Adjust Y/C relative phase: Y phase before RGB matrix is changed.

Y/C DL2

0 and Y/C DL1

10 ns, Y/C DL2

0 and Y/C DL1

5 ns

Y/C DL2

1 and Y/C DL1

0: 0 ns, Y/C DL2

1 and Y/C DL1

5 ns

10 ns

APACON WPL

Adjusts APACON white peak limiter.

000 (Off) ~111 (Maximum effect of positive limiter)

Off

TA1316AN

2002-10-04

Parameter Explanation

Preset

Y DETAIL CONTROL

Controls Y detail: Adjusts differential signal for frequency other than picture

sharpness.

00000 (min (trap) ) ~11111 (max (

6dB) )

Peak frequency linked to APACON PEAK FREQ

00: 5.5 MHz, 01: 3.7 MHz, 10: 14.5 MHz, 11: 10 MHz

Center

WP BLUE POINT

Adjusts white peak blue point.

000 (60 IRE) ~111 (112 IRE)

min

Y-GROUP DELAY
CORRECTION

Corrects Y group delay.

0000: Decreases preshoot gain (increases overshoot gain).

1111: Decreases overshoot gain (increases preshoot gain).

Center

WP BLUE GAIN

Adjusts white peak blue gain.

000 (min (

2.3 dB) ) ~111 (max (

10 dB) )

min

Table 1: Vertical Frequency

V-BPP

Data V

PULL-IN

Range

Start Phase

Stop Phase

Format/V-FREQUENCY, H-FREQUENCY

000 48~1281H

1100H

1125P/30

(33.75

kHz)

001 48~849H

730H

750P/60

(45

kHz)

010

48~725H

600H

625P/50 Hz (31.5 kHz)

011

48~660H

545H

1125I/60 Hz (33.75 kHz)

100

48~613H

500H

525P/60 Hz (31.5 kHz)

101 48~363H

290H

PAL/SECAM/50 Hz (15.625 kHz),
100 Hz (31.5 kHz)

110 48~307H

240H

V-BLK P.

(C.BLK P.)

20 H

NTSC/60 Hz (15.734 kHz),
120 Hz (31.5 kHz)

111 VP-OUT

Table 2: Compression-BLK Phase

V-FREQUENCY

PHASE-1 (start phase)

PHASE-2 (stop phase)

000 1088H~1118H

001 720H~750H

010 592H~622H

011 528H~558H

100 488H~518H

101 280H~310H

110 224H~254H

50H~78H

(0000: C-BLK OFF)

111 C-BLK

OFF

TA1316AN

2002-10-04

Table 3: P-Mode

05-D7 1A-D1 1A-D0 MODE

Details

0 0 0

NORMAL

Can mute picture or half-tone main signal using Y

pin.

Can insert analog RGB-IN using Ys3; OSD-IN using Ys1/Ys2.

Analog RGB-IN

P-Mute

0 0 1 Y-MUTE

Mutes main signal Y in whole picture using BUS.

Can insert analog RGB-IN using Ys3; OSD-IN using Ys1/Ys2.

Analog RGB-IN

P-Mute

0 1 0 Y

Half-tones main signal in whole picture using BUS.

Can insert P-Mute using Y

pin.

Can insert analog RGB-IN using Ys3.

Blends OSD-IN with main H/T signal using Ys1/Ys2.

Analog RGB-IN

P-Mute

0 1 1 BB

Blue-backs main signal using BUS.

Can insert P-Mute using Y

pin.

Can insert analog RGB-IN using Ys3; OSD-IN using Ys1/Ys2.

Analog RGB-IN

P-Mute

1 0 0

P-MUTE

Mutes main signal in whole picture using BUS.

Can insert analog RGB-IN using Ys3; OSD-IN using Ys1/Ys2.

Analog RGB-IN

P-Mute

1 0 1 Y

2 Cannot

used.

1 1 0

P-MUTE

Cannot

used.

1 1 1

NORMAL

Cannot

used.

Output priority: main signal < BB < P-MUTE < RGB-IN < OSD-IN

Table 4: YUV INPUT MODE

YUV INPUT MODE

Pin 7

MATRIX

LOW YCbCr

Internal YUV

HIGH YPbPr

Internal YUV

OPEN YCbCr

Internal YUV

LOW YCbCr

Internal YUV

HIGH YPbPr

Internal YUV

OPEN YPbPr

Internal YUV

Through

YUV

Internal YUV

TA1316AN

2002-10-04

Table 5: DR-R, DR-B/G

0D-D0

0E-D0

Reference Axis

Drive Gain1

Drive Gain2

0 0

0 1

1 0

1 1

Read Mode

Parameter Explanation

POR

Power-on reset

0: Register preset, 1: Normal

After power-on, 0 is read on first read; 1 on subsequent reads.

IK-IN

IK input detection: detects input to pin 45.

0: NG (no input), 1: OK (input)

RGB-OUT

RGB-OUT self-check result: detects output from pins 41, 42 and 43.

0: NG (no output), 1: OK (output)

Returns OK when signal is detected on all three outputs. If signals are small, does not return
OK.

YUV-IN

YUV-IN self-check result: detects input to pins 3, 4 and 5 or pins 8, 9 and 10.

0: NG (no input), 1: OK (input)

Returns OK when AC signal is detected on all three inputs. If signals are small or are DC
voltage, does not return OK.

H-OUT

H-OUT self-check result: detects output from pin 26.

0: NG (no output), 1: OK (output)

VP-OUT

VP-OUT self-check result: detects output from pin 27.

0: NG (no output), 1: OK (output)

RGB-IN

RGB-IN self-check result: detects input to pins 33, 34 and 35.

0: NG (no input), 1: OK (input)

Returns OK when AC signal is detected on all three inputs. If signals are small or are DC
voltage, does not return OK.

SYNC-IN

SYNC-IN self-check result: detects input to pin 14.

0: NG (no input), 1: OK (input)

TA1316AN

2002-10-04

Data Transmit Format 1

Data Transmit Format 2

Data Receive Format

At the moment of the first acknowledge, the master transmitter becomes a master receiver and a slave

transmitter.

The Stop condition is generated by the master.
Details are provided in the Philips I

C specifications.

Optional Data Transmit Format: Automatic Increment Mode

In this transmission method, data is set on automatically incremented sub-address from the specified

sub-address.

Purchase of TOSHIBA I

C components conveys a license under the Philips I

C Patent Rights to use these

components in an I

C system, provided that the system conforms to the I

C Standard Specification as defined by

Philips.

Slave address

0 A

Transmit data

Sub address

A P

7 bits

MSB

S: Start condition

8 bits

MSB

A: Acknowledge

9 bits

MSB

P: Stop condition

Slave address

0 A

Transmit data

Sub address

Transmit data n

Sub address

A P

Slave address

1 A

Transmit data 2

Transmit data 1

A P

7 bits

MSB

8 bits

MSB

Slave address

Transmit data 2

Transmit data 1

A P

7 bits

MSB

8 bits

MSB

Sub address

7 bits

MSB

A 1

8 bits

MSB

TA1316AN

2002-10-04

Maximum Ratings

(Ta

=
=
=
= 25°C)

Rating

Characteristics Symbol

PCB A

PCB B

PCB C

Unit

Power supply voltage

max 12

12 V

Input pin signal voltage

max 9

9 V

p-p

Power dissipation

(Note1)

2551

2717

3378

Power dissipation reduction rate

20.4 21.7 27.0

mW/

Operating temperature

opr

20~65

Storage temperature

stg

55~150

min 8.5 8.7 8.7

typ. 8.8 9.0 9.0

Power supply voltage
(Pins 19, 40, 55)

max 9.1 9.3 9.3

Note 1: Please see the following Figure.

Note, however, that the conditions apply only to the case where the device is mounted on board A (180 mm

125 mm

1.6 mm, one-sided); board B (329 mm

249 mm

1.6 mm, two-sided); or board C (276 mm

192 mm

1.6 mm, six-layered). When mounting the IC, select boards no smaller than these. When using

under the conditions of board A, set the IC's power supply voltage (pins 19, 40, 55) to 8.8 V (

0.3 V)

Because the IC's thermal capacity margin is narrow, when designing a set, incorporate heat discharge
features into the design. Note that the power dissipation varies widely depending on the board mounting
conditions.

Note 2: Pins 3, 4, 5, 7, 8, 9, 10, 11, 20, 21, 22, 23, 30, 31, 33, 34, 36, 39, 45, 46, 49, 50, 51, 52 and 53 are

susceptible to damage from surge voltages and should thus be handled with extreme care.

Figure 1 Characteristics of decrease in power dissipation

Ambient temperature Ta (°C)

o
wer

dissi

pati

on P

(mW

)

2717

150

25 65

1848

2297

3378

Printed circuit board B

Printed

circuit

board A

2551

1735

Printed circuit board C

TA1316AN

2002-10-04

Note 3: Power supply sequence

At power-on, power should be supplied to the IC's power supply pins according to the following sequence:
first to pin 29 (I

L V

), then to pin 19 (DEF/DAC V

), and finally to pin 40/pin 55 (RGB V

/YC V

Power to pin 29 should be supplied from pin 19 via zener diode through resister.
If power is not supplied to all the power pins or if power is not supplied in the above sequence, BUS preset
will be unsettled and the IC may not function properly.
Especially, when the frequency of H-out (pin 26) will be unsettled, H deflection output transistor may be
broken.
When this IC will be used on CRT, the frequency of H-out should be controlled by pin 22.

Figure (Note 3) Timing from immediately after power-on to time

at which H-out is output (at Ta

=
=
=
= 25°°°°C)

L V

Logic operation 1.5 V (typ.)

Power-on reset (POR) threshold voltage

for bus operation 3.3 V (typ.)

H-out output 5.2 V (typ.)

V DEF/DAC

TA1316AN

2002-10-04

Note 4: V

condition at Power-OFF

At power-off, the last pulse of H-out (pin 26) will become unknown, if I

L V

(pin 29) is over 1.7 V at the

timing of H-out stop.
I

L V

should be below 1.7 V when DEF/DAC V

(pin 19) will be 6.2 V, which is the maximum voltage

when H-out stops.
Refer to Figure (Note 4-1).

If it is not in the condition of Figure (Note 4-1), it is recommended that H-out will be made LOW at power-off
by external control like micro-processor ang so on. Refer to Figure (Note 4-2).

Figure (Note 4-1) V

condition at power-off

6.2 V

L V

(pin 29)

V DEF/DAC V

(pin 19)

H-out stop voltage (max)

below 1.7 V

e
r
o

f
f

H-out

TA1316

DEF V

H-out

Control signal by
micro-processor and so on.

H-out waveform

Approximately ten

milli seconds or more

Control signal by micro-processor and so on.

6.2 V

DFF/DAC V

(Pin 19)

e
r
O

H-out

Figure (Note 4-2) Example how to stop H-out

TA1316AN

2002-10-04

Recommended Operating Conditions

Characteristics Description

Min

Typ.

Max

Unit

Board

(Note1)

8.5 8.8 9.1

Pins 19, 40 and 55

Boards B and C (Note1)

8.7

9.0

9.3

Supply voltage (V

)

1.8 2.0 2.2

Y input level

Pins 3 and 8: 100% color bar, including sync (picture
signal: 0.7 V

p-p

)

1.0

Color difference signal input level

Pins 4, 5, 9 and 10: 100% color bar, no sync

0.7

p-p

Matrix switching voltage

Pin 7

2.0

3.0

5.0

HD/VD input level

Pins 12, 13, 15 and 16

2.0

5.0

9.0

SYNC input level

Pin 14: 100% color bar, including sync

0.9

1.0

1.1

p-p

4.7 5.0 9.0

SCP input level

Pin 17

BPP

2.2 2.5 2.8

15.75

kHz

8.0 9.0 9.0

31.5

kHz

5.0 6.0 7.0

33.75

kHz

2.0 3.0 4.0

Horizontal frequency switching
voltage

Pin 22

45 kHz

1.0

H-AFC

4.0 5.0 9.0

FBP input level

Pin 24

H-BLK 1.7

2.25

2.8

H-OUT input current

Pin 26

9.0 15.0

DAC input current

Pins 28 and 36

0.3 1.0

SCL/SDA pull-up voltage

Pins 30 and 31

3.3

5.0

9.0

SDA input current

Pin 31

2 mA

Analog RGB input level

Pins 35, 34 and 33: White 100%

0.7

Analog OSD input level

Pins 37, 38 and 39: White 100%

0.7

p-p

switching

voltage

1.5 5.0 9.0

OSD

2.9 5.0 9.0

1/2 switching voltage

Pins 51 and
50

VSM

MUTE

1.1 1.5 1.7

BLK

7.0 9.0 9.0

P-MUTE

2.7 3.2 4.0

switching voltage

Pin 52

HALF

TONE

1.2 1.5 1.8

External V-BLK input current

Pin 27

0.78

1 mA

Note1: For the parameter values for boards A, B and C, please refer to the table entitled Maximum Ratings.

Electrical Characteristics

=
=
=
= 9 V/2 V, Ta ==== 25°C, unless otherwise specified)

Current Dissipation

Pin Name

Symbol

Test

Circuit

Min Typ. Max Unit

DEF/DAC V

CC1

21.0 24.2 26.9

RGB V

CC2

55.3 63.6 70.8

L V

CC3

21.0 24.1 26.8

Y/C V

CC4

39.3 45.3 50.3

TA1316AN

2002-10-04

Pin Voltage

Test Condition

(1) BUS

= Preset

(2) SW1

= B, SW2 = B, SW3 = C, SW4 = B, SW5 = B, SW7 = A, SW8~10 = B, SW14 = B, SW20 = ON,

SW23 = B, SW24 = A, SW26 = A, SW33~35 = A, SW37~39 = A, SW54 = OFF, SW56 = ON

Pin No.

Pin Name

Symbol

Test

Circuit

Min Typ. Max Unit

2 BPH

FILTER

5.5 5.8 6.1

3 Y1

4.7 5.0 5.3

4 Cb/Pb1

4.7 5.0 5.3

5 Cr/Pr1

4.7 5.0 5.3

7 MATRIX

2.0 3.0 4.0

8 Y2

4.7 5.0 5.3

9 Cb/Pb2

4.7 5.0 5.3

10 Cr/Pr2

4.7 5.0 5.3

11 COLOR

LIMITER

6.65 6.9 7.15

12 VD2

0 0 0.3

13 HD2

0 0 0.3

14 SYNC

1.6 2.0 2.4

15 VD1

0 0 0.3

16 HD1

0 0 0.3

17 SCP

3.9 4.4 4.9

20 AFC

FILTER

5.8 6.5 7.2

21 HVCO

5.0 5.3 5.6

23 H

CURVE

CORRECTION

2.2 2.5 2.8

ANALOG B IN

3.65 3.95 4.25

34 ANALOG

3.65 3.95 4.25

35 ANALOG

3.65 3.95 4.25

ANALOG OSD B IN

3.65 3.95 4.25

38 ANALOG

OSD

3.65 3.95 4.25

ANALOG OSD R IN

3.65 3.95 4.25

46 B

S/H

3.5 4.0 4.5

47 G

S/H

3.5 4.0 4.5

48 R

S/H

3.5 4.0 4.5

49 Y

3 V

0.0 0.1 0.2

50 Y

2 V

0.0 0.1 0.2

51 Y

1 V

0.0 0.1 0.2

52 Y

0.0 0.1 0.2

53 ABCL

5.85 6.1 6.35

54 VSM

OUT

4.2 4.4 4.6

56 APL

FILTER

4.8 5.0 5.2

TA1316AN

2002-10-04

Luminance Block

Characteristics

Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

Y input dynamic range

0.7

1.0

1.5

p-p

-15

-5

Black detection level shift

(Note P01)

Black stretch amplifier maximum gain

(Note P02)

2.5

3.0

3.5

BST1

Black stretch start point 1

BST2

(Note P03)

IRE

BS1

Black stretch start point 2

BS2

(Note P04)

IRE

001

010

100

120

Dynamic ABL detection voltage

100

(Note P05)

190

220

250

DAMIN

0.005

0.02

Dynamic ABL sensitivity

DAMAX

(Note P06)

0.29

0.32

0.35

V/V

Black level correction

BLC

(Note P07)

7.0

8.5

IRE

DGP00

DGPA

0.5

1.5

2.5

DGPB

3.5

Dynamic Y

correction point

DGPC

(Note P08)

IRE

Dynamic Y

gain

(Note P09)

Static Y

dark area gain

(Note P10)

1.3

1.7

2.2

ADT

100

0.9

1.1

1.2

ADT

135

1.2

1.35

1.5

DC restoration gain

ADT

(Note P11)

0.55

0.7

0.85

times

DT0

-5

DC restoration start point

DT1

(Note P12)

DTL11

DTL10

DTL01

DC restoration limit point

DTL00

(Note P13)

AP00

12.2

13.5

14.9

AP01

8.5

9.5

10.5

AP10

6.5

7.3

8.1

Sharpness control peak frequency

AP11

4.2

4.7

5.2

MHz

MAX00

MIN00

-15

-8

-4

MAX01

MIN01

-20

-14

-7

MAX10

MIN10

-25

-16

-7

MAX11

Sharpness control range

MIN11

(Note P14)

-30

-20

-8

TA1316AN

2002-10-04

Characteristics

Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

CEN00

7.5

12.5

CEN01

CEN10

Sharpness control center
characteristic

CEN11

(Note P15)

YNRT00

-15

-8

-4

YNRF00

-3

-1

YNRT01

-20

-12

-8

YNRF01

-3

-1

YNRT10

-20

-13

-8

YNRF10

-2

-0.5

1.5

YNRT11

-25

-12

-8

YNR characteristic

YNRF11

(Note P16)

-2

SRT00

0.05

0.4

0.7

SRT01

0.5

SRT10

1.5

Control of SRT response to 2T pulse
input

SRT11

(Note P17)

3.5

VSM peak frequency

VSM

22.8

MHz

V000

-39

-35

V001

V010

5.5

6.5

7.5

V011

9.5

V100

12.5

13.8

V101

14.5

17.5

V110

15.5

16.8

18.5

VSM gain

V111

(Note P18)

17.5

18.6

19.5

SR49

0.62

0.72

0.85

SR50

0.62

0.72

0.85

Threshold voltage of VSM muting

SR51

Pins 49, 50 and 51

0.62

0.72

0.85

VM49A

100

VM49B

100

VM50A

100

VM50B

100

VM51A

100

Response time for VSM muting

VM51B

(Note P19)

100

0.58

0.65

0.75

VSM limit

(Note P20)

0.55

0.62

0.75

p-p

Delay time from Y input to R output

(Note P21)

120

144

YDLA

YDLB

Y delay time switch

YDLC

(Note P22)

AMIN

-5

-3.2

-2.0

BMIN

3.5

AMAX

0.3

1.0

1.7

Transfer distortion correction

BMA X

(Note P23)

-3.0

-1.5

-1.0

TA1316AN

2002-10-04

Characteristics

Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

CDE00

5.5

6.8

CDE01

5.5

6.8

CDE10

5.5

6.8

Color detail enhancer

CDE11

(Note P24)

5.5

6.8

YD00

4.4

5.5

6.6

YD01

2.9

3.7

4.5

YD10

11.6

14.5

17.4

Y detail frequency

YD11

MHz

YDMAX00

YDMAX01

YDMAX10

2.5

5.5

8.5

YDMAX11

YDCEN00

3.5

6.5

9.5

YDCEN01

YDCEN10

-2

0.8

YDCEN11

-1

YDMIN00

1.5

YDMIN01

YDMIN10

-8

-5

-2

Y detail control range

YDMIN11

(Note P25)

-18

-15

-12

WPL1

-10

-7

-4

WPL2

-7

-4.8

-2

APACON white peak limiter

WPL3

(Note P26)

-5

-2.3

-0.5

TA1316AN

2002-10-04

Color Difference 1/YUV Input and Matrix Block

Characteristics

Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

0.7

0.9

Color difference signal input dynamic
range

0.7

0.9

p-p

RMAX

RMIN

-37

-33

-29

BMAX

Color difference signal tint control
characteristic

BMIN

-36

-32

-28

Matrix fast SW threshold voltage

MSW

Pin 7

0.65

0.72

0.8

B00

3.6

4.5

5.4

B01

4.6

5.8

7.0

B10

6.8

8.5

10.2

R00

3.6

4.5

5.4

R01

4.6

5.8

7.0

Color SRT peak frequency

R10

6.8

8.5

10.2

MHz

B00CEN

B00MAX

B01CEN

B01MAX

B10CEN

B10MAX

R00CEN

R00MAX

R01CEN

R01MAX

R10CEN

Color SRT gain

R10MAX

(Note S01)

Delay time from Cb1 input to B output

104

130

156

Delay time from Cr1 input to R output

104

130

156

TA1316AN

2002-10-04

Characteristics

Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

BDY1

0.3

0.5

0.7

BDY2

0.7

1.0

1.3

BDY3

0.7

1.0

1.3

BBS1

0.2

0.4

0.6

BBS2

-1.0

-0.6

-0.5

BBS3

-3.6

-3.3

-3.0

RDY1

0.3

0.5

0.7

RDY2

1.4

1.6

1.8

RDY3

1.4

1.6

1.8

RBS1

0.1

0.3

0.5

RBS2

-1.2

-1.0

-0.8

Color difference signal amplitude
correction

RBS3

(Note S02)

-3.7

-3.3

-2.9

Y00

4.5

5.5

Y01

4.5

5.5

Y10

4.5

5.5

Y11

4.5

5.5

0.2

0.4

0.5

1.0

1.1

1.3

1.0

1.1

1.3

0.8

1.0

1.2

-1.6

-1.4

-1.2

YUV gain

(Note S03)

-3.4

-3.2

-3.0

TA1316AN

2002-10-04

Color Difference 2 Block

Characteristics

Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

Color difference signal contrast
adjustment characteristic

uCY

(Note A01)

15.5

17.0

18.5

cCY

3.6

4.6

5.6

Color adjustment characteristic

vcCY-

(Note A02)

-35

-25

-18

RMAX

109

111.5

114

RCNT

98.5

101

103.5

RMIN

BMAX

0.82

0.85

0.88

BCNT

0.68

0.71

0.74

R-Y relative phase and amplitude

BMIN

0.51

0.54

0.57

times

GMAX

253

256

259

GCNT

245

248

251

GMIN

229

232

235

BMAX

0.35

0.38

0.41

BCNT

0.30

0.33

0.36

G-Y relative phase and amplitude

BMIN

0.25

0.28

0.31

times

GHT

0.47

0.50

0.53

GHT

0.47

0.50

0.53

Color difference signal half-tone
characteristic

GHT

(Note A03)

0.47

0.50

0.53

times

0.09

0.23

0.37

0.26

0.40

0.54

0.44

0.58

0.72

p-p

Color

characteristic

(Note A04)

0.60

0.70

0.80

CLT

1.45

1.65

1.85

Color limiter characteristic

CLT

(Note A05)

1.80

2.00

2.20

p-p

High bright color gain

HBC

(Note A06)

0.02

0.04

0.06

times

TA1316AN

2002-10-04

Text Block

Characteristics

Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

3.39

3.80

4.28

3.39

3.80

4.28

AC gain

(Y1in~R/G/B out)

(Note T01)

3.39

3.80

4.28

times

G/R

0.94

1.00

1.06

AC gain axial difference

B/R

0.94

1.00

1.06

Frequency characteristic

(Y1in~R/G/B out)

Flat gain

(-3 dB point at 10 MHz)

MHz

fCb

14.5

Frequency characteristics

(Cb1/Cr1in~R/G/B out)

fCr

14.5

MHz

Unicolor adjustment characteristic

(Note T02)

15.5

16.5

17.5

brMAX

4.10

4.45

4.80

brCNT

3.05

3.40

3.75

Brightness adjustment characteristic

brMIN

(Note T03)

1.95

2.30

2.65

wps1

2.30

2.45

2.65

White peak slice level

wps2

(Note T04)

2.70

2.90

3.10

p-p

Black peak slice level

bps

(Note T05)

1.05

1.20

1.35

-55

-49

-55

-49

RGB output S/N

(Note T06)

-55

-49

HT1

0.45

0.50

0.55

Half-tone characteristic

HT2

(Note T07)

0.45

0.50

0.55

times

Half-tone ON voltage

Pin 52

0.65

0.85

1.05

0.30

0.80

1.30

0.30

0.80

1.30

Vertical blanking pulse output level

0.30

0.80

1.30

0.30

0.80

1.30

0.30

0.80

1.30

Horizontal blanking pulse output level

0.30

0.80

1.30

0.00

0.30

Blanking pulse delay time

OFF

(Note T08)

0.08

0.30

µs

2.1

2.6

3.1

Sub-contrast variable range

-4.0

-3.5

-3.0

CUT

0.42

0.47

0.52

Cutoff voltage variable range

CUT

0.42

0.47

0.52

TA1316AN

2002-10-04

Characteristics

Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

2.5

3.0

3.5

-5.5

-5.0

-4.5

2.5

3.0

3.5

-5.5

-5.0

-4.5

2.5

3.0

3.5

-5.5

-5.0

-4.5

2.5

3.0

3.5

-5.5

-5.0

-4.5

2.5

3.0

3.5

-5.5

-5.0

-4.5

2.5

3.0

3.5

-5.5

-5.0

-4.5

2.5

3.0

3.5

-5.5

-5.0

-4.5

2.5

3.0

3.5

Drive adjustment variable range

(Note T09)

-5.5

-5.0

-4.5

1.5

1.7

1.9

1.5

1.7

1.9

Output voltage at picture muting

1.5

1.7

1.9

P mute ON voltage

MUTE

Pin 52

1.90

2.15

2.40

1.0

1.2

1.4

1.0

1.2

1.4

Output voltage at blue back

1.1

1.25

1.4

p-p

Pin 53 input impedance

Zin

(Note T10)

ACL

-7.5

-5.5

-3.5

ACL characteristic

ACL

(Note T11)

-16.0 -14.5 -12.0

ABL

0.10

0.15

0.20

ABL

-0.01 0.04

0.09

ABL

-0.07 -0.02 0.03

ABL

-0.17 -0.12 -0.07

ABL

-0.27 -0.22 -0.17

ABL

-0.36 -0.31 -0.26

ABL

-0.44 -0.39 -0.34

ABL point

ABL

(Note T12)

-0.50 -0.45 -0.40

ABL

-0.06 -0.02 0.00

ABL

-0.17 -0.12 -0.07

ABL

-0.34 -0.29 -0.24

ABL

-0.52 -0.47 -0.42

ABL

-0.68 -0.63 -0.59

ABL

-0.85 -0.80 -0.75

ABL

-1.01 -0.96 -0.91

ABL gain

ABL

(Note T13)

-1.09 -1.04 -0.99

TA1316AN

2002-10-04

Characteristics

Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

43R

2.15

2.40

2.65

42R

0.30

0.80

1.30

41R

0.30

0.80

1.30

43G

0.30

0.80

1.30

42G

2.15

2.40

2.65

41G

0.30

0.80

1.30

43B

0.30

0.80

1.30

42B

0.30

0.80

1.30

RGB output mode

41B

(Note T14)

2.15

2.40

2.65

IRE

0.49

1.24

1.99

-1.67 -0.92 -0.17

Y-OUT

characteristic

(Note T15)

-4.59 -3.84 -3.09

Pmin

55.0

60.0

65.0

Pcnt

92.5

97.5

102.5

Pmax

107

112

117

IRE

Gmin

1.75

2.25

2.75

Gcnt

6.4

7.4

8.4

Blue stretch circuit characteristic

Gmax

(Note T16)

Forced blanking input threshold
voltage

BLKIN

Pin 52

5.50

6.00

6.50

ACBR

ACBG

ACBB

ACB1R

0.04

0.07

0.10

ACB1G

0.04

0.07

0.10

ACB1B

0.04

0.07

0.10

ACB2R

0.16

0.21

0.26

ACB2G

0.16

0.21

0.26

ACB2B

0.16

0.21

0.26

ACB3R

0.41

0.46

0.51

ACB3G

0.41

0.46

0.51

ACB pulse phase and amplitude

ACB3B

(Note T17)

0.41

0.46

0.51

p-p

0.73

0.93

1.13

0.73

0.93

1.13

IK input amplitude

(Note T18)

0.73

0.93

1.13

p-p

DIK

3.00

3.30

3.60

IK input cover range

DIK

(Note T19)

-0.50 -0.30 -0.10

TA1316AN

2002-10-04

Characteristics

Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

TXR

3.03

3.40

3.83

TXG

3.03

3.40

3.83

Analog RGB gain

TXB

(Note T20)

3.03

3.40

3.83

times

TXG/R

0.94

1.00

1.06

Analog RGB gain triaxial difference

TXB/R

0.94

1.00

1.06

TXR

TXG

Analog RGB frequency characteristic

TXB

-3dB

MHz

0.80

1.20

1.50

0.80

1.20

1.50

Analog RGB input dynamic range

0.80

1.20

1.50

p-p

TXV

WPSR

2.30

2.55

2.80

TXV

WPSG

2.30

2.55

2.80

Analog RGB white peak slice level

TXV

WPSB

(Note T21)

2.30

2.55

2.80

p-p

BPSR

1.05

1.20

1.35

BPSG

1.05

1.20

1.35

Analog RGB black peak limit level

BPSB

(Note T22)

1.05

1.20

1.35

uTXR

15.5

16.5

18.5

uTXG

15.5

16.5

18.5

RGB contrast adjustment
characteristic

uTXB

(Note T23)

15.5

16.5

18.5

brTXmax

3.0

3.2

3.4

brTXcnt

2.5

2.7

2.9

Analog RGB brightness adjustment
characteristic

brTXmin

(Note T24)

2.0

2.2

2.4

Analog RGB mode switch voltage

TXON

Pin 49

0.65

0.85

1.05

RYS

FYS

RYS

Analog RGB mode switching transfer
characteristic

RYS

(Note T25)

TXACL

-2.00 -1.00 -0.05

TXACL

-7.5

-5.5

-3.5

TXACL

-6.0

-4.0

-2.0

Text ACL characteristic

TXACL

(Note T26)

-17

-15

-13

OSDR

2.95

3.30

3.70

OSDG

2.95

3.30

3.70

Analog OSD gain

OSDB

(Note T27)

2.95

3.30

3.70

times

OSDG/R

0.94

1.00

1.06

Analog OSD gain triaxial difference

OSDB/R

0.94

1.00

1.06

TA1316AN

2002-10-04

Characteristics

Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

OSDR

OSDG

Analog OSD frequency characteristic

OSDB

-3dB

MHz

0.80

1.20

1.50

0.80

1.20

1.50

Analog OSD input dynamic range

0.80

1.20

1.50

p-p

OSDV

WPSR

2.45

2.70

2.95

OSDV

WPSG

2.45

2.70

2.95

Analog OSD input white peak slice
level

OSDV

WPSB

(Note T28)

2.45

2.70

2.95

p-p

OSDV

BPSR

1.30

1.45

1.60

OSDV

BPSG

1.30

1.45

1.60

Analog OSD input black peak limit
level

OSDV

BPSB

(Note T29)

1.30

1.45

1.60

UOSDR11

0.58

0.64

0.71

UOSDG11

0.58

0.64

0.71

UOSDB11

0.58

0.64

0.71

UOSDR10

0.47

0.53

0.59

UOSDG10

0.47

0.53

0.59

UOSDB10

0.47

0.53

0.59

UOSDR01

0.32

0.38

0.46

UOSDG01

0.32

0.38

0.46

UOSDB01

0.32

0.38

0.46

UOSDR00

0.21

0.23

0.25

UOSDG00

0.21

0.23

0.25

Analog OSD contrast adjustment
characteristic

UOSDB00

(Note T30)

0.21

0.23

0.25

p-p

brOSD0

2.20

2.40

2.60

brOSD1

2.05

2.25

2.45

brOSD2

1.95

2.15

2.35

Analog OSD brightness adjustment
characteristic

brOSD3

(Note T31)

1.80

2.00

2.20

OSDON1

Pin 51

2.05

2.30

2.55

Analog OSD mode switch voltage

OSDON2

Pin 50

2.05

2.30

2.55

TA1316AN

2002-10-04

Characteristics

Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

RYS1

FYS1

RYS1

RYS2

FYS2

RYS2

ROSD

FOSD

ROSD

Analog OSD mode switching transfer
characteristic

ROSD

(Note T32)

OSDACL

0.00

OSDACL

0.00

OSDACL

-8.0

-5.5

-3.0

OSD ACL characteristic

OSDACL

(Note T33)

-17

-15

-13

41TV

-7

-6

-5

42TV

-7

-6

-5

43TV

-7

-6

-5

41TV

-4

-3

-2

42TV

-4

-3

-2

43TV

-4

-3

-2

41TV

-55

-50

42TV

-55

-50

43TV

-55

-50

41OSD

-6.5

-5.5

-4.5

42OSD

-6.5

-5.5

-4.5

43OSD

-6.5

-5.5

-4.5

41OSD

-12.0 -10.5 -9.0

42OSD

-12.0 -10.5 -9.0

43OSD

-12.0 -10.5 -9.0

41OSD

-40

-30

42OSD

-40

-30

OSD blending characteristic

43OSD

(Note T34)

-40

-30

Crosstalk between inputs

-50

-40

TA1316AN

2002-10-04

Deflection Block

Parameter

Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

Sync input horizontal sync phase

(Note HA01)

0.55

0.65

0.75

µs

HD 1/2 input horizontal sync phase

1PH/2PH

(Note HA02)

0.58

0.68

0.78

µs

DUTY1

0.5

2.0

DUTY2

DUTY3

99.5

Polarity detection range

DUTY4

(Note HA03)

47.5

52.5

57.5

thS00

8.5

thS01

thS10

Sync input threshold amplitude

thS11

(Note HA04)

HD 1/2 input threshold voltage

thHD1/2

(Note HA05)

0.7

0.8

0.9

p-p

SFT

9.5

10.5

11.5

Horizontal picture phase adjustment
variable range

SFT

(Note HA06)

9.5

10.5

11.5

Curve correction amount

#23

(Note HA07)

2.9

3.4

3.9

3.1

3.8

4.5

2.0

2.5

3.0

4.7

5.0

5.3

0.7

1.5

1.9

2.4

2.9

4.7

5.0

5.3

3.2

4.2

5.2

2.2

2.7

3.2

Clamp pulse phase, width and level

(Note HA08)

4.7

5.0

5.3

HBP

S0a

4.3

6.3

8.9

HBP

S0b

4.3

6.3

8.9

HBP

2.2

2.5

2.8

HBP

S1a

1.5

3.5

5.9

HBP

S1b

1.5

3.5

5.9

HBP

2.2

2.5

2.8

HBP

s45a

6.0

8.5

11.5

HBP

s45b

6.0

8.5

11.5

Black peak detection pulse phase and
level

HBP

sv45

(Note HA09)

2.2

2.5

2.8

FBP threshold

thFBP

(Note HA10)

2.5

3.0

3.5

HVCO oscillation start voltage

VCO

Monitor pin 21

= V

3.5

4.0

4.5

H-OUT start voltage

HON

Monitor pin 26

= V

4.5

5.2

6.2

TA1316AN

2002-10-04

Parameter

Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

00A

01A

10A

00B

01B

44.5

46.5

48.5

H-OUT pulse duty

10B

(Note HB01)

F00

15.59

15.75

15.91

F01

31.19

31.5

31.82

F10

33.41

33.75

34.09

Horizontal free-running frequency

F11

(Note HB02)

44.52

45.0

45.48

kHz

F00

MIN

14.48

14.78

15.08

F00

MAX

16.37

16.70

17.03

F01

MIN

28.97

29.56

30.15

F01

MAX

32.72

33.39

34.06

F10

MIN

30.91

31.54

32.17

F10

MAX

34.91

35.62

36.33

F11

MIN

43.20

44.00

44.80

Horizontal oscillation frequency
variable range

F11

MAX

(Note HB03)

47.85

48.65

49.45

kHz

BH00

176

220

264

BH01

352

440

528

BH10

376

470

564

Horizontal oscillation control sensitivity

BH11

Hz/0.1 V (Note HB04)

520

650

780

V26

4.8

5.1

5.2

H-OUT output voltage

V26

(Note HB05)

0.1

0.3

V22

1.3

1.5

1.7

V22

4.3

4.5

4.7

Horizontal oscillation frequency pin (pin
22) control voltage threshold

V22

7.3

7.5

7.7

VDAC

TEST

= (00), DAC2 = (1)

8.5

9.0

DAC switching voltage

DAC2

VDAC

TEST

= (00), DAC2 = (0)

0.3

0.7

VP output pulse width

4.5

000

VPt0

1278

1281

1284

001

VPt1

846

849

852

010

VPt2

722

725

728

011

VPt3

657

660

663

100

VPt4

610

613

616

101

VPt5

360

363

366

Vertical free-running
(maximum pull-in range)

110

VPt6

(Note V01)

304

307

310

Vertical minimum pull-in range

VPULL

(Note V02)

TA1316AN

2002-10-04

Parameter

Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

VBPP

000

VBPP

1099.5 1100.5 1101.5

VBPP

001

VBPP

729.5

730.5

731.5

VBPP

49.5

50.5

51.5

010

VBPP

599.5

600.5

601.5

VBPP

49.5

50.5

51.5

011

VBPP

544.5

545.5

546.5

VBPP

100

VBPP

499.5

500.5

501.5

VBPP

101

VBPP

289.5

290.5

291.5

VBPP

Vertical black peak detection
pulse

110

VBPP

(Note V03)

239.5

240.5

241.5

BLKMIN

Vertical blanking stop phase

BLKMAX

(Note V04)

High

27VPH

4.6

5.0

5.4

VP output voltage

Low

27VPL

Pin 27 voltage

0.1

0.5

15.75 kHz

10.0

11.6

13.4

31.5 kHz

4.8

5.8

7.6

33.75 kHz

4.4

5.4

7.2

Delay time from SYNC input to VP
output

45 kHz

3.1

4.1

5.9

µs

TA1316AN

2002-10-04

Parameter

Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

CBLK1

000min

1087

1088

1089

000

CBLK1

000max

1117

1118

1119

CBLK1

001min

719

720

721

001

CBLK1

001max

749

750

751

CBLK1

010min

591

592

593

010

CBLK1

010max

621

622

623

CBLK1

011min

527

528

529

011

CBLK1

011max

557

558

559

CBLK1

100min

487

488

489

100

CBLK1

100max

517

518

519

CBLK1

101min

279

280

281

101

CBLK1

101max

309

310

311

CBLK1

110min

223

224

225

Compression BLK1

(start phase)

110

CBLK1

110max

253

254

255

CBLK2

000min

000

CBLK2

000max

CBLK2

001min

001

CBLK2

001max

CBLK2

010min

010

CBLK2

010max

CBLK2

011min

011

CBLK2

011max

CBLK2

100min

100

CBLK2

100max

CBLK2

101min

101

CBLK2

101max

CBLK2

110min

Compression BLK2

(stop phase)

110

CBLK2

110max

External vertical blanking insert
current

EXTBLK

Pin 27, current

520

625

780

µA

TA1316AN

2002-10-04

Test Conditions for Luminance

Common Test Conditions for Luminance

(1) SW4

= SW5 = B, SW7 = OPEN, SW8~SW10 = B, SW20 = ON, SW23 = B, SW33SW39 = A, SW54 = 54 = ON

(2) After sending bus control data with preset values, set ACB MODE to off (00) and SYNC INPUT-SW to sync input (10).
(3) Input sync signal [signal in sync with input signal used for testing, except for sweep signal] to pin 14 (SYNC IN). Set horizontal frequency to that of pin 14.
(4) Set pin 7 to open, Y/color difference signal input mode (YUV INPUT MODE) to Through (10), SYNC SEP-LEVEL to 20% (01) and vertical free-running frequency

to 307H (110).

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P01

Black detection level shift

OPEN (1) Connect external power supply (PS) to pin 3 and monitor pins 2 and 56.

(2) Set black stretch point 1 to off (000) and black detection level (BDL) to 0 IRE (1).

(3) Increase PS voltage from 4.95 V in 1-mV steps. When pin 2 picture period (High) goes Low, measure pin 56

DC differential V

(4) Set black detection level (BDL) to 3 IRE (0).

(5) Repeat step (3) above and measure pin 56 DC differential V

P02

Black stretch amplifier maximum gain

OPEN (1) Set SW2 to A (maximum gain) and input 500-kHz sine wave to TPA.

(2) Adjust signal amplitude to 0.1 V

p-p

using pin 3.

(3) Set black stretch point 1 to off (000) and measure pin 56 amplitude V

(4) Set black stretch point 1 to 001 (black stretch on) and measure pin 56 amplitude V

(5) Calculate GBS using the following formula.

GBS

= 20 × og (V

÷ V

) [dB]

, V

Pin 56 waveform

Pin 2 waveform

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P03

Black stretch start point 1

OPEN (1) Set SW2 to A (maximum gain) and black stretch start point 1 to off (000).

(2) Connect external power supply (PS) to pin 3, increase voltage from V

, and plot resulting pin 56 voltage

change S1. Define pin 56 voltages when V

and V

+ 0.7 V are applied as V

and V

100

(3) Set black stretch start point 1 to 001 (minimum), increase PS voltage from V

as in (2) above and plot

resulting pin 56 voltage change S2.

(4) Set black stretch start point 1 to maximum (111), repeat step (2) above and plot resulting pin 56 voltage

change S3.

(5) Determine S1 and S2 intersection V

BST1

and S1 and S3 intersection V

BST2

using the graph below. Calculate

BST1

and P

BST2

using the following formulae.

[V]

= V

100

[V]

- V

[V]

BST1

[(IRE)]

= [(V

BST1

[V]

- V

[V])

÷ V

]

× 100 (IRE)

BST2

[(IRE)]

= [(V

BST2

[V]

- V

[V])

÷ V

]

× 100 (IRE)

Pin 56

Pin 3

BST1

BST2

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P04

Black stretch start point 2

(1) Set black stretch start point 1 to off (000), picture mute to off (P-MODE: Normal1 (000)) and apply 0 V to #1.

Input TG7 linearity to TPA, adjust amplitude using pin 3 as shown below, set UNI-COLOR to center
(1000000), then measure pin 43 (R OUT) amplitude V

P43

(2) Set black stretch start point 1 to 001 (black stretch on), connect external power supply (PS) to pin 56 and

monitor pin 43 (R OUT).

(3) When black stretch start point 2 data is a minimum (00), determine black stretch start point differential

for PS

= V

(APL

= 0%) and for PS = V

+ 1.0 V (APL = 100%), as shown below. (Using oscilloscope,

adjust input waveform so that amplitude (gradient) is same as that of output waveform in VAR. Compare
waveforms and determine point where output waveform bends.)

(4) When black stretch start point 2 data is a maximum (11), determine black stretch start point differential

as in (3) above.

(5) Calculate using the following formulae.

BS1

= (V

P43

)

× 100

BS2

= (V

P43

)

× 100

APL 0%

Pin 3 waveform (linear)

0.7 V

p-p

0.3 V

p-p

***

Pin 43 (R OUT)

APL 100%

LINEARITY

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P05

Dynamic ABL detection voltage

OPEN (1) Set ABL GAIN to minimum (000), DYNAMIC ABL GAIN to maximum (111) and black stretch point 1 to off

(000).

(2) Connect external power supply (PS) to pin 53 and decrease voltage from 6.5 V.

(3) When DYNAMIC ABL POINT bus data is 000, 001, 110 and 100, repeat step (2) above. When pin 56 picture

period goes Low, measure PS voltages V

000

, V

001

, V

010

and V

100

(4) Determine voltage differential between V

000

and V

001

), between V

000

and V

010

(

010

)

and between

000

and V

100

(

100

***

= V

000

- V

001

010

, V

100

)

Pin 2 waveform

Pin 56 detected

Pin 56 undetected

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P08

Dynamic Y

correction point

OPEN (1)

Connect external power supply (PS1) to pin 3 and (PS2) to TP1. Set PS2 to 0 V.

(2) Set dynamic Y

point switch (DYNC-POINT) to 19 IRE (00), dynamic Y gain VS dark area (DYNC GAIN

VS DARK AREA) to off (000) and dynamic Y

dark area gain to off (00).

(3) When PS1 is increased from V

to V

+ 0.7 V, set V

to 0 V and plot voltage change in pin 56. (V

is pin

voltage of pin 3.)

(4) Set DYNC

GAIN VS DARK AREA to maximum (111), static Y dark area gain (STATIC-GAIN) to maximum

(11) and PS2 to 1 V.

(5) As in step (3) above, increase PS1 from V

to V

+ 0.7 V and plot pin 56 voltage change.

(6) Set DYNC

-POINT to 21 IRE (01), 25 IRE (10) and 30 IRE (11), increase PS1 from V

to V

+ 0.7 V and plot

pin 56 voltage change.

(7) Determine dynamic Y

point when DYNC-POINT is set to 19 IRE (00) as V

DGP00

using the graph below.

Also determine dynamic Y

point when DYNC-POINT is set to 21 IRE (01) as V

DGP01

; to 25 IRE (10) as

DGP10

; to 30 IRE (10) as V

DGP11

(8) Using V

DGP01

, V

DGP10

, and V

DGP11

thus determined, calculate P

DGP00

, P

DGP01

, P

DGP10

and P

DGP11

using the following formulae.

PDGP

= (V

DGP00

/0.7)

× 100

PDGPA

= PDGP

- PDGP

PDGP

= (V

DGP01

/0.7)

× 100

PDGPB

= PDGP

- PDGP

PDGP

= (V

DGP10

/0.7)

× 100

PDGPC

= PDGP

- PDGP

PDGP

= (V

DGP11

/0.7)

× 100

OFF

Pin 56 voltage [V]

Pin 3 voltage

VDGP

***

100 IRE

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P09

Dynamic Y

gain

OPEN (1) Connect external power supply (PS1) to pin 3 and (PS2) to TP1. Set PS2 to 0 V.

(2) Set DYNC

-POINT to 30 IRE (11), DYNC GAIN VS DARK AREA to off (000) and STATIC-GAIN to off (00).

(3) Set PS1 to V

and determine pin 56 voltage V

DGOFF1

(4) Set PS1 to V

+ 0.16 V and determine pin 56 voltage V

DGOFF2

(5) Set DYNC

GAIN VS DARK AREA to maximum (111), PS2 to 1 V and determine pin 56 voltage V

GDON

(6) Calculate G

using the following formula.

= 20 × og (V

DGON

- V

DGOFF1

DGOFF2

- V

DGOFF1

)

P10

Static Y

dark area gain

OPEN (1) Connect external power supply (PS1) to pin 3 and (PS2) to TP1. Set PS2 to 0 V.

(2) Set DYNC

-POINT to 30 IRE (11), DYNC GAIN VS DARK AREA to off (000) and STATIC-GAIN to off (00).

(3) Set PS1 to V

and determine pin 56 voltage V

SGOFF1

(4) Set PS1 to V

+ 0.16 V and determine pin 56 voltage V

SGOFF2

(5) Set STATIC

GAIN to maximum (11) and determine pin 56 voltage V

SGON

(6) Calculate G

using the following formula.

= 20 × og (V

SGON

- V

SGOFF1

SGOFF2

- V

SGOFF1

)

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P11

DC restoration gain

(1) Set picture mute to off (P-MODE: Normal1 (000)), DC restoration start point to minimum (000) and DC

restoration limit point (DC REST LIMIT) to 100% (11) and connect external power supply PS1 to pin 3.

(2) Measure DC level of pin 43 picture period. When use PS1 at V

as reference, Set PS1 to V

+ 0.7 V and

adjust DC level to 0.7 V using UNI-COLOR.

(3) Set DC REST RATE to minimum (000) and measure V

DT1

and V

DT2

when pin 3 is at V

and at V

+ 0.1 V

(see figure below).

(4) Measure V

DT3

when pin 3 is at V

+ 0.1 V. Set DC REST RATE to maximum (111) and measure V

DT3

(5) Set DC restoration rate switch (DCRR-SW) to 100% or less (1) and pin 3 to V

+ 0.1 V, and measure V

DT4

Set DC REST RATE to maximum (111) and measure V

DT4

(6) Calculate ADT

100

, ADT

135

and ADT

using the following formulae.

ADT

100

= (V

DT2

[V]

- V

DT1

[V])

÷ 0.1 [V]

ADT

135

= (V

DT3

[V]

- V

DT1

[V])

÷ 0.1 [V]

ADT

= 1 - {(V

DT2

[V]

- V

DT4

[V])

÷ 0.1 [V]}

Picture period

DT1

[V]

DT2

DT3

DT4

+ 0.1 V

Pin 43 waveform

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P12

DC restoration start point

(1) Set picture mute to off (P-MODE: Normal1 (000)), DC restoration start point to minimum (000) and DC REST

LIMIT to 100% (11), and connect external power supply PS1 to pin 3.

(2) Measure DC level of pin 43 picture period. Use PS1 at V

as reference. When PS1 is set to V

+ 0.7 V, adjust

DC level to

+1.0 V using UNI-COLOR.

(3) Set DC REST RATE to minimum (000), increase PS1 from V

and plot voltage relationship between pin 56

(DC voltage) and pin 43 (picture period voltage).

(4) Set DC REST RATE to maximum (111), increase PS1 from V

and plot voltage relationship between pins 56

and 43.

(5) Set DC REST RATE to maximum (111), DC restoration start point to maximum (111), increase PS1 from V

and plot voltage relationship between pins 56 and 43.

(6) Calculate V

DT0

and V

DT1

using the following formulae.

DT0

= [(V

SP0

- V

)/1 V]

× 100%

DT1

= [(V

SP1

- V

)/1 V]

× 100%

DC restoration rate: 000

DC restoration start point: 111

DC restoration start point: 000

Pin 56

SP1

SP0

Pin 43

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P13

DC restoration limit point

(1) Set picture mute to off (P-MODE: Normal1 (000)), UNI-COLOR to maximum (1111111) and DC restoration

start point to minimum (000), and connect external power supply PS to pin 56.

(2) Set DC REST RATE to maximum (111).

(3) Increase PS from 5 V, monitor pin 43 and plot DC restoration.

(4) Change DC REST LIMIT and repeat step (3) above. Determine V

L11

, V

L10

, V

L01

and V

L00

using the graph

below. Calculate P

DTL11

, P

DTL10

, P

DTL01

and P

DTL00

using the following formulae.

DTL11

= [(V

L11

- V

)/1.0]

× 100%

DTL10

= [(V

L10

- V

)/1.0]

× 100%

DTL01

= [(V

L01

- V

)/1.0]

× 100%

DTL00

= [(V

L00

- V

)/1.0]

× 100%

100% (00)

87% (01)

73% (10)

60% (11)

L01

L00

L10

L11

Pin 56

Pin 43

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P14

Sharpness control range

(1) Input sine wave (frequency variable) to TPA.

(2) Set pin 3 amplitude to 20 mV

P-P

(3) Set UNI-COLOR to maximum (1111111), SHR-TRACKING to SRT-GAIN minimum (11), APACON peak

frequency (APACON PEAK f

) to 15 M (00) and color detail enhancer (CDE) to center (10).

(4) Set picture mute to off (P-MODE: Normal1 (000)) and monitor pin 43.

(5) Set picture sharpness (PICTURE-SHARPNESS) to center (1000000) and measure amplitude V

100

when

input frequency is 100 kHz.

(6) Set PICTURE-SHARPNESS to maximum (1111111) and measure amplitude V

MAX00

when input frequency is

AP00

. Calculate G

MAX00

using the following formula.

(7) Set PICTURE-SHARPNESS to minimum (0000000) and measure amplitude V

MIN00

when input frequency is

AP00

. Calculate G

MIN00

using the following formula.

(8) Set APACON PEAK f

to 8.8 M (01) and measure amplitudes V

MAX01

and V

MIN01

as in steps (6) and (7)

when input frequency is F

AP01

. Calculate G

MAX01

and G

MIN01

using the following formulae.

(9) Set APACON PEAK f

to 7.5 M (10) and measure amplitudes V

MAX10

and V

MIN10

as in steps (6) and (7)

when input frequency is F

AP10

. Calculate G

MAX10

and G

MIN10

using the following formulae.

(10) Set APACON PEAK f

to 5 M (11) and measure amplitudes V

MAX11

and V

MIN11

as in steps (6) and (7) when

input frequency is F

AP11

. Calculate G

MAX11

and G

MIN11

using the following formulae.

MAX

***

= 20 × og (V

MAX

***

÷ V

100

) [dB]

MIN

***

= 20 × og (V

MIN

***

÷ V

100

) [dB]

*: When using a spectrum analyzer for monitoring, measure gain for low frequency.

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P15

Sharpness control center
characteristic

(1) Input sine wave (frequency variable) to TPA.

(2) Set pin 3 amplitude to 20 mV

P-P

(3) Set UNI-COLOR to maximum (1111111), SHR-TRACKING to SRT-GAIN minimum (11), APACON peak

frequency (APACON PEAK f

) to 15 M (00) and color detail enhancer (CDE) to center (10).

(4) Set picture mute to off (P-MODE: Normal1 (000)) and monitor pin 43.

(5) Set PICTURE-SHARPNESS to center (1000000) and measure amplitude V

100

when input frequency is 100

kHz.

(6) Measure pin 43 amplitude V

CEN00

when input frequency is F

AP00

with PICTURE-SHARPNESS set to center

(1000000). Calculate G

CEN00

using the following formula.

(7) Set APACON PEAK f

to 8.8 M (01) and measure amplitude V

CEN01

as in step (6) when input frequency is

AP01

. Calculate G

CEN01

using the following formula.

(8) Set APACON PEAK f

to 7.5 M (10) and measure amplitude V

CEN10

as in step (6) when input frequency is

AP10

. Calculate G

CEN10

using the following formula.

(9) Set APACON PEAK f

to 5 M (11) and measure amplitudes V

CEN11

as in step (6) when input frequency is

AP11

. Calculate G

CEN11

using the following formula.

CEN

***

= 20 × og (V

CEN

***

÷ V

100

) [dB]

*: When using a spectrum analyzer for monitoring, measure gain for low frequency.

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P16

YNR characteristic

(1) Input sine wave (frequency variable) to TPA.

(2) Set pin 3 amplitude to 20 mV

P-P

(3) Set UNI-COLOR to maximum (1111111), SHR-TRACKING to SRT-GAIN minimum (11), APACON peak

frequency (APACON PEAK f

) to 15 M (00) and color detail enhancer (CDE) to center (10).

(4) Set picture mute to off (P-MODE: Normal1 (000)) and monitor pin 43.

(5) Set PICTURE-SHARPNESS to center (1000000) and measure amplitude V

100

when input frequency is 100

kHz.

(6) Set YNR to on (1) and PICTURE-SHARPNESS to minimum (0000000). Measure pin 43 amplitude V

TRAP00

when input frequency is F

AP00

and calculate G

YNRT00

using the following formula.

(7) When PICTURE-SHARPNESS is set to 0000011 and measure pin 43 amplitude V

FLAT00

. Calculate

YNRF00

using the following formula.

(8) Set APACON PEAK f

to 8.8 M (01) and measure amplitude V

TRAP01

as in step (7) when input frequency is

AP01

. Calculate G

TRAP01

using the following formula.

(9) Set APACON PEAK f

to 7.5 M (10) and measure amplitude V

TRAP10

as in step (7) when input frequency is

AP10

. Calculate G

TRAP10

using the following formula.

(10) Set APACON PEAK f

to 5 M (11) and measure amplitude V

TRAP11

as in step (7) when input frequency is

AP11

. Calculate G

TRAP11

using the following formula.

YNRT

= 20 × og (V

TRAP

100

)

[dB]

YNRF

= 20 × og (V

FLAT

100

)

[dB]

*: When using a spectrum analyzer for monitoring, measure gain for low frequency.

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P17

Control of SRT response to 2T pulse
input

(1) Input 2T pulse (0.7 V

P-P

) signal to TPA and set picture mute to off (P-MODE: Normal1 (000)), UNI-COLOR to

maximum (1111111), and SHR-TRACKING to SRT-GAIN minimum (11), CDE to center (10) and
PICTURE-SHARPNESS to center (1000000).

(2) Set APACON frequency to 15 M (00) and monitor pin 43.

(3) Measure T

SRTMIN00

and V

SRTMIN00

as shown in the figure below.

(4) Set SHR-TRACKING to SRT-GAIN maximum (00) and measure T

SRTMAX00

and V

SRTMAX00

(5) Set APACON frequency to 8.8 M (01), SHR-TRACKING to SRT-GAIN minimum (11) and maximum (00) as in

step (4) above, and measure T

SRTMIN01

, V

SRTMIN01

, T

SRTMAX01

and V

SRTMAX01

(6) Set APACON frequency to 7.5 M (10), SHR-TRACKING to SRT-GAIN minimum (11) and maximum (00) as in

step (4) above, and measure T

SRTMIN10

, V

SRTMIN10

, T

SRTMAX10

and V

SRTMAX10

(7) Set APACON frequency to 5 M (11), SHR-TRACKING to SRT-GAIN minimum (11) and maximum (00) as in

step (4) above, and measure T

SRTMIN11

, V

SRTMIN11

, T

SRTMAX11

and V

SRTMAX11

(8) Calculate using the following formulae.

SRT00

= 20 × og [((V

SRTMAX00

)/(V

SRTMIN00

)]

SRT01

= 20 × og [(V

SRTMAX01

)/(V

SRTMIN01

)]

SRT10

= 20 × og [(V

SRTMAX10

)/(V

SRTMIN10

)]

SRT11

= 20 × og [(V

SRTMAX11

)/(V

SRTMIN11

)]

20%

100%

***

20%

***

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P18

VSM gain

(1) Input sine wave of frequency F

VSM2

to TPA.

(2) Set picture mute to off (P-MODE: Normal1 (000)), and pin 3 amplitude to 0.02 V

P-P

(3) Vary VSM GAIN from off (000) to maximum (111) and measure pin 54 amplitudes V

001

, V

010

, V

011

, V

100

101

, V

110

and V

111

. Set input amplitude to 0.7 V

P-P

and measure pin 54 amplitude V

000

when VSM GAIN is

OFF (000).

(4) Calculate using the following formulae.

V000

= 20

× og (V

000

/0.7) [dB]

V001

= 20

× og (V

001

/0.02) [dB]

V010

= 20

× og (V

010

/0.02) [dB]

V011

= 20

× og (V

011

/0.02) [dB]

V100

= 20

× og (V

100

/0.02) [dB]

V101

= 20

× og (V

101

/0.02) [dB]

V110

= 20

× og (V

110

/0.02) [dB]

V111

= 20

× og (V

111

/0.02) [dB]

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P19

Response time for VSM fast muting

(1) Input sine wave of frequency F

VSM

to TPA.

(2) Set picture mute to off (P-MODE: Normal1 (000)), VSM GAIN to 100 and pin 3 amplitude to 0.1 V

P-P

. Monitor

pin 54.

(3) Input pulse as shown below to pin 49 and determine response times T

VM49A

and T

VM49B

(4) Likewise input pulse to pin 50 and determine response times T

VM50A

and T

VM50B

(5) Likewise input pulse to pin 51 and determine response times T

VM51A

and T

VM51B

Square wave (50 kHz, 2 V

P-P

)

Pin 54
waveform

VM49A

VM49B

0 V

2 V

Pin 49
waveform

SR49

[V]

Mute period

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P22

Y delay time change

(1)

Set picture mute to off (P-MODE: Normal1, 000), UNI-COLOR to maximum (1111111) and SHR-TRACKING
to SRT-GAIN minimum (11), and input T2 pulse signal (approx. 0.7 Vp-p) to TPA.

(2) Set picture sharpness to center (1000000).

(3) Monitor pin 3 and pin 43, and determine the time difference YDL00 for each signal at the 50% point as shown

below.

(4) Set Y/C-DL1 to

+5 ns (1) and determine YDL01.

(5) Set Y/C-DL1 to

+0 ns (0) and Y/C-DL2 to +10 ns (1), and determine YDL10.

(6) Set Y/C-DL1 to

+5 ns (1) and Y/C-DL2 to +10 ns (1), and determine YDL11.

(7) Determine YDLA, YDLB and YDLC as follows:

YDLA

= YDL01 - YDL00

YDLB

= YDL10 - YDL00

YDLC

= YDL11 - YDL00

T2 pulse signal

approx. 0.7 Vp-p

50%

YDL00

#43

YDL01

YDL10

YDL11

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P23

Transfer distortion correction

(1) Input multi-burst signal (frequency equivalent to 4.2 MHz) of signal A to TPA. Set picture mute to off

(P-MODE: Normal1 (000)), UNI-COLOR to maximum (1111111), SHR-TRACKING to SRT-GAIN minimum
(11) and CDE to minimum (00).

(2) Set PICTURE-SHARPNESS to

flat (near DEC[24]), APACON
PEAK f

to 5 M (11) and monitor

pin 43.

(3) Input sine wave signal A (approx.

4.2 MHz) becomes signal B on
pin 43 as shown at right.
Determine S

and S

(4) When Y-GROUP DELAY

CORRECTION is set to minimum
(0000), signal A becomes signal
C on pin 43. Determine S

AMIN

and S

BMIN

(5) When Y-GROUP DELAY

CORRECTION is set to
maximum (1111), signal A
becomes signal D on pin 43.
Determine S

AMAX

and S

BMAX

(6) Calculate using the following formulae.

AMIN

= 20 × og (S

AMIN

) [dB]

BMIN

= 20 × og (S

BMIN

) [dB]

AMAX

= 20 × og (S

AMAX

) [dB]

BMAX

= 20 × og (S

BMAX

) [dB]

Note: The input sine wave starts and ends within the picture period. It is like a burst signal, not a continuous wave.

Signal

AMIN

BMIN

AMAX

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P24

Color detail enhancer

(1) Set picture mute to off (P-MODE: Normal1 (000)), UNI-COLOR to maximum (1111111), SHR-TRACKING to

SRT-GAIN minimum (11), COLOR to center (1000000), color limiter level (CLT) to 2 Vp (1) and C-SRT-FREQ
to 4.5 M (10). Input SWEEP signal to TPA and set pin 3 amplitude to 20 mV

P-P

. Set SW4 to A. Input signal

(pin 4 amplitude: 0.2 V

P-P

) to TP4 as shown in the figure below.

(2) Set PICTURE-SHARPNESS to center (1000000) and Y DETAIL CONTROL to center (10000), and monitor

pin 41 using a spectrum analyzer.

(3) Set low-frequency area to 0dB when CDE is set to minimum (00) and measure peak level G

CDEMIN

(4) Set low-frequency area to 0dB when CDE is set to maximum (11) and measure peak level G

CDEMAX

(5) Calculate using the following formula.

CDE00

= G

CDEMAX00

- G

CDEMIN00

(6) Set APACON PEAK f

to 15 M (00), 8.8 M (01), 7.5 M (10) and 5 M (11), and measure peak levels G

CDE00

CDE01

, G

CDE10

and G

CDE11

max

Output gain [dB]

Input frequency [MHz]

0 dB

Picture period

BLK period

0.2 V

p-p

min

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P25

Y detail control range

(1) Set picture mute to off (P-MODE: Normal1 (000)), UNI-COLOR to maximum (1111111), SHR-TRACKING to

SRT-GAIN minimum (11) and CDE to center (10). Input SWEEP signal to TPA.

(2) Set pin 3 amplitude to 20 mV

P-P

(3) Set PICTURE-SHARPNESS to minimum (0000000) and Y DETAIL CONTROL to maximum (11111), and

monitor pin 43 using a spectrum analyzer.

(4) Set low-frequency area to 0dB. Set APACON PEAK f

to 15 M (00), 8.8 M (01), 7.5 M (10) and 5 M (11), and

measure peak levels G

YDMAX00

, G

YDMAX01

, G

YNMAX10

and G

YDMAX11

(5) Set Y DETAIL CONTROL to center (10000) and measure peak levels G

YDCEN00

, G

YDCEN01

, G

YDCEN10

and

YDCEN11

(6) Set Y DETAIL CONTROL to minimum (00000) and measure peak levels G

YDMIN00

, G

YDMIN01

, G

YNDIN10

and G

YDMIN11

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW1

SW2

SW3

SW56

Test Method (test conditions: V

= 9 V/2 V, Ta

= 25° ± 3°C)

P26

APACON white peak limiter

(1) Set picture mute to off (P-MODE: Normal1 (000)), UNI-COLOR to 1101000, SHR-TRACKING to SRT-GAIN

maximum (00) and CDE to maximum (11). Input T pulse signal (0.7 V

P-P

) to TPA.

(2) Set PICTURE-SHARPNESS to maximum (111111) and APACON PEAK f

to 5 M (11), and monitor pin 43.

(3) When APACON white peak limiter is off (000), measure positive spike amplitude V

WPLOFF1

(4) When APACON white peak limiter is at maximum (111), measure positive spike amplitude V

WPLMAX1

(5) Set UNI-COLOR to center (1000000). When APACON white peak limiter is off (000) and at maximum (111),

measure positive spike amplitudes V

WPLOFF2

and V

WPLMAX2

(6) Set UNI-COLOR to minimum (0000000). When APACON white peak limiter is off (000) and at maximum

(111), measure positive spike amplitudes V

WPLOFF3

and V

WPLMAX3

(7) Calculate using the following formulae.

WPL1

= 20 × og (V

WPLMAX1

WPLOFF1

) [dB]

WPL2

= 20 × og (V

WPLMAX2

WPLOFF2

) [dB]

WPL3

= 20 × og (V

WPLMAX3

WPLOFF3

) [dB]

WPLOFF

WPLMAX

TA1316AN

2002-10-04

Test Conditions for Color Difference Signal 1/YUV Input and Matrix

Common Test Conditions for Color Difference Signal 1/YUV Input and Matrix

(1) SW1

= B, SW2 = B, SW20 = ON, SW33SW39 = A, SW54 = OPEN, SW56 = OPEN

(2) Send BUS control data with preset values.
(3) Set ACB MODE to off (0) and high bright color (HI BRT) to off (0).
(4) Input sync signal [signal in sync with input signal for testing, except for SWEEP signal] to pin 14 (SYNC IN) and set SYNC-INPUT to (10).

Test Conditions

SW mode

Note No.

Parameter

SW3

SW4

SW5

SW7

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

OPEN

SW8

SW9

SW10

S01

Color SRT gain

(1) Set Y mute to on (P-MODE: Y-MUTE (001)), YUV INPUT MODE to Through (10), BRIGHTNESS to center

(10000000), COLOR to center (1000000) and UNI-COLOR to maximum (1111111).

(2) Input 2T pulse signal to TP4 and set pin 4 amplitude to 350 mV

P-P

(3) Monitor pin 41 output waveform. When C-SRT-FREQ is 5 MHz (00), measure edge gradients SB00MIN,

SB00CEN and SB00MAX when COLOR SRT GAIN is at minimum (000), center (100) and maximum (111) as
in shown in the figure below. Set SB00MIN to 0 dB, determine GS

B00CEN

= 20 × og (SB00CEN/SB00MIN)

and GS

B00MAX

= 20 × og (SB00MAX/SB00MIN).

(4) Repeat step (3) above, setting C-SRT-FREQ to 6.7 MHz (01) and 10 MHz (10), and measure edge gradients

when COLOR SRT GAIN is at minimum (000), center (100) and maximum (111). Determine GS

B01CEN

B10CEN

, GS

B01MAX

and GS

B10MAX

(5) Input 2T pulse signal to TP5 and set pin 5 amplitude to 350 mV

P-P

(6) Monitor pin 43 output waveform. When C-SRT-FREQ is 5 MHz (00), measure edge gradients SR00MIN,

SR00CEN and SR00MAX when COLOR SRT GAIN is at minimum (000), center (100) and maximum (111) as
shown in the figure below. Set SR00MIN to 0dB, determine GS

R00CEN

= 20 × og (SR00CEN/SR00MIN)

and GS

R00MAX

= 20 × og (SR00MAX/SR00MIN).

(7) Repeat step (3) above,

setting C-SRT-FREQ to
6.7 MHz (01) and 10
MHz (10), and measure
edge gradients when
COLOR SRT GAIN is at
minimum (000), center
(100) and maximum
(111). Determine
GS

R01CEN

, GS

R10CEN

R01MAX

and

R10MAX

10%

100%

***

10%

***

Gradient S

*** = V***/T***

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW3

SW4

SW5

SW7

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

OPEN

SW8

SW9

SW10 SW56

S02

Color difference signal amplitude
correction

OPEN

(1) Input 100-kHz sine wave to TP4 and set pin 4 amplitude to 0.2 V

P-P

(2) Set Y mute to OFF (P-MODE: Normal1 (000)), YUV INPUT MODE to Through (10), BRIGHTNESS to center

(10000000), COLOR to center (1000000), UNI-COLOR to maximum (1111111), Y/C GAIN COMP1 to
minimum (00), Y/C GAIN COMP2 to minimum (00), black stretch point 1 to off (000), dynamic Y

point to 30

IRE (11) and SW1 to A. Apply 0 V to TP1 using external power supply PS1 and 5.16 V to pin 3 using PS2.

(3) Monitor pin 41 output waveform and measure amplitude VBDY0.

(4) Set Y/C GAIN COMP1 to maximum (11) and measure pin 41 amplitude VBDY1.

(5) Set DYNC

GAIN VS DARK AREA to maximum (111), STATIC-GAIN to maximum (11) and external power

supply PS1 to 1 V, and measure pin 41 amplitude VBDY2.

(6) Set Y/C GAIN COMP2 to maximum (11) and measure pin 41 amplitude VBDY3.

(7) Set Y/C GAIN COMP1 to minimum (00), Y/C GAIN COMP2 to minimum (00), DYNC

GAIN VS DARK AREA

to minimum (000), STATIC

-GAIN to minimum (00), PS1 to 0 V, PS2 to 5 V and SW2 to A. Measure pin 41

amplitude VBBS0.

(8) Set Y/C GAIN COMP1 to maximum (11) and measure pin 41 amplitude VBBS1.

(9) Set black stretch point 1 to maximum (111) and measure pin 41 amplitude VBBS2.

(10) Set Y/C GAIN COMP2 to maximum (11) and measure pin 41 amplitude VBBS3.

(11) Calculate using the following formulae.

BDY1

= 20 × og (VBDY1/VBDY0) GC

BDY2

= 20 × og (VBDY2/VBDY0)

BDY3

= 20 × og (VBDY3/VBDY0) GC

BBS1

= 20 × og (VBBS1/VBBS0)

BBS2

= 20 × og (VBBS2/VBBS0) GC

BBS3

= 20 × og (VBBS3/VBBS0)

(12) Input 100-kHz sine wave to TP5, set pin 5 amplitude to 0.2 V

P-P

, repeat steps (2) to (11) above and

determine GC

RDY1

, GC

RDY2

, GC

RDY3

, GC

RSB1

, GC

RSB2

and GC

RSB3

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW3

SW4

SW5

SW7

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

A/C

A/B

OPEN

SW8

SW9

SW10

S03

YUV gain

(1) Set picture mute to off (P-MODE: Normal1 (000)), BRIGHTNESS to maximum (11111111), COLOR to center

(1000000) and UNI-COLOR to maximum (1111111).

(2) Set SW3 to A, and SW4 and SW5 to B; input a 100-kHz sine wave to TPA and set pin 3 amplitude to 0.2

P-P

(3) Set SW56 to open, YUV INPUT MODE to Y/Cb/Cr (00), Y/Pb/Pr (01), Through (10) and Y/U/V (11). Measure

pin 56 amplitudes, VY00, VY01, VY10 and VY11.

(4) Set SW3 to C, and SW4 to A and SW5 to B, input 100-kHz sine wave to TP4 and set pin 4 amplitude to 0.2

P-P

(5) Set YUV INPUT MODE to Y/Cb/Cr (00), Y/Pb/Pr (01), Through (10) and Y/U/V (11). Measure pin 41

amplitudes VB00, VB01, VB10 and VB11.

(6) Set SW3 to C, and SW4 and SW5 to A; input a 100-kHz sine wave to TP5 and set pin 5 amplitude to 0.2

P-P

(7) Set YUV INPUT MODE to Y/Cb/Cr (00), Y/Pb/Pr (01), Through (10) and Y/U/V (11). Measure pin 43

amplitudes VR00, VR01, VR10 and VR11.

(8) Calculate using the following formulae.

Y00

= 20 × og (VY00/0.2) G

Y01

= 20 × og (VY01/0.2)

Y10

= 20 × og (VY10/0.2) G

Y11

= 20 × og (VY11/0.2)

= 20 × og (VB01/VB00) G

= 20 × og (VB10/VB00)

= 20 × og (VB11/VB00)

= 20 × og (VR01/VR00) G

= 20 × og (VR10/VR00)

= 20 × og (VR11/VR00)

TA1316AN

2002-10-04

Test Conditions for Color Difference Signal 2

Test Conditions

SW mode

Note No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

A01

Color difference signal
contrast adjustment
characteristic

(1) Set BRIGHTNESS to maximum and sub-address (12) data to F0.

(2) Input signal 3 (f

= 100 kHz, picture period amplitude = 0.23 V

P-P

) to pin 5.

(3) Vary UNI-COLOR to maximum (7F), center (40) and minimum (00) and

measure pin 43 picture period amplitudes V

uCYMAX

, V

uCYCNT

and V

uCYMIN

(4) Determine in decibels amplitude ratio

uCY

of UNI-COLOR maximum to

minimum.

(5) Repeat steps (2) and (4) changing input to pin 4 (picture period amplitude

= 0.2

P-P

), and measure pin 41 output.

A02

Color adjustment
characteristic

(1) Set BRIGHTNESS to maximum and sub-address (12) data to F0.

(2) Input signal 3 (f

= 100 kHz, picture period amplitude = 0.115 V

P-P

) to pin 5.

(3) Vary COLOR to maximum (7F), center (40) and minimum (01), and measure

pin 43 picture period amplitudes V

CCYMAX

, V

CCYCNT

and V

CCYMIN

(4) Determine in decibels amplitude ratio

CCY

of maximum and minimum to

COLOR center.

(5) Repeat steps (2) and (4), changing input to pin 4 (picture period amplitude

= 0.1

P-P

), and measure pin 41 output.

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

A03

Color difference signal
half-tone characteristic

(1) Input signal 3 (f

= 100 kHz, picture period amplitude = 0.2 V

P-P

) to pin 5.

(2) Measure pin 43 output picture period amplitude vHTARY.

(3) Apply 1.5 V to pin 52 from external power supply.

(4) Measure pin 43 output picture period amplitude vHTBRY.

(5) Determine GHT

= vHTBRY/vHTARY.

(6) Repeat steps (1) to (5) above, changing pin to pin 42, and determine GHT

vHTBGY/vHTAGY.

(7) Input signal to pin 4, measure pin 4 and determine GHT

= vHTBBY/vHTABY.

TA1316AN

2002-10-04

Test Conditions

SW mode

Note No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

A05

Color limiter
characteristic

(1) Input signal 2 (picture period amplitude

= 0.4 V

P-P

) to pin 4.

(2) When sub-address (14) data is 00 and 01, measure pin 43 output signal picture

period amplitudes C

LT0

and C

LT1

A06

High bright color gain

(1) Input signal 2 (picture period amplitude

= 0.2 V

P-P

) to pin 4.

(2) Adjust COLOR and set pin 41 output picture period amplitude to 1.2 V

P-P

(3) When sub-address (0B) data is 80, measure pin 41 output signal picture period

amplitude V

(4) Calculate using the following formula. HBC

= (1.2 - v

)/1.2

TA1316AN

2002-10-04

Test Conditions for Text

Common Test Conditions for Text

(1) Unless otherwise specified, measure bus data using preset values.
(2) Set the following data:

Sub-address (00) to data (02)
Sub-address (05) to data (7F)
Sub-address (09) to data (40)
Sub-address (0B) to data (7F)
Sub-address (0C) to data (82)
Sub-address (12) to data (F0)
Sub-address (19) to data (F8)
Sub-address (1A) to data (E0)
Sub-address (1B) to data (E0)
Sub-address (1D) to data (78)
Sub-address (1E) to data (87)

Test Conditions

SW mode

Note

No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

T01 AC gain

(1) Input signal 1 (f

= 100 kHz, amplitude of picture period voltage = 0.2 V

P-P

) to pin 3.

(2) Measure pins 41, 42 and 43 picture period amplitudes V

, V

and V

(3) Determine AC gain using the following formulae.

= V

/0.2 G

= V

/0.2 G

= V

/0.2

T02 Unicolor

adjustment
characteristic

(1) Input signal 1 (f

= 100 kHz, amplitude of picture period voltage = 0.2 V

P-P

) to pin 3.

(2) Vary UNI-COLOR data to maximum (7F), center (40) and minimum (00), and measure pin 43

picture period amplitudes V

uMAX

, V

uCNT

and V

uMIN

(3) Determine amplitude ratio

of V

uMAX

to V

uCNT

(in decibels).

T03 Brightness

adjustment
characteristic

(1) Input signal 2 to pin 3 and set pin 43 picture period amplitude to 1 V

P-P

(2) Vary BRIGHTNESS to maximum (7F), center (80) and minimum (00), and measure pin 43

voltages V

brMAX

, V

brCNT

and V

brMIN

T04 White peak

slice level

(1) Set SUB-CONTRAST to maximum.

(2) Apply external power supply to pin 3 and increase voltage from 5.8 V.

(3) When pin 43 picture period is clipped, measure pin 43 picture period amplitude voltage V

WPS1

(4) Repeat steps from (1) to (3) above (for V

WPS2

), changing sub-address (0C) data to 06.

TA1316AN

2002-10-04

Test Conditions

SW mode

Note

No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

T05 Black peak

slice level

(1) Apply external power supply to pin 3 and gradually decrease voltage from 5.8 V.

(2) When picture period is clipped, measure V

bps

voltage for pins 41, 42 and 43.

T06 RGB output

S/N

(1) Adjust BRIGHTNESS so that pin 41 picture period voltage is 2.4 V.

(2) Set COLOR to minimum.

(3) Measure pins 41, 42 and 43 picture period noise levels n41, n42 and n43 (V

P-P

) using

oscilloscope.

(4) Calculate S/N.

= -20 × og [2.3/(0.2 × n41)]

= -20 × og [2.3/(0.2 × n42)]

= -20 × og [2.3/(0.2 × n43)]

T07 Half-tone

characteristic

(1) Input signal 1 (f

= 100 kHz, amplitude of picture period voltage = 0.2 V

P-P

) to pin 3.

(2) Measure pin 41 picture period amplitude v41A.

(3) Apply 1.5 V to pin 52 from external power supply.

(4) Measure pin 41 picture period amplitude v41B.

(5) Determine G

HT1

= v41B/v41A.

(6) Stop applying voltage to pin 52, set sub-address (1A) data to E2 and measure pin 41 picture

period amplitude v41C.

(7) Determine G

HT2

= v41C/v41A.

TA1316AN

2002-10-04

Test Conditions

SW mode

Note

No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

T09 Drive

adjustment
variable range

(1) Input signal 1 (f

= 100 kHz, picture period amplitude = 0.2 V

P-P

) to pin 3.

(2) Change sub-address (0D) data to maximum (FE), center (80) and minimum (00), and

measure pin 42 picture period amplitude.

(3) Determine in decibels amplitude ratios of maximum and minimum to drive center (DRG

(4) Repeat steps (1) to (3) above, changing sub-address (0E) data to instead, and determine in

decibels pin 41 picture period amplitude ratios (DR

, DR

(5) Repeat steps (1) to (3) above, changing sub-address (0E) data to center (81), and determine

in decibels pin 42 picture period amplitude ratios (DR

, DR

(6) Repeat steps (1) to (3) above, changing sub-address (0E) data to maximum (FF), center (81)

and minimum (01), and determine in decibels pin 41 amplitude ratios (DR

, DR

(7) Repeat steps (1) to (3) above, changing sub-address (0D) data to maximum (FF), center (81)

and minimum (01), and determine in decibels pin 43 amplitude ratios (DR

, DR

(8) Repeat steps (1) to (3) above, setting sub-address (0D) data to 81 and changing sub-address

(0E) data, and determine in decibels pin 41 picture period amplitude ratios (DR

, DR

(9) Repeat steps (1) to (3) above, setting sub-address (0E) data to 81 and changing sub-address

(0D) data to maximum (FF), center (81) and minimum (01), and determine in decibels pin 42
picture period amplitude ratios (DR

, DR

(10) Repeat steps (1) to (3) above, setting sub-address (0D) data to 81 and changing sub-address

(0E) data to maximum (FF), center (81) and minimum (01), and determine in decibels pin 43
picture period amplitude ratios (DR

, DR

TA1316AN

2002-10-04

Test Conditions

SW mode

Note

No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

T10 Pin 53 input

impedance

(1) Connect external power supply, voltmeter and ammeter as shown below. Adjust voltage so

that current value is 0.

(2) Increase pin 53 voltage by 0.2 V and measure current value of ammeter I

(3) Determine Z

in53

= 0.2 V/I

(

T11 ACL

characteristic

(1) Input signal 1 (f

= 100 kHz, picture period amplitude = 0.2 V

P-P

) to pin 3.

(2) Measure pin 43 picture period amplitude vACL1.

(3) Apply external power supply (pin 53 DC voltage

- 0.5 V) to pin 53 and measure pin 43

picture period amplitude vACL2.

(4) Apply external power supply (pin 53 DC voltage

- 1 V) to pin 53 and measure pin 43 picture

period amplitude vACL3.

(5) Calculate using the following formulae.

ACL

= -20 × og (vACL2/vACL1)

ACL

= -20 × og (vACL3/vACL1)

Ammeter (

µA)

Voltmeter

TA1316AN

2002-10-04

Test Conditions

SW mode

Note

No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

T12 ABL point

(1) Measure pin 53 DC voltage VABL1.

(2) Set sub-address (1B) data to 1C.

(3) Apply external power supply to pin 53 and decrease voltage from 6.5 V. When pin 43 voltage

starts changing, measure pin 53 voltage VABL2.

(4) Repeat step (3) above, making the following changes:

Set sub-address (1B) data to 3C, 5C, 7C, 9C, BC, DC and FC and measure the following
voltages on pin 53: VABL3, VABL4, VABL5, VABL6, VABL7, VABL8 and VABL9.

(5) ABL

= VABL2 - VABL1

ABL

= VABL6 - VABL1

ABL

= VABL3 - VABL1

ABL

= VABL7 - VABL1

ABL

= VABL4 - VABL1

ABL

= VABL8 - VABL1

ABL

= VABL5 - VABL1

ABL

= VABL9 - VABL1

T13 ABL gain

(1) Apply external power supply of 6.5 V to pin 53.

(2) Set sub-address (1B) data to 00.

(3) Set BRIGHTNESS to maximum.

(4) Apply external power supply of 4.5 V to pin 53.

(5) Repeat step (3) above, making the following changes:

Set sub-address (1B) data to 00, 04, 08, 0C, 10, 14, 18 and 1C and measure the following
voltages on pin 53: VABL11, VABL12, VABL13, VABL14, VABL15, VABL16, VABL17 and
VABL18.

(6) ABL

= VABL11 - VABL10

ABL

= VABL12 - VABL10

ABL

= VABL13 - VABL10

ABL

= VABL14 - VABL10

ABL

= VABL15 - VABL10

ABL

= VABL16 - VABL10

ABL

= VABL17 - VABL10

ABL

= VABL18 - VABL10

TA1316AN

2002-10-04

Test Conditions

SW mode

Note

No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

T14 RGB output

mode

(1) Adjust BRIGHTNESS so that pin 43 picture period voltage becomes 2.4 V.

(2) Set sub-address (1B) data to 01.

(3) Measure picture period voltages V

43R

, V

42R

and V

41R

on pins 43, 42 and 41 respectively.

(4) Repeat step (3) above, changing sub-address (1B) data to 02, and measure picture period

voltages V

43G

, V

42G

and V

41G

on pins 43, 42 and 41 respectively.

(5) Repeat step (3), changing sub-address (1B) data to 03, and measure picture period voltages

43B

, V

42B

and V

41B

on pins 43, 42 and 41 respectively.

TA1316AN

2002-10-04

Test Conditions

SW mode

Note

No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

T15 Y-OUT

characteristic

(1) Input ramp waveform to pin 3 and adjust input amplitude so that pin 43 picture period

amplitude becomes 2.3 V

P-P

(2) Set sub-address (1C) data to 01.

(3) Adjust input amplitude so that pin 43 picture period amplitude becomes 2.3 V

P-P

(4) According to the figure below, determine in decibels Y-OUT

correction start points 1 and 2

and gradient ratios

1, 2 and 3, which are ratios of gradient at -on to gradient at -off.

100 IRE

Output amplitude (Y-OUT)

Input amplitude

2.3 V

p-p

Note: Solid line:

-off

Dotted line:

-on

TA1316AN

2002-10-04

Test Conditions

SW mode

Note

No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

T16 Blue stretch

circuit
characteristic

(1) Input ramp signal of 0.7 V

P-P

to pin 3.

(2) Set SUB-CONTRAST to maximum.

(3) Set sub-address (1F) data to 04.

(4) Set sub-address (1E) data to 00 and determine blue stretch start point BS

min

using pin 41

in the figure below.

(5) Repeat step (4) above, changing sub-address (1E) data to 04 and 07. Determine blue stretch

start points BS

CNT and BS

max.

(6) Set sub-address (1E) data to 04.

(7) Determine in decibels ratio of gradient at blue stretch on to gradient at blue stretch off, using

pin 41 as shown in the figure below.

(8) Repeat step (7) above, changing sub-address (1F) data to 00 and 07, and determine in

decibels gradient ratios BS

min and BS

max.

Note: The blue stretch start point is determined as an IRE value by setting the amplitude from the

output signal pedestal level to the positive side to be 2.3 V

P-P

= 100 IRE.

Blue stretch on

Blue stretch off

Blue stretch start point

Output amplitude

Input amplitude

(Pin 41 output)

TA1316AN

2002-10-04

Test Conditions

SW mode

Note

No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

T17 ACB pulse

phase and
amplitude

(1) Input signal 1 (f

= 100 kHz, picture period amplitude = 0.2 V

P-P

) to pin 3. Adjust DRIVE

GAIN 1/2 so that pin 41/42 picture period amplitude is equal to that of pin 43.

(2) Measure voltage of pins 46, 47 and 48 and apply measured voltages from external power

supply to pins.

(3) Set sub-address (02) data to 40.

(4) Determine ACB pulse phase by referencing signal waveform output from pins 43, 42 and 41

as shown in Figure 1 below.

Note: The first picture period after V-BLK ends and FBP input falls is 1H. After each H-BLK, the

phase is 2H, 3H and so on.

(5) Determine ACB pulse amplitudes VACB1R, VACB1G and VACB1B by referencing signal

waveform output from pins 43, 42 and 41. (Amplitude is based on picture period level at no
input.)

(6) Repeat step (5) above, setting sub-address (02) data to 80, and measure VACB2R, VACB2G

and VACB2B.

(7) Repeat step (5) above, setting sub-address (02) data to C0, and measure VACB3R,

VACB3G and VACB3B.

Figure 1 RGB output

ACB pulse amplitude

V-BLK period

Figure 2 FBP input (pin 24)

TA1316AN

2002-10-04

Test Conditions

SW mode

Note

No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

T18 IK input

amplitude

(1) Input signal 1 (f

= 100 kHz, picture period amplitude = 0.2 V

P-P

) to pin 3. Adjust DRIVE

GAIN 1/2 so that pin 41/42 picture period amplitude is equal to that of pin 43.

(2) Set sub-address (02) data to 40.

(3) Determine voltage amplitudes while ACB pulse is being applied to pin 45 input signal as

shown in Figure 1 of T19 above.

At 1H

= IK

, at 2H

= IK

and at 3H

= IK

T19 IK input cover

range

(1) Input signal 1 (f

= 100 kHz, picture period amplitude = 0.2 V

P-P

) to pin 3 and adjust DRIVE

GAIN 1/2 so that pin 41/42 picture period amplitude is equal to that of pin 43.

(2) Set sub-address (02) data to 40.

(3) Determine DC voltage of pin 45 during V-BLK (#45VBLK).

(4) Apply external voltage via 10 k

and gradually increase the voltage from 0 V.

(5) Determine DC voltage of pin 45 during V-BLK when picture period amplitude of pin 43 has

just started decreasing (#45VBLK

+).

(6) Reset the external voltage to 0 V and gradually decrease from 0 V.

(7) Determine DC voltage of pin 45 during V-BLK when picture period amplitude of pin 43 has

just started increasing (#45VBLK

-).

(8) DIK

= (#45VBLK+) - (#45VBLK)

DIK

= (#45VBLK-) + (#45VBLK)

T20 Analog RGB

gain

(1) Input signal 1 (f

= 100 kHz, picture period amplitude = 0.2 V

P-P

) to pin 3 and adjust DRIVE

GAIN 1/2 so that pin 41/42 picture period amplitude is equal to that of pin 43.

(2) Apply 5 V from external power supply to pin 49.

(3) Input signal 1 (f

= 100 kHz, picture period amplitude = 0.2 V

P-P

) to pin 35.

(4) Measure picture period amplitude v43R on pin 43.

(5) Repeat steps (3) and (4), making the following changes.

Input signal 1 to pin 34 and measure pin 42 output (v42G).
Input signal 1 to pin 33 and measure pin 41 output (v41B).

(6) Calculate using the following formulae.

GTXR

= v43R/0.2 GTXG = v42G/0.2 GTXB = v41B/0.2

TA1316AN

2002-10-04

Test Conditions

SW mode

Note

No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

T21 Analog RGB

white peak
slice level

(1) Apply 5 V from external power supply to pin 49.

(2) Set RGB CONTRAST to maximum (7F).

(3) Apply external power supply to pin 35. Gradually increase voltage from 3.0 V DC. When pin

43 output is clipped, measure picture period amplitude.

(4) Repeat step (3), making the following changes:

Input to pin 34 and measure pin 42 output; input to pin 33 and measure pin 41 output.

T22 Analog RGB

black peak
limit level

(1) Apply 5 V from external power supply to pin 49.

(2) Set RGB CONTRAST to maximum (7F).

(3) Apply external power supply to pin 35. Gradually increase voltage from 4.5 V DC. When pin

43 output is clipped, measure picture period amplitude.

(4) Repeat step (3), making the following changes:

Input to pin 34 and measure pin 42 output; input to pin 33 and measure pin 41 output.

T23 RGB contrast

adjustment
characteristic

(1) Apply 5 V from external power supply to pin 49.

(2) Input signal 1 (f

= 100 kHz, picture period amplitude = 0.2 V

P-P

) to pin 35.

(3) Change RGB CONTRAST to maximum (7F), center (40) and minimum (00), and measure

picture period amplitude output V

uTXR

(max, CNT and min) on pin 43.

(4) Determine in decibels amplitude ratios of maximum and minimum to center.

(5) Repeat steps (3) and (4), making the following changes:

Input to pin 34 and measure picture period amplitude output on pin 42.
Input to pin 33 and measure picture period amplitude output on pin 41.

T24 Analog RGB

brightness
adjustment
characteristic

(1) Input signal 2 to pins 33, 34 and 35.

(2) Apply 5 V from external power supply to pin 49.

(3) Adjust signal 2 amplitude (A) so that pin 43 picture period amplitude becomes 0.5 V

P-P

(4) Change RGB BRIGHTNESS to maximum (FE), center (80) and minimum (00), and measure

picture period voltage output V

brTX

(max, CNT and min) on pins 43, 42 and 41 respectively.

T25 Analog RGB

mode
switching
transfer
characteristic

(1) Set RGB BRIGHTNESS to maximum (FE).

(2) Input signal 4 (signal amplitude

= 1.5 V

P-P

) to pin 49.

(3) Measure input/output transfer characteristic using pin 43 in Figure T-2.

(4) Repeat steps (2) and (3) above, making the following changes:

Input to pin 34 and measure pin 42; input to pin 33 and measure pin 41.

(5) Determine maximum inter-axial rise/fall transfer delay time, using the data measured above.

TA1316AN

2002-10-04

Test Conditions

SW mode

Note

No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

T26 Text ACL

characteristic

(1) Apply 5 V from external power supply to pin 49.

(2) Input signal 1 (f

= 100 kHz, picture period amplitude = 0.2 V

P-P

) to pin 35.

(3) Measure pin 43 picture period amplitude vTXACL1.

(4) Apply external power supply (pin 53 DC voltage

- 0.5 V) to pin 53 and measure picture

period amplitude output vTXACL2 on pin 43.

(5) Apply external power supply (pin 53 DC voltage

- 1.0 V) to pin 53 and measure picture

period amplitude output vTXACL3 on pin 43.

(6) TXACL

= -20 × og (vTXACL2/vTXACL1)

TXACL

= -20 × og (vTXACL3/vTXACL1)

(7) Repeat steps (5) and (6), setting sub-address (10) data to 01 to ascertain TXACL

and

TXACL

T27 Analog OSD

gain

(1) Input signal 1 (f

= 100 kHz, picture period amplitude = 0.2 V

P-P

) to pin 3 and adjust DRIVE

GAIN 1/2 so that pin 41/42 picture period amplitude is equal to that of pin 43.

(2) Apply 5 V from external power supply to pins 50 and 51.

(3) Input signal 1 (f

= 100 kHz, picture period amplitude = 0.2 V

P-P

) to pin 39.

(4) Adjust output picture period amplitude v43R on pin 43.

(5) Repeat steps (3) and (4), making the following changes:

Input to pin 38 and measure picture period amplitude output on pin 42 (v42G).
Input to pin 37 and measure picture period amplitude output on pin 41 (v41B).

(6) Calculate using the following formulae.

OSDR

= v43R/0.2

OSDG

= v42G/0.2

OSDB

= v41B/0.2

T28 Analog OSD

white peak
slice level

(1) Apply 5 V from external power supply to pins 50 and 51.

(2) Apply external power supply to pin 39 and gradually increase voltage from 4.5 V DC. When

pin 43 output is clipped, measure picture period amplitude.

(3) Repeat step (2), making the following changes:

Input to pin 38 and measure picture period amplitude output on pin 42.
Input to pin 37 and measure picture period amplitude output on pin 41.

T29 Analog OSD

black peak
limit level

(1) Apply 5 V from external power supply to pins 50 and 51.

(2) Apply external power supply to pin 39 and gradually decrease voltage from 4.5 V DC. When

pin 43 output is clipped, measure picture period amplitude.

(3) Repeat step (2), making the following changes.

Input to pin 38 and measure picture period amplitude output on pin 42.
Input to pin 37 and measure picture period amplitude output on pin 41.

TA1316AN

2002-10-04

Test Conditions

SW mode

Note

No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

T30 Analog OSD

contrast
adjustment
characteristic

(1) Apply 5 V from external power supply to pins 50 and 51.

(2) Input signal 1 (f

= 100 kHz, picture period amplitude = 0.2 V

P-P

) to pin 39.

(3) Change OSD-CONTRAST to (11), (10), (01) and (00) and measure picture period amplitude

outputs V

uOSDR

(11), (10), (01) and (00) on pin 43.

(4) Repeat steps (2) and (3), making the following changes:

Input to pin 38 and measure picture period amplitude outputs V

uOSDG

(11), (10), (01) and

(00) on pin 42.
Input to pin 37 and measure picture period amplitude outputs V

uOSDB

(11), (10), (01) and

(00) on pin 41.

T31 Analog OSD

brightness
adjustment
characteristic

(1) Apply 5 V from external power supply to pins 50 and 51.

(2) Change OSD BRIGHT (sub-address 1D) to (38), (78), (B8) and (F8) and measure picture

period voltage outputs on pins 43, 42 and 41.

Data (38)

- V

brOSD0

Data (78)

- V

brOSD1

Data (B8)

- V

brOSD2

Data (F8)

- V

brOSD3

T32 Analog OSD

mode
switching
transfer
characteristic

(1) Set OSD BRIGHT to maximum (11).

(2) Input signal 4 (signal amplitude

= 4.5 V

P-P

) to pin 50.

(3) Measure input/output transfer characteristic, using pin 43 as shown in Figure T-2.

(4) Repeat steps (2) and (3) above, and measure pins 42 and 41.

(5) Determine maximum inter-axial rise/fall transfer delay time, using the data measured above.

(6) Repeat steps (1) to (5), inputting signal 4 (signal amplitude

= 4.5 V

P-P

) to pin 51, and

measure.

TA1316AN

2002-10-04

Test Conditions

SW mode

Note

No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

T33 OSD ACL

characteristic

(1) Set sub-address (07) data to 01.

(2) Apply 5 V from external power supply to pins 50 and 51.

(3) Input signal 1 (f

= 100 kHz, picture period amplitude = 0.2 V

P-P

) to pin 39.

(4) Measure picture period amplitude vOSDACL1 on pin 43.

(5) Apply external power supply (pin 53 DC voltage

- 0.5 V) to pin 53 and measure picture

period amplitude vOSDACL2 on pin 43.

(6) Apply external power supply (pin 53 DC voltage

- 1 V) to pin 53 and measure picture period

amplitude vOSDACL3 on pin 43.

(7) OSDACL

= -20 × og (vOSDACL2/vOSDACL1)

OSDACL

= -20 × og (vOSDACL3/vOSDACL1)

(8) Repeat steps (5) and (6) above, changing sub-address (07) data to 00, and measure

OSDACL3 and OSDACL4.

TA1316AN

2002-10-04

100

Test Conditions

SW mode

Note

No.

Parameter

SW3

SW4

SW5

SW33 SW34 SW35 SW37 SW38 SW39

Test Method (test conditions: V

= 9 V/2 V, Ta = 25° ± 3°C)

T34 OSD blending

characteristic

(1) Input signal 1 (f

= 100 kHz, picture period amplitude = 0.2 V

P-P

) to pin 3.

(2) Measure picture period amplitudes v41a, v42a and v43a on pins 41, 42 and 43 respectively.

(3) Apply 5 V from external power supply to pin 51.

(4) Measure picture period amplitudes v41b, v42b and v43b on pins 41, 42 and 43 respectively.

(5) Determine in decibels v41b amplitude in relation to v41a; v42b amplitude in relation to v42a;

v43b amplitude in relation to v43a:

41TV1, 42TV1 and 43TV1.

(6) Repeat steps (3) to (5), applying 5 V from external power supply to pin 50, and measure

41TV2, 42TV2 and 43TV2.

(7) Repeat steps (3) to (5), applying 5 V from external power supply to pins 50 and 51, and

measure

41TV3, 42TV3 and 43TV3.

(8) Set to SW3 to C; SW37, SW38, Sw39 to B.

(9) Input signal 1 (f

= 100 kHz, picture period amplitude = 0.2 V

P-P

) to pins 37, 38 and 39.

(10) Apply 5 V from external power supply to pins 50 and 51.

(11) Measure picture period amplitudes v41c, v42c and v43c on pins 41, 42 and 43 respectively.

(12) Apply 5 V from external power supply to pin 50.

(13) Measure picture period amplitudes v41d, v42d and v43d on pins 41, 42 and 43 respectively.

(14) Determine in decibels v41d amplitude in relation to v41c; v42d amplitude in relation to v42c;

v43d amplitude in relation to v43c:

41OSD1, 42OSD1 and 43OSD1.

(15) Repeat steps (12) to (14), applying 5 V from external power supply to pin 51, and measure

41OSD2, 42OSD2 and 43OSD2.

(16) Repeat steps (12) to (14), applying 5 V from external power supply to pins 50 and 51, and

measure

41OSD3, 42OSD3 and 43OSD3.

TA1316AN

2002-10-04

101

Test Conditions for Deflection

Common Test Conditions for Sync Signal

(Unless otherwise specified, V

=
=
=
= 9 V/2 V, Ta ==== 25°C, BUS data ==== preset values.)

(Unless otherwise specified, SW3

=
=
=
= A, SW14 ==== A, SW20 ==== on, SW22 ==== open, SW23 ==== B, SW24a ==== B,

SW24b

=
=
=
= open and SW26 ==== B.)

Note

No.

Parameter

Test Method

HA01 Sync input horizontal

sync phase

(1) Input signal a (as shown in figure below) to TPA. Set sub-address (00) data to 82H.

(2) Determine phase difference S

1PH

from pin 14 (SYNC IN) input waveform and pin 20 (AFC

filter) waveform.

HA02 HD 1/2 input

horizontal sync phase

(1) Set sub-address (00) data to 40H.

(2) Input signal b (as shown in figure below) to TP16.

(3) Determine phase difference HD

1PH

from pin 16 (HD1 IN) input waveform and pin 20 (AFC

filter) waveform.

(4) Input signal b to TP13 and set sub-address (00) data to 41H.

(5) Determine phase difference HD

2PH

as in step (3) above.

29.36

µs

0.285 V

0.593

µs

Signal a

Pin 20 waveform

31.75

µs

1.5 V

2.35

µs

Signal b

Pin 20 waveform

1PH

, HD

2PH

TA1316AN

2002-10-04

102

Note

No.

Parameter

Test Method

HA03 Polarity detection

range

(1) Set sub-address (00) data to 40H.

(2) Input signal b (as shown in figure below) to TP16.

(3) Decrease signal b duty from 10% (to shorter negative polarity period) and determine signal b

duty (HD

DUTY1

) when pin 16 input signal phase no longer locks with that of pin 26 (H-OUT).

(4) Increase signal b duty from 10% (to longer negative polarity period) and determine signal b

duty (HD

DUTY2

) when pin 24 (FBP IN) phase changes in relation to signal b.

(5) Further increase signal b duty (to longer negative polarity period) and determine signal b duty

(HD

DUTY3

) when pin 16 input signal phase no longer locks with that of pin 26 (H-OUT).

(6) Decrease signal b duty from 90% (to shorter negative polarity period) and determine signal b

duty (HD

DUTY4

) when pin 24 (FBP IN) phase changes in relation to signal b.

Duty

= A/B × 100% (0%~100%)

HA04 Sync input threshold

amplitude

(1)

Set sub-address (00) to 82H and TEST mode to 01.

(2) Apply external voltage via 20 k

to pin 14.

(3) Set external voltage to 0 V and monitor pin 14 pin voltage SYNC_TIP_00.

Also check that pin 28 pin voltage is L.

(4) By increasing external voltage SYNC_OFF_00, monitor pin 14 SYNC IN pin voltage when pin

28 DAC1 pin voltage becomes H.

(5) Determine SYNC input level at SYNC separation level 00 as follows:

ths00

= (SYNC_OFF_00 - SYNC_TIP_00) /0.286 × 100

(6) Set SYNC separation level from 01 to 10 to 11, and determine V

ths01

, V

ths10

and V

ths11

ths01

= (SYNC_OFF_01 - SYNC_TIP_01) /0.286 × 100

ths10

= (SYNC_OFF_10 - SYNC_TIP_10) /0.286 × 100

ths11

= (SYNC_OFF_11 - SYNC_TIP_11) /0.286 × 100

31.75

µs

1.5 V

Signal b

Pin 14

0.08H

40 IRE
(

= 286

p-p

)

Pin 28
(SYNC output Mode)

Sync Tip level

Sync Sepa level

TA1316AN

2002-10-04

103

Note

No.

Parameter

Test Method

HA05 HD 1/2 input

threshold voltage

(1) Set sub-address (00) data to 40H.

(2) Input signal b (as shown in figure below) to TP16.

(3) Increase signal b amplitude from 0 V

P-P

. When pin 26 (H-OUT) phase locks with that of signal

b, determine signal b amplitude V

thHD1

(4) Input signal b (as shown in figure below) to TP13 and set sub-address (00) data to 41H.

(5) Measure as in step (3) above, and determine signal amplitude V

thHD2

HA06 Horizontal picture

phase adjustment
variable range

(1) Set sub-address (00) data to 40H.

(2) Input signal b (as shown in figure below) to TP16.

(3) Change sub-address (01) data from 80H to 00H and measure pin 26 (H-OUT) waveform

phase change

SFT

(4) Change sub-address (01) data from 80H to FEH and measure pin 26 (H-OUT) waveform

phase change

SFT

31.75

µs

thDH

2.35

µs

Signal b

31.75

µs

1.5 V

2.35

µs

Signal b

Pin 26 waveform
Data: 00H

SFT

Pin 26 waveform
Data: FEH

Pin 26 waveform
Data: 80H

TA1316AN

2002-10-04

104

Note

No.

Parameter

Test Method

HA07 Curve correction

(1) Set sub-address (00) data to 40H.

(2) Input signal b (as shown in figure below) to TP16.

(3) Connect external power supply to pin 23 (H CURVE CORRECTION). Apply 1.5 V and 3.5 V to

pin 23 and measure the output waveform phase change

#23

on pin 26 (H-OUT).

HA08 Clamp pulse phase,

width and level

(1) Set sub-address (00) data to 40H.

(2) Input signal b (as shown in figure below) to TP16.

(3) Determine clamp pulse phase CP

, width CP

PW0

and output level CP

on pin 18 (SCP

OUT) in relation to signal b.

(4) Set sub-address (01) data to 81H. Determine CP

, CP

PW1

and CP

as in step (3) above.

(5) Apply no signal input to TP16.

(6) Determine pin 18 clamp pulse phase CP

, width CP

PW2

and output level CP

in relation to

pin 24.

31.75

µs

1.5 V

2.35

µs

Signal b

Pin 26 waveform
(pin 23 voltage: 1.5 V)

#23

Pin 26 waveform
(pin 23 voltage: 3.5 V)

31.75

µs

1.5 V

2.35

µs

Signal b

Pin 18 waveform

Pin 24 waveform

V0/1

W0/1

S0/1

Pin 18 waveform

TA1316AN

2002-10-04

105

Note

No.

Parameter

Test Method

HA09 Black peak detection

pulse phase and level

(1) Set sub-address (00) data to 40H.

(2) Set SW24A to open.

(3) Input signal c (as shown in figure below) to pin 24 (FBP IN).

(4) Determine pin 18 (SCP OUT) black peak detection pulse phase HBP

S0a

and HBP

S0b

relation to signal c.

(5) Determine output level HBP

SV0

from pin 18 (SCP OUT) output waveform.

(6) Set sub-address (02) data to 90H.

(7) Measure as in steps (4) and (5), and determine phases HBP

S1a

and HBP

S1b

, and output level

HBP

SV1

(8) Change sub-address (00) data to C0H and sub-address (02) data to 80H, and determine

phases HBP

S45a

and HBP

S45b

, and output level HBP

SV45

HA10 FBP threshold

(1) Set sub-address (00) data to 40H.

(2) Input signal b (as shown in figure below) to TP16.

(3) Increase amplitude of FBP signal input to pin 24 (FBP IN) from 0 V

P-P

. When signal b and pin

26 (H-OUT) phases are locked, measure pin 24 input amplitude (V

thFBP

31.75

µs

1.5 V

2.35

µs

31.5

µs

2 V

0 V

HBP

SV0/SV1/SV45

Signal c

Pin 18 waveform

4.13

µs

HBP

S0b/S1b/S45b

HBP

S0a/S1a/S45a

TA1316AN

2002-10-04

106

Note

No.

Parameter

Test Method

HB01 H-OUT pulse duty

(1) No signal input.

(2) Measure T1 and T2 (as shown in figure below) from pin 26 (H-OUT) output waveform when

sub-address (00) data is 80H and A0H. Determine duties TH

00A

and TH

00B

using the

following formula:

= T1/(T1 + T2) × 100 %

(3) Set sub-address (00) data to 81H, A1H, 82H and A2H, measure as in step (2) above, and

determine duties TH

01A

, TH

01B

, TH

10A

and TH

10B

HB02 Horizontal

free-running
frequency

(1) Set SW20 to open.

(2) Set sub-address (00) data to 00H and measure horizontal free-running frequency F00 from pin

26 (H-OUT) output waveform.

(3) Set sub-address (00) data to 40H, 80H and C0H, measure as in step (2) above, horizontal

free-running frequencies F01, F10 and F11.

HB03 Horizontal oscillation

frequency variable
range

(1) Set sub-address (00) data to 00H.

(2) Connect 10-k

resistor between pin 20 and V

. Measure horizontal frequency F00

MIN

from

pin 26 (H-OUT) output waveform.

(3) Connect 68-k

resistor between pin 20 and GND. Measure horizontal frequency F00

MAX

from

pin 26 (H-OUT) output waveform.

(4) Set sub-address (00) data to 40H, 80H and C0H, and measure as in steps (2) and (3) above,

horizontal frequencies F01

MIN

, F01

MAX

, F10

MIN

, F10

MAX

, F11

MIN

and F11

MAX

HB04 Horizontal oscillation

control sensitivity

(1) Set SW20 to open.

(2) Connect external power supply to TP20. Set sub-address (00) data to 00H.

Apply V

+ 0.05 V and V

- 0.05 V (see HB01) to TP20, and measure frequencies FA and

FB from pin 26 (H-OUT) output waveform. Calculate frequency change rate (BH00) using the
following formula.

(3) Set sub-address (00) data to 40H, 80H and C0H, measure as in step (2) above, and calculate

frequency change rates BH01, BH10 and BH11.

HB05 H-OUT output voltage (1) Set SW20 to open.

(2) Measure high (V15

) and low (V15

) voltages of pin 26 (H-OUT) output waveform.

Pin 26 waveform

TA1316AN

2002-10-04

107

Note

No.

Parameter

Test Method

V01

VP output pulse width

Vertical free-running
(maximum pull-in
range)

(1) Input signal d (as shown in figure below) to TP16 and signal e (as shown in figure below) to

pin 24 (FBP IN).

(2) Measure VP output pulse width (VP

) from TP27 output waveform.

(3) Measure VP pull-in range (VP

) from TP27 output waveform.

(4) Set sub-address (03) data to 01H, 02H, 03H, 04H, 05H and 06H and measure, as in step (4)

above, pull-in ranges VPt1, VPt2, VPt3, VPt4, VPt5 and VPt6.

V02

Minimum vertical
pull-in range

(1) This is same as step (1) for V01.

(2) Input signal f (as shown in figure below) to TP15.

(3) Increase signal f cycle from 30H. Measure cycle (T

VPULL

) when phase locks with that of

TP27.

Signal f (TP15
input waveform)

VPULL

Pin 24
input waveform

TP27 waveform

Pin 24
input waveform

VPt

TP27 waveform

VPw

Signal e
(pin 24 input waveform)

9 V

GND

5.6

µs

Signal d
(TP16 input signal)

4 V

2.35

µs

29.63

µs

TA1316AN

2002-10-04

108

Note

No.

Parameter

Test Method

V03

Vertical black peak
detection pulse

(1) This is same as step (1) for V01.

(2) Input signal f (as shown in figure below) to TP15.

(3) Measure phase differences VBPP

and VBPP

from TP18 output waveform.

(4) Set sub-address (03) data to 01H, 02H, 03H, 04H, 05H and 06H, and measure as in step (3)

above, phase differences VBPP

, VBPP

VBPP

, VBPP

and VBPP

V04

Vertical blanking stop
phase

(1) This is same as step (1) for V01.

(2) Input signal f (as shown in figure below) to TP15.

(3) Set sub-address (03) data to 00H and F0H, and measure blanking stop phases VBLK

MIN

and

VBLK

MAX

from pin 43 output waveform.

Signal f (TP15
input waveform)

262.5H~1125H

VBPP

Pin 24
input waveform

TP18 waveform

Signal f (TP15
input waveform)

1125H

Pin 24
input waveform

Pin 43 waveform

VBLK

TA1316AN

2002-10-04

111

Test Circuit

TPD

(9 V)

#49

#50

#51

#52

APL

Y/C

VSM

ABC

/P-

E/BL

(
anal

REA

FILTER

BPH

/
C

GND

I
X

(
anal

COLOR

I
T

HD2

I
N

NC I

HD1

I
N

/
D

AFC

HORI

NCY

CURV

CORRE

I
O

FBP

/
D

GND

H-OUT

OUT

)

(
anal

)

/
H

S/H

RGB

GND

OUT

B O

RGB

I
N

)

I
N

GND

TA1316AN

#56

#40

100

#54

#53

100

TP31

100

#48

#47

#46

#45

300

#43

100

#42

100

#41

100

#39

TP39

#38

TP38

#37

TP37

#36

470

9 V

#35

TP35

#34

TP34

#33

TP33

#31

470

#30

TP30

240

#29

100

#55

470

LED

TP1

TP4

TP5

F #10

TP9

TP10

#11

TP12

#12

100

TP13

#13

100

TP15

#15

100

TP16

#16

100

TP17

#17

100

TP18

#18

TP27

#27

#28

#14

TP14a

F N

TP14b

#20

TP20

#21

TP21

SBL

KEC

470

#22

TPC

TPB

TPA

µF

100

#23

TP23b

TP23a

100

#24

#26

24b

(9 V)

TC4538BP

1200 pF

1000 pF

TC4538BP

1200 pF

1000 pF

TC4538BP

1200 pF

1000 pF

24A

15.75 kHz

31.5/33.75 kHz

45 kHz

100

SW14

TA1316AN

2002-10-04

112

Application Circuit

: Mylar capacitor

100

470

SBL

KEC

470

SCL

-
IN

HD2-I

-
IN

HD1-I

P-

CURV

COR

FBP-

H-OUT

VP-

SDA

B-

I
N

-
I
N

C2-OUT

-
I
N

G-I

R-I

B-

G-OUT

R-OUT

Ys3

Ys2

Ys1

ABC

VSM

-
O

APL

Y/C

VSM

ABC

/P-

E/BL

(
anal

REA

FILTER

BPH

/
C

GND

I
X

(
anal

COLOR

I
T

HD2

I
N

NC I

HD1

I
N

/
D

AFC

HORI

NCY

CURV

CORRE

I
O

FBP

/
D

GND

H-OUT

(
anal

)

/
H

S/H

RGB

GND

OUT

B O

RGB

I
N

)

I
N

GND

TA1316AN

Y2-IN

Y1-IN

Cb/
Pb2-IN

Cr/Pr2-IN

Cr/Pr1-IN

Cb/Pb1-IN

µF

SYNC-IN 10

µF

100

470

100

I
N

300

100

560

Application of H-FREQ switching (31.5 k/33.75 k/45 kHz)

Tr.

H-FREQ

Pin 22

Voltage

31.5 kHz

6 V

33.75 kHz

3 V

45 kHz

0 V

*: Don't care

TA1316AN

2002-10-04

115

· TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor

devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical
stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of
safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of
such TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as
set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and
conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability
Handbook" etc..

· The TOSHIBA products listed in this document are intended for usage in general electronics applications

(computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances,
etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires
extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or
bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or
spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this
document shall be made at the customer's own risk.

· The products described in this document are subject to the foreign exchange and foreign trade laws.

· The information contained herein is presented only as a guide for the applications of our products. No

responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other
rights of the third parties which may result from its use. No license is granted by implication or otherwise under
any intellectual property or other rights of TOSHIBA CORPORATION or others.

· The information contained herein is subject to change without notice.

000707EBA

RESTRICTIONS ON PRODUCT USE

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