TB62206FG

2005-03-02

TOSHIBA BiCD Processor IC Silicon Monolithic

TB62206FG

BiCD PWM 2-Phase Bipolar Stepping Motor Driver

The TB62206FG is designed to drive a 2-phase bipolar

setpping motor. With BiCD process technology, this device
enables output withstand voltage of 40 V and maximum current
of 1.8 A to be achieved.

Features

· Bipolar stepping motor driver IC
· Internal PWM current control
· 2-phase/1-2 phase excitation is available
· Monolithic BiCD IC

DMOS FET used for output power transistor

· High voltage output and High current: 40 V/1.8 A (max)
· On-chip thermal shutdown circuit, overcurrent protection circuit and power-on reset circuit (POR)
· Package: HSOP20-P-450-1.00

Pin Assignment

Weight: 0.79 g (typ.)

Vref A

Vref B

FIN (GND)

Ccp C

Ccp B

Ccp A

TORQUE

OUT

ENABLE B

ENABLE A

FIN (GND)

OUT A

PHASE B

PHASE A

STANDBY

OUT

OUT B

TB62206FG

2005-03-02

Function Table

Output

Phase

Enable

OUT (+)

OUT ()

X L

OFF

H H H L

L H L H

X :

Don't care

Others

Pin Name

Notes

ENABLE X

Output

Output OFF

Output is OFF regardless of its phase's
state.

PHASE X

OUT X: H

OUT

: H

In high level, current flows OUT X

OUT

STANDBY

Motor operation enable

All functions of the

IC stopped

When

STANDBY

= L, output stopped while

charge pomp stopped.

TORQUE 100%

71%

High-level

Protection Function

(1) Thermal

shutdown

circuit

While Tj = 150°C, all outputs are OFF. To turn-on, change the state of the STANDBY pin in the
order of H, L, H.
It has temperature hysteresis to prevent the output from oscillating. (T = 35°C)

(2) POR (Power-On Reset Circuit: V

and V

power supply monitor circuit)

Output is forcibly turned off until V

and V

reach their specified levels.

(3) ISD

Output is forcibly turned off when current higher than the specified level flows in the output block.
To turn-on, change the state of the STANDBY pin in the order of H, L, H.

TB62206FG

2005-03-02

Maximum Ratings

(Ta

25°C)

Characteristics Symbol

Rating

Unit

Logic supply voltage

7 V

Motor supply voltage

Output current

(Note 1)

OUT

1.8

A/phase

Current detect pin voltage

± 4.5 V

Charge pump pin maximum voltage
(CCP1 pin)

+ 7.0

Logic input voltage

(Note 2)

+ 0.4

(Note 3)

1.4

Power dissipation

(Note 4)

3.2

Operating temperature

opr

-40 to 85

°C

Storage temperature

stg

-55 to 150

°C

Junction temperature

150

°C

Note 1: Perform thermal calculations for the maximum current value under normal conditions. Use the IC at 1.5 A or

less per phase.
The current value maybe controled according to the ambient temperature or board conditions.

Note 2: Input 7 V or less as V

Note 3: Measured for the IC only. (Ta

= 25°C)

Note 4: Measured when mounted on the board. (Ta

= 25°C)

Ta: IC ambient temperature

opr

: IC ambient temperature when starting operation

: IC chip temperature during operation T

(max) is controlled by TSD (thermal shut down circuit)

Recommended Operating Conditions

(Ta

0 to

85°C, (Note 5))

Characteristics Symbol

Test

Condition

Min

Typ.

Max

Unit

Power supply voltage

4.5

5.0

5.5

Motor supply voltage

= 5.0 V, Ccp1 = 0.22 µF,

Ccp2

= 0.02 µF

13 24 35 V

Output current

OUT (1)

= 25°C, per phase

1.2 1.5 A

Logic input voltage

GND

Phase signal input frequency

PHASE

= 5.0 V

1.0 150 KHz

Chopping frequency

chop

= 5.0 V

100

150

KHz

ref

reference voltage

ref

= 24 V, Torque = 100%

GND

3.0

4.0

Current detect pin voltage

= 5.0 V

±1.0

±4.5 V

Note 5: Because the maximum value of T

is 120°C, recommended maximum current usage is below 120°C.

TB62206FG

2005-03-02

Electrical Characteristics

(unless otherwise specified, Ta

25°C, V

5 V, V

24 V)

Characteristics Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

HIGH V

IN (H)

2.0

+ 0.4

Input voltage

LOW V

IN (L)

Data input pins

GND
- 0.4

GND 0.8

Input hysteresis voltage

IN (HIS)

Data input pins

200

400

700

IN (H)

Data input pins with resistor

IN (H)

1.0

Input current

IN (L)

Data input pins without resistor

1.0

µA

DD1

= 5 V, all inputs connected

to ground, Logic, output all off

1.0 2.0 3.0

Power dissipation (V

pin)

DD2

Output OPEN, f

PHASE

= 1.0 kHz

LOGIC ACTIVE, V

= 5 V,

ChargePump

= charged

1.0 2.5 3.5

Output OPEN, all inputs
connected to ground, Logic,
output all off, ChargePump

no operation

1.0 2.0 3.0

OUT OPEN, f

PHASE

= 1 kHz

LOGIC ACTIVE, V

= 5 V,

= 24 V, Output off,

ChargePump

= charged

2.0 4.0 5.0

Power dissipation (V

pin)

OUT OPEN, f

PHASE

= 4 kHz

LOGIC ACTIVE, 100 kHz
chopping (emulation), Output
OPEN,
ChargePump

= charged

10 13

Output standby current

Upper

= V

= 24 V, V

OUT

= 0 V,

STANDBY

= H, PHASE = H

-200

-150

µA

Output bias current

Upper

OUT

= 0 V, STANDBY = H

-100

-50

µA

Output leakage current

Lower

= V

= CcpA = V

OUT

= 24

V, LOGIC IN

= ALL = L

1.0 1.0 µA

HIGH

(reference)

RS (H)

ref

= 3.0 V, V

ref

(Gain)

= 1/5.0

TORQUE

= (H) = 100% set

100

Comparator reference
voltage ratio

LOW V

RS (L)

ref

= 3.0 V, V

ref

(Gain)

= 1/5.0

TORQUE

= (L) = 71% set

66 71 76

Output current differential

OUT1

Differences between output
current channels

-5

5 %

Output current setting differential

OUT2

OUT

= 1000 mA

-5

5 %

RS pin current

= 24 V, V

= 24 V

STANDBY

= L

1 2 µA

ON (D-S) 1

OUT

= 1.0 A, V

= 5.0 V

= 25°C, Drain-Source

0.5 0.6

ON (S-D) 1

OUT

= 1.0 A, V

= 5.0 V

= 25°C, Source-Drain

0.5 0.6

ON (D-S) 2

OUT

= 1.0 A, V

= 5.0 V

= 105°C, Drain-Source

0.6 0.75

Output transistor drain-source
ON-resistance

ON (S-D) 2

OUT

= 1.0 A, V

= 5.0 V

= 105°C, Source-Drain

0.6 0.75

TB62206FG

2005-03-02

Electrical Characteristics

(unless otherwise specified, Ta

25°C, V

5 V, V

24 V)

Characteristics Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

ref

input voltage

ref

= 24 V, V

= 5 V,

STANDBY

= H, Output on,

PHASE

= 1 kHz

GND

4.0 V

ref

input current

ref

STANDBY

= H, Output on,

= 24 V, V

= 5 V,

ref

= 3.0 V

20 35 50

µA

ref

attenuation ratio

ref

(GAIN)

= 24 V, V

= 5 V,

STANDBY

= H, Output on,

ref

= 0.0 to 4.0 V

1/4.8 1/5.0 1/5.2

TSD temperature

(Note 1)

TSD DC

= 5 V, V

= 24 V

130

170 °C

TSD return temperature difference

(Note

TSD DC

TSD

= 130 to 170°C

TSD

- 50

TSD

- 35

TSD

- 20

°C

return voltage

DDR

= 24 V, STANDBY =

H 2.0 3.0 4.0 V

return voltage

= 5 V, STANDBY = H

8.0

9.0

Over current protected circuit

operation current

(Note 2)

ISD

= 5 V, V

= 24 V

3.0 A

Note 1: Thermal shut down (TSD) circuit

When the IC junction temperature reaches the specified value and the TSD circuit is activated, the internal
reset circuit is activated switching the outputs of both motors to off.
When the temperature is set between 130 (min) to 170°C (max), the TSD circuit operates.
When the TSD circuit is activated, the charge pump is halted, and TROTECT pin outputs V

voltage.

Even if the TSD circuit is activated and STANDBY goes H L H instantaneously, the IC is not reset
until the IC junction temperature drops -20°C (typ.) below the TSD operating temperature (hysteresis
function).

Note 2: Overcurrent protection circuit

When current exceeding the specified value flows to the output, the internal reset circuit is activated, and the
ISD turns off the output.
Until the STANDBY signal goes Low to High, the overcurrent protection circuit remains activated.
During ISD, IC turns STANDBY mode and the charge pump halts.

TB62206FG

2005-03-02

AC Electrical Characteristics

(Ta

25°C, V

24 V, V

5 V, 6.8 mH/5.7

)

Characteristics Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

Clock frequency

PHASE

166 kHz

CLK

)

100

Minimum clock pulse width

µs

Output Load: 6.8 mH/5.7

100

pLH

PHASE to OUT

1000

pHL

Output Load: 6.8 mH/5.7

2000

pLH

CR to OUT

500

Output transistor switching
characteristic

pHL

Output Load: 6.8 mH/5.7

1000

Noise rejection dead band time

BRANK

OUT

= 1.0 A

200

300

500

CR reference signal oscillation
frequency

osc

= 560 pF, R

osc

= 3.6 k

800 kHz

Chopping frequency possible range

chop (min)

chop (max)

= 24 V, V

= 5 V, Output

ACTIVE (I

OUT

= 1.0 A)

Step fixed, Ccp1

= 0.22 µF,

Ccp2

= 0.01 µF

40 100 150 kHz

Chopping set frequency

chop

Output ACTIVE (I

OUT

= 1.0 A),

CR CLK

= 800 kHz

100 kHz

Charge pump rise time

ONG

Ccp

= 0.22 µF, Ccp = 0.022 µF

= 24 V, V

= 5 V,

STANDBY

= ON OFF

100 200 µs

TB62206FG

2005-03-02

Current Waveform and Setting of MIXED DECAY MODE

To control the constant current, the rate of Mixed Decay Mode which determines current amplitude

(ripple current) should be 37.5%.

MIXED DECAY MODE Waveform

(current waveform)

chop

37.5%
MIXED
DECAY
MODE

CR pin
internal
CLK
waveform

Charge mode

NF: set current value reached Slow mode

Mixed decay timing Fast mode Charge mode

Set current value

MDT

DECAY MODE 1

25%
MIXED
DECAY
MODE

Internal
CR CLK
signal

OUT

chop

Set current
value

Set current value

RNF

MDT (MIXED DECAY TIMING) point: 37.5% fixed

TB62206FG

2005-03-02

Current Discharge Path when ENABLE Input During Operation

In Slow Mode, when all output transistors are forced to switch off, coil energy is discharged in the

following MODES:

Note: Parasitic diodes are located on dotted lines. In normal MIXED DECAY MODE, the current does not flow

to the parasitic diodes.

As shown in the figure above, an output transistor has parasitic diodes.
To discharge energy from the coil, each transistor is switched on allowing current to flow in the reverse

direction to that in normal operation. As a result, the parasitic diodes are not used. If all the output
transistors are forced to switch off, the energy of the coil is discharged via the parasitic diodes.

PGND

OFF

(Note)

Load

PGND

OFF

(Note)

Load

PGND

(Note)

Load

Charge mode

Slow mode

Forced OFF mode

OFF

Input ENABLE

OFF

TB62206FG

2005-03-02

Output Transistor Operating Mode

Output Transistor Operation Functions

CLK U1 U2 L1 L2

CHARGE

ON OFF OFF ON

SLOW OFF OFF ON ON

FAST OFF ON ON OFF

Note: The above table is an example where current flows in the direction of the arrows in the above figures.

When the current flows in the opposite direction of the arrows, see the table below.

CLK U1 U2 L1 L2

CHARGE

OFF ON ON OFF

SLOW OFF OFF ON ON

FAST ON OFF OFF ON

In this IC, three modes as shown above are automatically switched to control the constant current.

PGND

OFF

(Note)

Load

PGND

(Note)

Load

PGND

(Note)

Load

Charge mode

Current flows

into the coil.

Slow mode

Current flows between

the coil and the IC.

Fast mode

The energy in the coil flows

back to the power supply.

OFF

TB62206FG

2005-03-02

Power Supply Sequence

(recommended)

Note 1: If the V

drops to the level of the V

DDR

or below while the specified voltage is input to the V

pin, the IC is

internally reset.
This is a protective measure against malfunction. Likewise, if the V

drops to the level of the V

or below

while regulation voltage is input to the V

, the IC is internally reset as a protective measure against

malfunction.
To avoid malfunction, when turning on V

or V

, to input the STANDBY signal at the above timing is

recommended.
It takes time for the output control charge pump circuit to stabilize. Wait up to t

ONG

time after power on

before driving the motors.

Note 2: When the V

value is between 8 to 11 V, the internal reset is released, thus output may be on. In such a

case, the charge pump cannot drive stably because of insufficient voltage. The Standby state should be
maintained until V

reaches 13 V or more.

Note 3: Since V

= 0 V and V

= voltage within the rating are applied, output is turned off by internal reset.

At that time, a current of several mA flows due to the Pass between V

and V

When voltage increases on V

output, make sure that specified voltage is input.

DD (max)

DD (min)

DDR

GND

M (min)

GND

Active

Non-active

Internal operable

STANDBY

INPUT (Note 1)

Takes up to t

ONG

until operable.

Non-operable area

STANDBY

TB62206FG

2005-03-02

How to Calculate Set Current

This IC drives the motor, controlling the PWM constant current in reference to the frequency of CR

oscillator.

At that time, the maximum current value (set current value) can be determined by setting the sensing

resistor (R

) and reference voltage (V

ref

100(%)

)

(

71%)

100,

(Torque

Torque

(V)

ref

5.0

(max)

OUT

1/5.0 is V

ref

(gain): V

ref

attenuation ratio. (for the specifications, see the electrical characteristics.)

For example, when applying V

ref

= 3 V and torque = 100% to drive out I

OUT

of 0.8 A, R

= 0.75 (0.5 W

or more) is required.
(for 1-2 phase excitation with 71% of torque, the peak current should be set to 100%).

How to Calculate the Chopping and OSC Frequencies

At constant current control, this IC chops frequency using the oscillation waveform (saw tooth waveform)

determined by external capacitor and resistor as a reference.

The TB62206FG requires an oscillation frequency of eight times the chopping frequency.
The oscillation frequency is calculated as follows:

600

0.523

For example, when C

osc

= 560 pF and R

osc

= 3.6 k are connected, f

= 813 kHz.

At this time, the chopping frequency f

chop

is calculated as follows:

chop

= f

= 101

kHz

TB62206FG

2005-03-02

IC Power Dissipation

IC power dissipation is classified into two: power consumed by transistors in the output block and power

consumed by the logic block and the charge pump circuit.
· Power consumed by the Power Transistor (calculated with R

= 0.60 )

· In Charge mode, Fast Decay mode, or Slow Decay mode, power is consumed by the upper and lower

transistors of the H bridges.

The following expression expresses the power consumed by the transistors of a H bridge.

P (out) = 2 (T

) × I

OUT

(A) × V

(V) = 2 × I

OUT2

× R

..............................(1)

The average power dissipation for output under 4-bit micro step operation (phase difference between

phases A and B is 90°) is determined by expression (1).

Thus, power dissipation for output per unit is determined as follows (2) under the conditions below.

= 0.60 (1.0 A)

OUT

(Peak: max) = 1.0 A

= 24 V

= 5 V

P (out) = 2 (T

) × 1.0

(A) × 0.60 × 2 () = 2.40 (W) ........................................(2)

Power consumed by the logic block and IM
The following standard values are used as power dissipation of the logic block and IM at operation.

I (LOGIC) = 2.5 mA (typ.):
I (I

) = 10.0 mA (typ.): operation/unit

I (I

) = 2.0 mA (typ.): stop/unit

The logic block is connected to V

(5 V). IM (total of current consumed by the circuits connected to

and current consumed by output switching) is connected to V

(24 V). Power dissipation is

calculated as follows:

P (Logic&IM) = 5 (V) × 0.0025 (A) + 24 (V) × 0.010 (A) = 0.25 (W) ...............(3)

Thus, the total power dissipation (P) is

P = P (out) + P (Logic&IM) = 2.65 (W)

Power dissipation at standby is determined as follows:

P (standby) + P (out) = 24 (V) × 0.002 (A) + 5 (V) × 0.0025 (A) = 0.06 (W)

For thermal design on the board, evaluate by mounting the IC.

TB62206FG

2005-03-02

OSC-Charge DELAY:

Because the rising edge level of the OSC waveform is used for converting the OSC waveform to the

internal CR CLK, a delay of up to 1.25 ns (@f

chop

= 100 kHz: f

= 400 kHz) occurs between the OSC

waveform and the internal CR CLK.

CR Waveform

Internal CR CLK
Waveform

CR-CR CLK DELAY

Figure 2 Timing Waveforms and Names (CR and output)

chop

OSC-Charge Delay

Set current

OSC-Fast Delay

OSC (CR)

50%

Charge

50%

Slow

Fast

OUTPUT

Voltage A

OUTPUT

Voltage A

OUTPUT

Current

TB62206FG

2005-03-02

Relationship between V

and V

(charge pump voltage)

Note: V

= 5 V

(&Vcharge UP)

o
l
t
age

, c

har

o
l
t
ag

(
V

)

Supply voltage VM (V)

Charge pump voltage VH = VDD + VM (= Ccp A) (V)

VH voltage

charge up voltage

VM voltage

2 3

4 5 6 7 8 9

11 12 13

15 16 17 18

21 22 23 24 25 26

27 28 29

31 32 33 34 35 36 37 38 39

Input

STANDBY

VMR

Charge pump
output voltage

VM voltage

Maximum rating

Recommended operation area

Usable area

TB62206FG

2005-03-02

Operation of Charge Pump Circuit

· Initial charging

(1) When RESET is released, T

is turned ON and T

turned OFF. Ccp 2 is charged from Ccp 2 via

Di1.

(2) T

is turned OFF, T

is turned ON, and Ccp 1 is charged from Ccp 2 via Di2.

(3) When the voltage difference between V

and V

(Ccp A pin voltage = charge pump voltage)

reaches V

or higher, operation halts (steady state).

· Actual operation

(4) Ccp 1 charge is used at f

chop

switching and the V

potential drops.

(5) Charges up by (1) and (2) above.

Output switching

Initial charging

Steady state

(1)

(2) (3)

(4)

(5)

(4)

(5)

= V

+ V

= charge pump voltage

i1 = charge pump output current

i2 = gate block power dissipation

= 5 V

= 24 V

Comparator

Controller

Output

Output
H switch

Ccp 1
0.22

µF

Ccp A

Ccp B

Ccp C

Ccp 2
0.022

µF

Di2

Di1

Di3

(2)

(1)

(2)

TB62206FG

2005-03-02

Charge Pump Rise Time

ONG

Delay time taken for capacitor Ccp 2 (charging capacitor) to fill up Ccp 1 (storing capacitor) to V

+ V

after STANDBY is released.

The internal IC cannot drive the gates correctly until the voltage of Ccp 1 reaches V

+ V

. Be sure to

wait for t

ONG

or longer before driving the motors.

Basically, the larger the Ccp 1 capacitance, the smaller the voltage fluctuation, though the initial charge

up time is longer.

The smaller the Ccp 1 capacitance, the shorter the initial charge-up time but the voltage fluctuation is

larger.

Depending on the combination of capacitors (especially with small capacitance), voltage may not be

sufficiently boosted.

When the voltage does not increase sufficiently, output DMOS R

turns lower than the normal, and it

raises the temperature.

Thus, use the capacitors under the capacitor combination conditions (Ccp 1 = 0.22 µF, Ccp 2 = 0.022 µF)

recommended by Toshiba.

50%

+ V

+ (V

× 90%)

Ccp 1 voltage

5 V

0 V

STANDBY

ONG

TB62206FG

2005-03-02

External Capacitor for Charge Pump

When driving the stepping motor with V

= 5 V, f

chop

= 150 kHz, L

= 10 mH under the conditions of V

= 13 V and 1.5 A, the logical values for Ccp 1 and Ccp 2 are as shown in the graph below:

Choose Ccp 1 and Ccp 2 to be combined from the above applicable range. We recommend Ccp 1:Ccp 2 at

10:1 or more. (if our recommended values (Ccp

= 0.22 µF, Ccp 2

= 0.02 µF) are used, the drive conditions in

the specification sheet are satisfied. (there is no capacitor temperature characteristic as a condition.)

When setting the constants, make sure that the charge pump voltage is not below the specified value and

set the constants with a margin (the larger Ccp 1 and Ccp 2, the more the margin).

Some capacitors exhibit a large change in capacitance according to the temperature. Make sure the above

capacitance is obtained under the usage environment temperature.

Ccp 1 capacitance (µF)

Ccp 1 Ccp 2

p 2

p
a
c
i
t
a

nce

(
µ
F)

0.05

0.005

0.01

0.015

0.02

0.025

0.03

0.035

0.04

0.045

0.05 0.1 0.15 0.2 0.25

0.35 0.4 0.45 0.5

0.3

Applicable range

Recommended

value

TB62206FG

2005-03-02

Recommended Application Circuit

The values for the respective devices are all recommended values. For values under each input condition,

see the above-mentioned recommended operating conditions.

Note: Adding bypass capacitors is recommended.

Make sure that GND wiring has only one contact point, and to design the pattern that allows the heat
radiation.
To control setting pins in each mode by SW, make sure to pull down or pull up them to avoid high
impedance.
To input the data, see the section on the recommended input data.

The IC may be destroyed due to short circuit between output pins, an output pin and the V

pin, or an

output pin and the GND pin.
Design an output line, V

) line and GND line with great care.

Also a low-withstand-voltage device may be destroyed when mounted in the wrong orientation, which
causes high-withstanding voltage to be applied to the device.

osc

= 3.6 k

osc

= 560 pF

ref A

RS A

RS B

FIN

PHASE A

EANBLE B

ENABLE A

PHASE B

STANDBY

FIN

ref AB

µF

SGND

RS A

0.66

Stepping
motor

0.66

RS B

SGND

5 V

µF

Ccp C

Ccp B

Ccp A

Ccp 2
0.01

µF

Ccp 1
0.22

µF

TORQUE

0 V

24 V

SGND

100

µF

5 V

0 V

5 V

0 V

5 V

0 V

5 V

0 V

5 V

0 V

5 V

PGND

ref B

TB62206FG

2005-03-02

· The information contained herein is subject to change without notice.

· The information contained herein is presented only as a guide for the applications of our products. No

responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of
TOSHIBA or others.

· TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor

devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical
stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of
safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of
such TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as
set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and
conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability
Handbook" etc..

· The TOSHIBA products listed in this document are intended for usage in general electronics applications

(computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances,
etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires
extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or
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document shall be made at the customer's own risk.

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· TOSHIBA products should not be embedded to the downstream products which are prohibited to be produced

and sold, under any law and regulations.

030619EBA

RESTRICTIONS ON PRODUCT USE

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TB62206FG

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TB62206FG