TOSHIBA

TB62726AN, TB62726AF

TOSHIBA Bi-CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC

T B 6 2 7 2 6 A N, T B 6 2 7 2 6 A F

16-bit constant current LED driver with operation supply of 3.3V to 5V

The TB62726A series are comprised of constant-current drivers
designed for LEDs and LED displays. The output current value can
be set using an external resistor. As a result, all outputs will have
virtually the same current levels. This driver incorporates 16-bit
constant-current outputs, a 16-bit shift register, a 16-bit latch and
16-bit AND-gate circuit. These drivers have been designed using
the Bi-CMOS process.

Feature

*Output current capability and the number of output:
90 mA x 16 outputs
*Constant current range : 2 to 90 mA
*Application output voltage :
0.7V (output current 2 to 80mA)
0.4V (output current 2 to 40mA)
*For anode common LED
*Input signal voltage level :
3.3V-5.0V CMOS level (schmitt trigger input)
*Power supply voltage range VDD=3.0 to 5.5V
*Muximum output terminal voltage 17V
*Serial and parallel data transfer rate 20 MHz (min., Cascade Connection)
*Operation temperature range topr = -40 to 85 degrees
*Package : AN type - - - P-SDIP-300-1.78

AF type - - - P-SSOP24-300-1.00B

*Current accuracy (not used dot-current correction.)

Output

Current accuracy

Output

voltage

between bits

between ICs

current

>= 0.4V
>= 0.7V

+/- 4 %

+/- 12 %

2 to 40 mA
2 to 90 mA

TB62726AN, TB62726AF (Ver.5) 2002, Nov. 20

page 1/16

TB62726AN

P-SDIP24-300-1.78

TB62726AF

P-SSOP24-300-1.00B

TOSHIBA

TB62726AN, TB62726AF

Package and pin layout ( Top view )

Warnings : Short-circuiting an output terminal to GND or to the power supply terminal may broken the device.
Please take care when wiring the output terminals, the power supply terminal and the GND terminals.

Block Diagram

Truth Table

CLOCK

LATCH

ENABLE

SERIAL-IN

OUT0 --- OUT7 --- OUT15

SERIAL-OUT

Positive edge

Dn --- Dn-7 --- Dn-15

Dn-15

Positive edge

Dn+1

No Change

Dn-14

Positive edge

Dn+2

Dn+2 --- Dn-5 --- Dn-13

Dn-13

Negative edge

Dn+3

Dn+2 --- Dn-5 --- Dn-13

Dn-13

Negative edge

Dn+3

Off

Dn-13

Note 1: OUT0~OUT15=ON when Dn=H ; OUT0~OUT15=OFF when Dn=L
In order to ensure that the level of the power supply voltage is correct, an external resistor have to
connected between R-EXT and GND.

TB62726AN, TB62726AF (Ver.5) 2002, Nov. 20

page 2/16

GND

SERIAL-IN

CLOCK

LATCH

OUT 0
OUT 1
OUT 2
OUT 3
OUT 4
OUT 5
OUT 6
OUT 7

VDD
R-EXT
SERIAL-OUT
ENABLE
OUT 15
OUT 14
OUT 13
OUT 12
OUT 11
OUT 10
OUT 9
OUT 8

R-EXT

ENABLE

LATCH

SERIAL-IN

CLOCK

OUT0

OUT1

OUT15

SERIAL-OUT

I-REG

ST D

D Q

TOSHIBA

TB62726AN, TB62726AF

Timing diagram

Warning :
Latch circuit is leveled-latch circuit. Be careful because it is not triggered-latch circuit.
Note 2 :
The latches circuit holds data by pulling the LATCH terminal Low. And, when LATCH terminal is a High-level, latch
circuit doesn't hold data, and it passes from theInput to the output. When ENABLE terminal is Low-level, output
terminal OUT0~OUT15 respond to the data, and on & off does.
And, when ENABLE terminal is a High-level, it offs with the output terminal regardless of the data.

TB62726AN, TB62726AF (Ver.5) 2002, Nov. 20

page 3/16

CLOCK

SERIAL-IN

LATCH

ENABLE

OUT0

OUT1

OUT3

OUT15

SERIAL-OUT

3.3v/5v
0V

3.3v/5v
0V
3.3v/5v
0V

On
Off

3.3v/5v
0V

n=0 1 2 3 4 5 6 7 8 9 101112131415

TOSHIBA

TB62726AN, TB62726AF

Terminal description

Pin No.

Pin Name

Function

GND

GND terminal for control logic

SERIAL-IN

Input terminal for serial data for data shift register

CLOCK

Input terminal for clock for data shift on rising edge

LATCH

Input terminal for data strobe When the LATCH=High-level, data is no latched. When

ithe LATCH=Low-level, data is latched.

5 ~ 20

OUT 0 ~ 15

Constant-current output terminals

ENABLE

Input terminal for output enable.

All outputs (OUT0 ~ OUT15 ) are turned off, when the ENABLE=High-level.

And are turned on, when the ENABLE=Low-level.

SERIAL-OUT Output terminal for serial data input on SERIAL-IN terminal

R-EXT

Input terminal used to connect an external resistor.

This regulated the output current.

VDD

3.3V - 5V supply voltage terminal.

Equivalent circuit of inputs and output

TB62726AN, TB62726AF (Ver.5) 2002, Nov. 20

page 4/16

ENABLE

VDD

GND

VDD

GND

LATCH

VDD

GND

CLOCK,

SERIAL - IN

VDD

GND

Internal data

SERIAL - OUT

1. ENABLE Terminal

2. LATCH Terminal

3. CLOCK,SERIAL-IN Terminal

4. SERIAL-OUT Terminal

R(UP)

R(DOWN)

GND

OUT 0 ~ 15

5. OUT0 ~ 15 Terminal

Parasitic Diode

200k

250k

TOSHIBA

TB62726AN, TB62726AF

Absolute maximum ratings

Characteristics

Symbol

Rating

Unit

Supply Voltage

Input Voltage

-0.2 to VDD+0.2

Output Current

OUT

+90

mA/ch

Output Voltage

OUT

-0.2 to 17

Power Dissipation

AN type : 1.25(Free air), 1.78(On PCB)

AF type : 0.83(Free air), 1.00(On PCB)

Thermal Resistance

th(j-a)

AN type : 104(Free air), 70(On PCB)

th(j-a)

AF type : 140(Free air), 120(On PCB)

degree/W

Operating Temperature

opr

-40 to 85

Storage Temperature

stg

-55 to 150

degree

Note 3: AN-type: Powers dissipation is derated by 14.28 mW/degree if device is mounted on PCB and
ambient temperature is above 25 degree.
FN-type: Powers dissipation is derated by 6.67 mW/degree if device is mounted on PCB and
ambient temperature is above 25 degrees.
With devide monuted on glass-epoxy PCB of less than 40% Cu and of dimensions
50mm x 50 mm x 1.6mm.

Recommended operating condition

( Topr = -40~85 degree, unless otherwise noted. )

Characteristics

Symbol

Condition

Min

Typ

Max

Unit

Supply Voltage

5.5

Output Voltage

OUT

(On)

0.7

Output Current

OUT

Each DC 1 Circuit

mA/ch

SERIAL-OUT

-1

Input Voltage

0.7VDD

VDD+0.15

-0.15

0.3xVDD

Clock Frequency

CLK

LATCH Pulse Width

w LATCH

CLOCK Pulse Width

w CLOCK

Cascade Connected

MHz

ENABLE Pulse Width

When the pulse of the Low

level is inputted to

the ENABLE terminal held

in the H level.

w ENABLE

Upper I

OUT

=20mA

2000

Lower I

OUT

=20 mA

3000

Setup Time

for CLOCK Terminal

SETUP

Hold Time

for CLOCK Terminal

HOLD

Setup Time

for /LATCH Terminal

SETUP

Note 4: When the pulse of the "L" level is inputted to the ENABLE terminal held in the "H" level.

TB62726AN, TB62726AF (Ver.5) 2002, Nov. 20

page 5/16

TOSHIBA

TB62726AN, TB62726AF

Electrical characteristics

( VDD=3V to 5.5V, Topr=25degree unless otherwise noted.)

Characteristics

Symbol

Condition

Min

Typ

Max

Unit

Supply voltage

Normal operation

3.0

5.5

Output current

OUT

=0.4V,V

=3.3V

OUT

=0.4V,V

=5V

EXT

490 ohm

31.96

36.20

40.54

31.59

35.90

40.20

OUT

=0.7V,V

=3.3V

OUT

=0.7V,V

=5V

EXT

250 ohm

63.63

72.30

80.97

62.75

71.30

79.95

Output current

error between bits

IOUT

OUT

=0.4V,

EXT

=490 ohm

IOUT

OUT

=0.4V,

EXT

=250 ohm

All output ON

+/-1

+/-4

Output leakage

Current Input voltage

OUT

=15V

�

Input voltage

0.7VDD

VDD

GND

0.3VDD

SOUT terminal

Voltage

=+1 mA, Vdd=3.3V

0.3

=+1 mA, Vdd=5V

0.3

=-1 mA, Vdd=3.3V

=+1 mA,Vdd=5V

4.7

Output current

supply voltage

regulation

%/V

When V

is changed 3V to 5.5V

-1

-5

%/V

Pull up resistor

(UP)

ENABLE terminal

Pull down resistor

(DOWN)

LATCH terminal

115

230

460

Supply current

DD(OFF)

EXT

=Open, V

OUT

=15V

0.1

0.5

DD(OFF)

2 R

EXT

=490ohm

DD(OFF)

3 R

EXT

=250ohm

All output OFF,

OUT

=15V

3.5

DD(ON)

EXT

=490ohm

All output ON,

OUT

=0.7V

Ta= -40degree,

Same as the avobe.

DD(ON)

EXT

=250ohm

All output ON,

OUT

=0.7V

= -40 degree,

Same as the avobe.

Ohm

TB62726AN, TB62726AF (Ver.5) 2002, Nov. 20

page 6/16

TOSHIBA

TB62726AN, TB62726AF

Switching characterictics

(Topr=25degree, unless otherwise noted )

Characteristics

Symbol

Condition

Min

Typ

Max

Unit

Propagation delay

pLH

CLK-OUTn, LATCH="H", ENABLE="L"

150

300

pLH

LATCH-OUTn, ENABLE="L"

140

300

pLH

ENABLE-OUTn, LATCH="H"

140

300

pLH

CLK-SERIALOUT

pHL

CLK-OUTn, LATCH="H", ENABLE="L"

170

340

pHL

LATCH-OUTn, ENABLE="L"

170

340

pHL

ENABLE-OUTn, LATCH="H"

170

340

pLH

CLK-SERIAL-OUT

Output rise time

Voltage waveform 10%~90%

150

Output fall time

Voltage waveform 90%~10%

150

Maximum CLK

rise time

Maximum CLK

fall time

When not on PCB

Condition : (Refer to test circuit)
Topr=25 degree, V

=3.3V and 5V, V

OUT

=0.7V, V

=0V,R

EXT

=490ohms, V

=3.0V, R

=60ohms,C

=10.5pF

Note 5 :
If the device is connected in a cascade and tr/tf for the waveform is large, it may not be possible to

achieve the

timing required for data transfer. Please consider the timings carefully.

Test circuit

TB62726AN, TB62726AF (Ver.5) 2002, Nov. 20

page 7/16

R-EXT

SERIAL-IN

LATCH

CLOCK

OUT0

OUT15

SERIAL-OUT

ENABLE

VDD

GND

ref

Function
Generator

=3.3V

=0V

= t

= 10ns

(10% to 90%)

Logic input waveform

TOSHIBA

TB62726AN, TB62726AF

Timing Waveform

TB62726AN, TB62726AF (Ver.5) 2002, Nov. 20

page 8/16

wCLK

pLH

/ t

pHL

50%

1. CLOCK ,SERIAL-IN, SERIAL-OUT

CLOCK

SERIAL-IN

SERIAL-OUT

2. CLOCK, SERIAL-IN , LATCH, ENABLE, OUTn

HOLD

50%

CLOCK

SERIAL-IN

LATCH

50%

w LAT

SETUP

ENABLE

50%

w ENA

SETUP

50%

OUTn

3. OUTn

90%

10%

OUTn

pLH

/ t

pHL

pLH

/ t

pHL

pLH

/ t

pHL

TOSHIBA

TB62726AN, TB62726AF

Output current vs duty (LEDs turn on rate)

TB62726AN, TB62726AF (Ver.5) 2002, Nov. 20

page 9/16

100

UTY

- Turn On Rate (%)

100

OUT

(mA)

TB62726AF

TB62726AN

IOUT - Duty On PCB

Topr=25 degree

=3.3~5.0 V, V

=1 V, T

=120 degree max

100

UTY

- Turn On Rate (%)

100

UTY

- Turn On Rate (%)

100

1000

10000

EXT

(ohm)

OUT

(mA)

Topr=+25(degree)

EXT

- I

OUT

opr

)

=0.7 V

IOUT - Duty On PCB

Topr=55 degree

=3.3~5.0 V, V

=1 V, T

=120 degree max

100

OUT

(mA)

TB62726AF

TB62726AN

IOUT - Duty On PCB

Topr=85 degree

=3.3~5.0 V, V

=1 V, T

=120 degree max

100

OUT

(mA)

TB62726AF

TB62726AN

Ambient Temperature Ta (degree)

- T

10 20

30 40 50 60 70 80 90

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

Power dissipation P

(W/IC)

1: AF(OnPCB)

2: AN(On PCB)

TOSHIBA

TB62726AN, TB62726AF

TB62726AN, TB62726AF (Ver.5) 2002, Nov. 20

page 10/16

Application circuit (example 1) : The general composition in static lighting of LED.

More than VLED(V) >= Vf(total max.) +0.7 is recommended with the following application circuit with the LED power supply VLED.

r1:The setup resistance for the setup of output current of e

very IC.

r2:The

variable resistance for the brightness control of e

very LED module.

S-IN

CLK

LAT

ENA

S-OUT

Out 15

SCAN

S-IN

S-OUT

VLED

C.U.

Example )

TD62M8600F : 8bit Multi-Chip PNP Tr-Array.

It is unnecessary at the time of static lighting.

r1=100 ohm(min)

16-BIT SIPO,Latches &

Constant Sink Current Drivers

TB62726A N/F

r1=100 ohm(min)

16-BIT SIPO,Latches &

Constant Sink Current Drivers

TB62726A N/F

CLK

LAT

ENA

Out 0

Out 15

Out 0

TOSHIBA

TB62726AN, TB62726AF

TB62726AN, TB62726AF (Ver.5) 2002, Nov. 20

page 11/16

Application circuit (example 2) :

When the condition of VLED is VLED > 17V.

The unnecessary voltage is one effective technique as to making the voltage descend with the zenor diode.

S-IN

CLK

LAT

ENA

S-OUT

SCAN

S-IN

CLK

LAT

ENA

S-OUT

VLED

Example )

TD62M8600F : 8bit Multi-Chip PNP Tr-Array.

It is unnecessary at the time of static lighting.

r1=100 ohm(min)

16-BIT SIPO,Latches &

Constant Sink Current Drivers

TB62726A N/F

16-BIT SIPO,Latches &

Constant Sink Current Drivers

TB62726A N/F

Out 15

Out 0

Out 15

Out 0

C.U.

TOSHIBA

TB62726AN, TB62726AF

TB62726AN, TB62726AF (Ver.5) 2002, Nov. 20

page 12/16

VLED=15V

S-IN

CLK

LAT

ENA

S-OUT

SCAN

S-IN

CLK

LAT

ENA

S-OUT

Example )

TD62M8600F : 8bit Multi-Chip PNP Tr-Array.

It is unnecessary at the time of static lighting.

r1=100 ohm(min)

Application circuit (example 3) :

When the condition of VLED is Vf+0.7<VLED<17V.

VOUT=VLED-Vf=0.7~1.0V is the most suitable for VOUT.

Surplus VOUT causes an IC fever and the useless consumption electric power.

It is the one way of being effective to build in the r3 in this problem.

r3 can make a calculation to the formula r3 (ohms) = surplus VOUT / IOUT.

Though the resistance parts increase, the fixed constant current performance is kept.

16-BIT SIPO,Latches &

Constant Sink Current Drivers

TB62726A N/F

16-BIT SIPO,Latches &

Constant Sink Current Drivers

TB62726A N/F

Out 15

Out 0

C.U.

TOSHIBA

TB62726AN, TB62726AF

Note:
Operating is likely to become unstable due to the electromagnetic guidance of wiring and so on.
Recommend that it adjoins it and it is arranged so far as device and LED are possible.
Damage by the over-voltage is likely to be suffered in LED and the output by over-voltage's occurring due to
the inductance between LEDs from the output terminal.
There is only one GND terminal in this device. When the inductance of the GND line,
resistance element, and so on are big, it is likely to operate
faultily by the GND noise when output switchings by the circuit board pattern and wiring.
And, it is necessary for the REXT terminal to connect it in the GND line which became stable through the
resistor.
Vibration is likely to occur for the output wave form when GND was unstable and capacity
(beyond 50pF) was added.
Therefore, be fully careful of the circuit board pattern layout and wiring from the controller.
This application circuit is a reference example, and it doesn't assure operating in all the conditions.
Be sure to carry out operating confirmation.
Thisdevice doesn't build in the protection circuit of over-voltage, over-current and over-temperature.
Carry it out on the control side when protection is necessary.
Device is likely to destroy it when it short-circuits between the output terminals to each power supply.
Be fully careful of output terminal, each power supply (VDD, VLED) and the design of the GND line.

TB62726AN, TB62726AF (Ver.5) 2002, Nov. 20

page 13/16

TOSHIBA

TB62726AN, TB62726AF

TB62726AN, TB62726AF (Ver.5) 2002, Nov. 20

page 16/16

The information contained herein is subject to change without notice.

The information contained herein is presented only as a guide for the applications of our

products. No responsibility is assumed by TOSHIBA for any infringements of patens or other
rights of the third parties which may result from its use. No license is granted by implication

or otherwise under any patent or patent rights of TOSHIBA or others.

TOSHIBA is continually working to improve the quality and the reliability of its products.
Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent
electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,

when utilizing TOSHIBA products, to observe standards of safety, and to avoid situations in

which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily
injury or damage to property.

In developing your designs, please ensure that TOSHIBA products are used within spacified
operating ranges as set forth in the most recent products spacifications. Also, please keep in

mind the precautions and conditions set forth in the TOSHIBA Semiconductor Reliability

Handbook.

The products described in the document may include products subject to foreign exchange

and foreign trade control laws.

Электронный компонент: TB62726AF