T E C H N I C A L I N F O R M A T I O N

TA1101B, Rev. 2.2, 08.17.00

Stereo 10W (4

) Class-TTM Digital Audio Amplifier using

Digital Power ProcessingTM Technology

TA1101B

September 2000

General Description

The TA1101B is a 10W continuous average two-channel Class-T Digital Audio Power
Amplifier IC using Tripath's proprietary Digital Power ProcessingTM technology. Class-T
amplifiers offer both the audio fidelity of Class-AB and the power efficiency of Class-D
amplifiers.

Applications

Computer/PC Multimedia

DVD Players

Cable Set-Top Products

Televisions

Video CD Players

Battery Powered Systems

Benefits

Fully integrated solution with FETs

Easier to design-in than Class-D

Reduced system cost with no heat sink

Dramatically improves efficiency versus
Class-AB

Signal fidelity equal to high quality linear
amplifiers

High dynamic range compatible with digital
media such as CD, DVD, and Internet audio

Features

Class-T architecture

Single Supply Operation

"Audiophile" Quality Sound

0.04% THD+N @ 9W, 4

0.18% IHF-IM @ 1W, 4

6W @ 8

, 0.1% THD+N

11W @ 4

, 0.1% THD+N

High Power

10W @ 8

, 10% THD+N

15W @ 4

, 10% THD+N

High Efficiency

88% @ 10W, 8

81% @ 15W, 4

Dynamic Range = 102 dB

Mute and Sleep inputs

Turn-on & turn-off pop suppression

Over-current protection

Over-temperature protection

Bridged outputs

30-pin Power SOP package

Typical Performance

THD+N (%)

Output Power (W)

THD+N versus Output Power

0.02

0.01

0.05

0.1

0.2

0.5

500m

= 4

= 8

VDD = 12V
f = 1kHz
Av = 12
BW = 22Hz - 22kHz

T E C H N I C A L I N F O R M A T I O N

TA1101B, Rev. 2.2, 08.17.00

Absolute Maximum Ratings

(Note 1)

SYMBOL PARAMETER

Value

UNITS

Supply Voltage

STORE

Storage Temperature Range

-40

�

to 150

�

Operating Free-air Temperature Range

�

to 70

�

DISS

Continuous Total Power Dissipation

Note 2

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: See Power Dissipation Derating in the Applications Information section.

Operating Conditions

(Note 3)

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNITS

Supply Voltage

8.5

13.2

High-level Input Voltage (MUTE, SLEEP)

3.5

Low-level Input Voltage (MUTE, SLEEP)

Note 3: Recommended Operating Conditions indicate conditions for which the device is functional. See
Electrical Characteristics for guaranteed specific performance limits.

Electrical Characteristics

See Test/Application Circuit. Unless otherwise specified, V

= 12V, f = 1kHz, Measurement

Bandwidth = 22kHz, R

= 4

, T

= 25

�

C, Package heat slug soldered to 2.8 square-inch PC pad.

SYMBOL PARAMETER

CONDITIONS MIN.

TYP.

MAX.

UNITS

Output Power
(Continuous Average/Channel)

THD+N = 0.1%

= 4

= 8

THD+N = 10%

= 4

= 8

5.5

16
10

W
W
W

DD,MUTE

Mute Supply Current

MUTE = V

5.5

DD, SLEEP

Sleep Supply Current

SLEEP = V

0.25

Quiescent Current

= 0 V

THD + N Total Harmonic Distortion Plus

Noise

= 9W/Channel

0.04

IHF-IM

IHF Intermodulation Distortion

19kHz, 20kHz, 1:1 (IHF)

0.18

0.5

SNR Signal-to-Noise

Ratio

A-Weighted, P

OUT

= 1W, R

= 8

Channel Separation

30kHz Bandwidth

PSRR

Power Supply Rejection Ratio

Vripple = 100mV.

Power Efficiency

OUT

= 10W/Channel, R

= 8

88 %

OFFSET

Output Offset Voltage

No Load, MUTE = Logic Low

150

High-level output voltage
(FAULT & OVERLOAD)

3.5

Low-level

output

voltage

(FAULT & OVERLOAD)

OUT

Output Noise Voltage

A-Weighted, input AC grounded

100

�

Note: Minimum and maximum limits are guaranteed but may not be 100% tested.

T E C H N I C A L I N F O R M A T I O N

TA1101B, Rev. 2.2, 08.17.00

Pin Description

Pin

Function

Description

1, 2

DCAP2, DCAP1

Charge pump switching pins. DCAP1 (pin 2) is a free running 300kHz square
wave between VDDA and DGND (12Vpp nominal). DCAP2 (pin 1) is level shifted
10 volts above DCAP1 (pin 2) with the same amplitude (12Vpp nominal),
frequency, and phase as DCAP1.

3, 8

V5D, V5A

Digital 5VDC, Analog 5VDC

4, 7,

AGND1, AGND2,

AGND3

Analog Ground

REF

Internal reference voltage; approximately 1.0 VDC.

OVERLOADB

A logic low output indicates the input signal has overloaded the amplifier.

9, 12

VP1, VP2

Input stage output pins.

10, 13

IN1, IN2

Single-ended inputs. Inputs are a "virtual" ground of an inverting opamp with
approximately 2.4VDC bias.

MUTE

When set to logic high, both amplifiers are muted and in idle mode. When low
(grounded), both amplifiers are fully operational. If left floating, the device stays in
the mute mode. Ground if not used.

BIASCAP

Input stage bias voltage (approximately 2.4VDC).

SLEEP

When set to logic high, device goes into low power mode. If not used, this pin
should be grounded

FAULT

A logic high output indicates thermal overload, or an output is shorted to ground,
or another output.

18, 28

PGND2, PGND1

Power Grounds (high current)

19 DGND

Digital

Ground

20, 22;

25, 23

OUTP2 & OUTM2;

OUTP1 & OUTM1

Bridged outputs

21, 24

VDD2, VDD1

Supply pins for high current H-bridges, nominally 12VDC.

26 NC

Not

connected

27 VDDA

Analog

12VDC

CPUMP

Charge pump output (nominally 10V above VDDA)

5VGEN

Regulated 5VDC source used to supply power to the input section (pins 3 and 8).

5VGEN

SLEEP

FAULT

PGND2

DGND

OUTP2

VDD2

OUTM2

OUTM1

VDD1

OUTP1

VDDA

PGND1

CPUMP

DCAP2

AGND3

BIASCAP

IN2

VP2

MUTE

IN1

VP1

V5A

AGND2

OVERLOADB

REF

AGND1

V5D

DCAP1

30-pin Power SOP Package

(Top View)

T E C H N I C A L I N F O R M A T I O N

TA1101B, Rev. 2.2, 08.17.00

TA1101B

or *8

MUTE

FAULT
OVERLOADB

(+12V)

2.2uF

VP1

VP2

IN1

IN2

OUTP1

OUTM1

OUTP2

OUTM2

VDDA

5VGEN

BIASCAP

DCAP2

DCAP1

2.2uF

0.1uF

CPUMP

20K

1/2W

0.47uF

1uF

SLEEP

+12V

0.1uF

REF

8.25K

, 1%

1meg

All Diodes Motorola MBRS130T3

* Use C

= 0.22

�

F for 8 Ohm loads

VDD1

PGND1

VDD1

PGND1

VDD2

PGND2

Note: Analog and Digital/Power Grounds must
be connected locally at the TA1101B

0.1uF

To Pin 30

V5D

AGND1

AGND2

V5A

0.1uF

DGND

VDD1

PGND2

PGND1

180uF, 16V

VDD2

VDD

Processing

Modulation

Processing

Modulation

0.47uF

10uH, 2A

(Pin 7)

Analog Ground

Digital/Power Ground

(Pin 28)

(Pin 18)

To Pin 3,8

20K

(Pin 7)

20K

AGND3

180uF, 16V

0.47uF

10uH, 2A

or *8

10uH, 2A

0.47uF

0.1uF

(Pin 28)

(Pin 18)

T E C H N I C A L I N F O R M A T I O N

TA1101B, Rev. 2.2, 08.17.00

External Components Description

(Refer to the Application/Test Circuit)

Components Description
R

Inverting Input Resistance to provide AC gain in conjunction with R

. This input is biased at

the BIASCAP voltage (approximately 2.4VDC).

Feedback resistor to set AC gain in conjunction with R

;

)

(

. Please refer to the

Amplifier Gain paragraph in the Application Information section.

AC input coupling capacitor which, in conjunction with R

, forms a highpass filter at

)

(

REF

Bias resistor. Locate close to pin 5 and ground at pin 7.

BIASCAP decoupling capacitor. Should be located close to pin 14.

Charge pump input capacitor. This capacitor should be connected directly between pins 1
and 2 and located physically close to the TA1101B.

Charge pump output capacitor that enables efficient high side gate drive for the internal H-
bridges. To maximize performance, this capacitor should be connected directly between
pin 29 (CPUMP) and pin 27 (VDDA). Please observe the polarity shown in the Application/
Test Circuit.

Supply decoupling for the low current power supply pins. For optimum performance, these
components should be located close to the pin and returned to their respective ground as
shown in the Application/Test Circuit.

Supply decoupling for the high current, high frequency H-Bridge supply pins. These
components must be located as close to the device as possible to minimize supply
overshoot and maximize device reliability. Both the high frequency bypassing (0.1uF) and
bulk capacitor (180uF) should have good high frequency performance including low ESR
and low ESL. Panasonic HFQ or FC capacitors are ideal for the bulk capacitor.

Zobel Capacitor.

Zobel resistor, which in conjunction with C

, terminates the output filter at high frequencies.

The combination of R

and C

minimizes peaking of the output filter under both no load

conditions or with real world loads, including loudspeakers which usually exhibit a rising
impedance with frequency.

Schottky diodes that minimize undershoots of the outputs with respect to power ground
during switching transitions. For maximum effectiveness, these diodes must be located
close to the output pins and returned to their respective PGND. Please see
Application/Test Circuit for ground return pin.

Output inductor, which in conjunction with C

, demodulates (filters) the switching waveform

into an audio signal. Forms a second order filter with a cutoff frequency of

)

(

and a quality factor of

Output capacitor.

Common Mode Capacitor.

T E C H N I C A L I N F O R M A T I O N

TA1101B, Rev. 2.2, 08.17.00

Typical Performance Characteristics

Channel Separation versus Frequency

Frequency (Hz)

Channel Separation (dBr)

VDD = 12V
Pout = 1W/Channel
RLoad = 4

Av = 12
BW = 22Hz - 22kHz

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

20k

100

200

500

10k

THD+N (%)

Frequency (Hz)

THD+N versus Frequency

20k

100

200

500

10k

VDD = 12V
Pout = 5W/Channel
Av = 12
BW = 22Hz - 22kHz

0.01

0.02

0.05

0.1

0.2

0.5

= 4

= 8

Intermodulation Performance

Frequency (Hz)

FFT (dBr)

30k

10k

20k

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

VDD = 12V
Pout = 1W/Channel
RLoad = 4

0dBr = 12Vrms
19kHz, 20kHz, 1:1
Av = 11.7
BW = 10Hz - 80kHz

Output Amplitude (dBr)

Frequency (Hz)

Frequency Response

VDD = 12V
Pout = 1W
RLoad = 4

Av = 12
BW = 22Hz - 22kHz

-2

-1.5

-1

-0.5

+0.5

+1.5

+2.5

-2.5

-3

20k

100

200

500

10k

= 4

= 8

Efficiency versus Output Power

Output Power (W)

Efficiency (%)

VDD = 12V
f = 1kHz
Av = 12
THD+N < 10%

100

Noise Floor

Frequency (Hz)

Noise FFT (dBV)

-140

-120

-100

-80

-60

-40

-20

20k

100

200

500

10k

VDD = 12V
Pout = 0W
RLoad = 4

Av = 12
BW = 22Hz - 22kHz
A-Weighted Filter

T E C H N I C A L I N F O R M A T I O N

TA1101B, Rev. 2.2, 08.17.00

Application Information

Layout Recommendations

The TA1101B is a power (high current) amplifier that operates at relatively high switching frequencies. The
outputs of the amplifier switch between the supply voltage and ground at high speeds while driving high
currents. This high-frequency digital signal is passed through an LC low-pass filter to recover the amplified
audio signal. Since the amplifier must drive the inductive LC output filter and speaker loads, the amplifier
outputs can be pulled above the supply voltage and below ground by the energy in the output inductance.
To avoid subjecting the TA1101B to potentially damaging voltage stress, it is critical to have a good printed
circuit board layout. It is recommended that Tripath's layout and application circuit be used for all
applications and only be deviated from after careful analysis of the effects of any changes.

The figure below is the Tripath TA1101B evaluation board. Some of the most critical components on the
board are the power supply decoupling capacitors. C7 and C18 must be placed right next to pins 24 and
28 as shown. C8 and C19 must be placed right next to pins 21 and 18 as shown. These power supply
decoupling capacitors from the output stage not only help reject power supply noise, but they also absorb
voltage spikes on the VDD pins caused by overshoots of the outputs of the amplifiers. Output overshoots
include those caused by output inductor flyback during high current switching events such as shorted
outputs or driving low impedances at high levels. If the supply capacitors are not close enough to the
pins, electrical overstress to the part can occur from the voltage spikes on the VDD pins. This may result
in permanent damage or destruction to the TA1101B.

The copper slug of the TA1101B must be soldered onto the PC board. This board uses a 5 x 16 array of
0.013" vias on the copper below the TA1101 that allow the heat to conduct to 4 sq. in. of copper on the
bottom side ground plane of the PC board.

T E C H N I C A L I N F O R M A T I O N

TA1101B, Rev. 2.2, 08.17.00

Amplifier Gain

The gain of the TA1101B is set by the ratio of two external resistors, R

and R

, and is given by the

following formula:

where V

is the input signal level and V

is the differential output signal level across the speaker.

9 Watts of RMS output power results from an 8.485V RMS signal across an 8

speaker load. If

= R

, then 9 Watts will be achieved with 0.707V RMS of input signal.

)

(

)

(

485

RMS

Protection Circuits

The TA1101B is guarded against over-temperature and over-current conditions. When the device goes
into an over-temperature or over-current state, the FAULT pin goes to a logic HIGH state indicating a fault
condition. When this occurs, the amplifier is muted, all outputs are TRI-STATED, and will float to 1/2 of
V

Over-temperature Protection

An over-temperature fault occurs if the junction temperature of the part exceeds approximately 155

�

The thermal hysteresis of the part is approximately 45

�

C, therefore the fault will automatically clear when

the junction temperature drops below 110

�

Over-current Protection

An over-current fault occurs if more than approximately 7 amps of current flows from any of the amplifier
output pins. This can occur if the speaker wires are shorted together or if one side of the speaker is
shorted to ground. An over-current fault sets an internal latch that can only be cleared if the MUTE pin is
toggled or if the part is powered down. Alternately, if the MUTE pin is connected to the FAULT pin, the
HIGH output of the FAULT pin will toggle the MUTE pin and automatically reset the fault condition.

Overload

The OVERLOADB pin is a 5V logic output. When low, it indicates that the level of the input signal has
overloaded the amplifier resulting in increased distortion at the output. The OVERLOADB signal can be
used to control a distortion indicator light or LED through a simple buffer circuit, as the OVERLOADB
cannot drive an LED directly.

T E C H N I C A L I N F O R M A T I O N

TA1101B, Rev. 2.2, 08.17.00

Sleep Pin

The SLEEP pin is a 5V logic input that when pulled high (>3.5V) puts the part into a low quiescent current
mode. This pin is internally clamped by a zener diode to approximately 6V thus allowing the pin to be
pulled up through a large valued resistor (1M

recommended) to V

. To disable SLEEP mode, the sleep

pin should be grounded.

Fault Pin

The FAULT pin is a 5V logic output that indicates various fault conditions within the device. These
conditions include: low supply voltage, low charge pump voltage, low 5V regulator voltage, over current at
any output, and junction temperature greater than approximately 155

�

C. All faults except overcurrent all

reset upon removal of the condition. The FAULT output is capable of directly driving an LED through a
series 200

resistor. If the FAULT pin is connected directly to the MUTE input an automatic reset will

occur in the event of an over-current condition.

Power Dissipation Derating

For operating at ambient temperatures above 25

�

C the device must be derated based on a 150

�

maximum junction temperature, T

JMAX

as given by the following equation:

JMAX

DISS

)

(

Where

of the package is determined from the following graph:

In the above graph Copper Area is the size of the copper pad on the PC board to which the heat slug of
the TA1101B is soldered. The heat slug must be soldered to the PCB to increase the maximum power
dissipation capability of the TA1101B package. Soldering will minimize the likelihood of an over-
temperature fault occurring during continuous heavy load conditions. The vias used for connecting the
heatslug to the copper area on the PCB should be 0.013" diameter.

vs Copper Area

Copper Area (square inches)

(

C/W)

Pdiss - 1.35W
Pdiss - 2W
Pdiss - 3.4W

T E C H N I C A L I N F O R M A T I O N

TA1101B, Rev. 2.2, 08.17.00

Performance Measurements of the TA1101B

The TA1101B operates by generating a high frequency switching signal based on the audio input.

This

signal is sent through a low-pass filter (external to the Tripath amplifier) that recovers an amplified version
of the audio input

The frequency of the switching pattern is spread spectrum and typically varies between

100kHz and 1.0MHz, which is well above the 20Hz � 20kHz audio band. The pattern itself does not alter
or distort the audio input signal but it does introduce some inaudible components.

The measurements of certain performance parameters, particularly noise related specifications such as
THD+N, are significantly affected by the design of the low-pass filter used on the output as well as the
bandwidth setting of the measurement instrument used. Unless the filter has a very sharp roll-off just
beyond the audio band or the bandwidth of the measurement instrument is limited, some of the inaudible
noise components introduced by the Tripath amplifier switching pattern will degrade the measurement.

One feature of the TA1101B is that it does not require large multi-pole filters to achieve excellent
performance in listening tests, usually a more critical factor than performance measurements. Though
using a multi-pole filter may remove high-frequency noise and improve THD+N type measurements (when
they are made with wide-bandwidth measuring equipment), these same filters degrade frequency
response. The TA1101B Evaluation Board uses the Test/Application Circuit in this data sheet, which has a
simple two-pole output filter and excellent performance in listening tests. Measurements in this data sheet
were taken using this same circuit with a limited bandwidth setting in the measurement instrument.

T E C H N I C A L I N F O R M A T I O N

TA1101B, Rev. 2.2, 08.17.00

Package Dimensions

Dimension Min.

Nom.

Max.

b 0.35 --- 0.48
c 0.23 --- 0.32

D 15.80

15.90

16.00

D1 12.60 --- 13.00
D2 --- --- 1.10

E 13.90

14.20

14.50

E1 10.90

11.00

11.10

E2 --- --- 2.90
E3 5.80 --- 6.20

0.80

BSC.

0.25

BSC.

L 0.70 --- 1.00

Note: All dimensions are in millimeters.

Tripath, Class T, Combinant Digital, DPP and Digital Power Processing are trademarks of Tripath
Technology Inc. Other trademarks referenced in this document are owned by their respective companies

Tripath Technology Inc. reserves the right to make changes without further notice to any products herein to
improve reliability, function or design. Tripath does not assume any liability arising out of the application or
use of any product or circuit described herein; neither does it convey any license under its patent rights,
nor the rights of others.

TRIPATH'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE
SUPPORT DEVICES OR SYSTEMS WITOUT THE EXPRESS WRITTEN CONSENT OF THE
PRESIDENT OF TRIPATH TECHNOLOGY INC. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant

into the body, or (b) support or sustain life, and whose failure to perform, when properly used in
accordance with instructions for use provided in this labeling, can be reasonably expected to result in
significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can

be reasonably expected to cause the failure of the life support device or system, or to affect its safety
or effectiveness.

For more information on Tripath products, visit our web site at:

www.tripath.com

TRIPATH TECHNOLOGY, INC.
3900 Freedom Circle
Santa Clara, California 95054
408-567-3000

Электронный компонент: TA1101B