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Электронный компонент: TGA2512

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TriQuint Semiconductor Texas: Phone (972)994-8465 Fax (972)994-8504 Email: Info-mmw@tqs.com Web: www.triquint.com
Advance Product Information
July 14, 2005
1
-40
-30
-20
-10
0
10
20
30
40
5
6
7
8
9
10
11
12
13
14
15
Frequency (GHz)
S-
Pa
r
a
m
e
t
e
r (
d
B
)
X-Band Low Noise Amplifier TGA2512
Key Features
Typical Frequency Range: 5 - 15 GHz
1.4 dB Nominal Noise Figure
27 dB Nominal Gain
Bias: 5 V, 160 mA Gate Bias
5 V, 90 mA Self Bias
0.15 um 3MI pHEMT Technology
Chip Dimensions 2.05 x 1.20 x 0.10 mm
(0.081 x 0.047 x 0.004 in)
Primary Applications
X-Band Radar
EW, ECM
Point-to-Point Radio
Measured Fixtured Data
Bias Conditions: Gate Bias Vd = 5 V, Id = 160 mA
IRL
GAIN
ORL
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5
6
7
8
9
10
11
12
13
14
15
Frequency (GHz)
N
o
i
s
e
Fi
gu
re
(
d
B
)
Product Description
The TriQuint TGA2512 is a wideband LNA with
AGC amplifier for EW, ECM, and RADAR
receiver or driver amplifier applications.
Offering high gain 27dB typical from 5-15GHz,
the TGA2512 provides excellent noise
performance with typical midband NF 1.4dB,
while the balanced topology offers good return
loss typically 15dB.
The TGA2512 is designed for maximum ease
of use. The large input FETs can handle up to
21dBm input power reliably, while the build-in
gain control provides 15dB of typical gain
control range. The part is also assembled in
self-biased mode, using a single +5V supply
connection from either side of the chip, or in
gate biased mode, allowing the user to control
the current for a particular applications.
In self-biased mode the TGA2512 offers 6dBm
typical P1dB, while in gate-biased mode the
typical P1dB is over 13dBm. The small size of
2.46mm
2
allows ease of compaction into Multi-
Chip-Modules (MCMs).
The TGA2512 is 100% DC and RF tested on-
wafer to ensure performance compliance.
Lead-Free & RoHS compliant.
Note: Devices is early in the characterization process prior to finalizing all electrical specifications. Specifications are subject to change
without notice
TriQuint Semiconductor Texas: Phone (972)994-8465 Fax (972)994-8504 Email: Info-mmw@tqs.com Web: www.triquint.com
Advance Product Information
July 14, 2005
2
TABLE I
MAXIMUM RATINGS 1/
SYMBOL
PARAMETER
VALUE
NOTES
Vd
Drain Voltage
[3.5 + (0.0125)(Id)] V
2/ 3/
Vg
Gate Voltage Range
-1 TO +0.5 V
Id
Drain Current (gate biased)
240 mA
2/ 4/
Ig
Gate Current
7.04 mA
4/
P
IN
Input Continuous Wave Power
21 dBm
P
D
Power Dissipation
See Note 5/
2/
T
CH
Operating Channel Temperature
117
0
C
6/ 7/
T
M
Mounting Temperature (30 Seconds)
320
0
C
T
STG
Storage Temperature
-65 to 150
0
C
1/
These ratings represent the maximum operable values for this device.
2/
Combinations of supply voltage, supply current, input power, and output power shall not exceed
P
D
.
3/
Unit for Id is A
4/
Total current for the entire MMIC.
5/
For a median life time of 1E+6 hrs, Power dissipation is limited to:
P
D
(max) = (117
0
C T
BASE
0
C) /
JC
(
0
C/W)
Where T
BASE
is the base plate temperature.
JC
for self bias is 35.5
0
C/W
JC
for gate bias is 35.0
0
C/W
6/
Junction operating temperature will directly affect the device median time to failure (MTTF). For
maximum life, it is recommended that junction temperatures be maintained at the lowest possibl
levels.
7/
These ratings apply to each individual FET.
TGA2512
TABLE II
DC PROBE TESTS
(Ta = 25
0
C, Nominal)
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNITS
V
BVGS, Q1
Breakdown Voltage Gate-
Source
-30
-5
V
V
P, Q1,2,4,5,6
Pinch-Off Voltage
-0.7
-0.1
V
Q1, Q4, Q5 are 400 um FETs. Q2, Q6 are 300 um FETs.
TriQuint Semiconductor Texas: Phone (972)994-8465 Fax (972)994-8504 Email: Info-mmw@tqs.com Web: www.triquint.com
Advance Product Information
July 14, 2005
3
TABLE III
ELECTRICAL CHARACTERISTICS
(Ta = 25
0
C Nominal)
TGA2512
PARAMETER
Gate Bias
Self Bias
UNITS
Frequency Range
5 - 15
5 - 15
GHz
Drain Voltage, Vd
5.0
5.0
V
Drain Current, Id
160
90
mA
Gate Voltage, Vg
-0.1
-
V
Small Signal Gain, S21
27
24
dB
Input Return Loss, S11
15
15
dB
Output Return Loss, S22
20
20
dB
Noise Figure, NF
1.4
1.4
dB
Output Power @ 1dB Gain Compression, P1dB
13
6
dBm
OIP3
24
16
dBm
TABLE IV
THERMAL INFORMATION
PARAMETER
TEST CONDITIONS
T
CH
(
O
C)
T
JC
(
q
C/W)
T
M
(HRS)
T
JC
Thermal Resistance
(channel to Case)
Vd = 5 V
Id = 160 mA Gate Bias
Pdiss = 0.80 W
100
37.6
5.8E+6
T
JC
Thermal Resistance
(channel to Case)
Vd = 5 V
Id = 90 mA Self Bias
Pdiss = 0.45 W
82.7
28.2
4.1E+7
Note: Assumes eutectic attach using 1.5 mil 80/20 AuSn mounted to a 20 mil CuMo
Carrier at 70
o
C baseplate temperature. Worst case condition with no RF applied, 100%
of DC power is dissipated.
TriQuint Semiconductor Texas: Phone (972)994-8465 Fax (972)994-8504 Email: Info-mmw@tqs.com Web: www.triquint.com
Advance Product Information
July 14, 2005
4
TGA2512
Measured Fixtured Data
Bias Conditions: Gate Bias Vd = 5 V, Id = 160 mA
14
16
18
20
22
24
26
28
30
32
34
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Frequency (GHz)
Ga
i
n
(
d
B
)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Frequency (GHz)
Noi
s
e

Fi
g
u
r
e
(dB)
TriQuint Semiconductor Texas: Phone (972)994-8465 Fax (972)994-8504 Email: Info-mmw@tqs.com Web: www.triquint.com
Advance Product Information
July 14, 2005
5
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Frequency (GHz)
Inpu
t
R
e
tur
n
Loss
(dB
)
TGA2512
Measured Fixtured Data
Bias Conditions: Gate Bias Vd = 5 V, Id = 160 mA
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Frequency (GHz)
O
u
tp
ut R
e
t
u
rn
L
o
ss
(dB
)
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Advance Product Information
July 14, 2005
6
TGA2512
Measured Fixtured Data
Bias Conditions: Gate Bias Vd = 5 V, Id = 160 mA
0
2
4
6
8
10
12
14
16
6
7
8
9
10
11
12
13
14
15
16
Frequency (GHz)
P
1
d
B (
d
Bm
)
8
10
12
14
16
18
20
22
24
26
28
6
7
8
9
10
11
12
13
Frequency (GHz)
OI
P
3
(
d
B
m
)
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Advance Product Information
July 14, 2005
7
0
5
10
15
20
25
30
35
2
4
6
8
10
12
14
16
18
20
Frequency (GHz)
G
a
in
O
ver
T
e
m
p
er
atu
r
e
(d
B
)
-40C
+25C
+70C
TGA2512
Measured Fixtured Data
Bias Conditions: Gate Bias Vd = 5 V, Id = 160 mA Over Temperature
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Advance Product Information
July 14, 2005
8
TGA2512
Measured Fixtured Data
Bias Conditions: Self Bias Vd = 5 V, Id = 90 mA
14
16
18
20
22
24
26
28
30
32
34
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Frequency (GHz)
G
a
in (
d
B
)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Frequency (GHz)
Noi
s
e
Fi
g
u
r
e
(
d
B)
TriQuint Semiconductor Texas: Phone (972)994-8465 Fax (972)994-8504 Email: Info-mmw@tqs.com Web: www.triquint.com
Advance Product Information
July 14, 2005
9
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Frequency (GHz)
Inp
ut
R
e
tu
r
n
Lo
s
s
(
d
B
)
TGA2512
Measured Fixtured Data
Bias Conditions: Self Bias Vd = 5 V, Id = 90 mA
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Frequency (GHz)
O
u
tp
u
t
R
e
tu
r
n
L
o
ss (d
B
)
TriQuint Semiconductor Texas: Phone (972)994-8465 Fax (972)994-8504 Email: Info-mmw@tqs.com Web: www.triquint.com
Advance Product Information
July 14, 2005
10
TGA2512
Measured Fixtured Data
Bias Conditions: Self Bias Vd = 5 V, Id = 90 mA
0
2
4
6
8
10
12
14
16
6
7
8
9
10
11
12
13
14
15
16
Frequency (GHz)
P
1
dB
(dB
m
)
8
10
12
14
16
18
20
22
24
26
28
6
7
8
9
10
11
12
13
Frequency (GHz)
O
I
P3 (dB
m
)
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Advance Product Information
July 14, 2005
11
TGA2512
Measured Fixtured Data
Bias Conditions: Self Bias Vd = 5 V, Id = 90 mA Over Temperature
0
5
10
15
20
25
30
2
4
6
8
10
12
14
16
18
20
Frequency (GHz)
G
a
i
n
Ov
er
T
e
m
p
e
r
at
u
r
e
(
d
B)
-40C
+25C
+70C
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July 14, 2005
12
0
5
10
15
20
25
30
2
4
6
8
10
12
14
16
18
Frequency (GHz)
Gain
(d
B
)
Vctrl=0 v
Vctrl=3V
Vctrl=3.2V
Vctrl=3.5V
Vctrl=4 V
Vctrl=5 V
Vctrl=6V
TGA2512
Measured Fixtured Data
Self Biased variation over Vctrl
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
2
4
6
8
10
12
14
16
18
Frequency (GHz)
N
o
i
se F
i
gu
r
e
(
d
B
)
Vctrl=0V
Vctrl=2V
Vctrl=2.25V
Vctrl=2.5V
Vctrl=2.75V
Vctrl=3V
Vctrl=3.5V
Vctrl=4V
Vctrl=5V
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13
Mechanical Drawing
TGA2512
GaAs MMIC devices are susceptible to damage from Electrostatic Discharge. Proper precautions should
be observed during handling, assembly and test.
0
0
1.086
(0.043)
1.327
(0.052)
1.675
(0.060)
1.955
(0.077)
2.050
(0.081)
0.145
(0.006)
1.105
(0.044)
1.755
(0.069)
1.327
(0.052)
1.086
(0.043)
0.095
(0.004)
1.200
(0.047)
0.145
(0.006)
0.095
(0.004)
Units: millimeters (inches)
Thickness: 0.100 (0.004)
Chip edge to bond pad dimensions are shown to center of bond pad
Chip size tolerance: +/- 0.051 (0.002)
GND is back side of MMIC
Bond pad #1
Bond pad #2, 3, 8, 12, 13
Bond pad #4, 11
Bond pad #5, 10
Bond pad #6, 9
(RF In)
(Vs)
(Vg)
(Vctrl)
(Vd)
0.100 x 0.200
0.100 x 0.100
0.100 x 0.100
0.100 x 0.100
0.100 x 0.100
(0.004 x 0.008)
(0.004 x 0.004)
(0.004 x 0.004)
(0.004 x 0.004)
(0.004 x 0.004)
6
7
8
9
10
11
12
13
(0.004 x 0.008)
Bond pad #7
(RF Out)
0.100 x 0.200
N
E
R
C
R
C
B
B
0.642
(0.025)
0.914
(0.036)
0.642
(0.025)
0.914
(0.036)
1.815
(0.072)
1
2
3
4
5
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14
Recommended Chip Assembly Diagram
TGA2512
GaAs MMIC devices are susceptible to damage from Electrostatic Discharge. Proper precautions should
be observed during handling, assembly and test.
Option 1: Self Bias - No Gain Control
All DC connections may be brought in from either side of the chip (Use Pad 6 or 9)
0.01uF external Cap is recommended on Drain
Bias: Vd = 5V (Id = ~90mA)
100pF
RF In
RF Out
Vd
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TGA2512
Option 2: Self Bias - With Gain Control
Recommended Chip Assembly Diagram (Con't)
All DC connections may be brought in from either side of the chip (Use Pad 5 or 10, and Pad 6 or 9)
0.01uF external Caps are recommended on Drain line
Bias: Vd = 5V (Id = ~90mA), Vctrl = 0 to +5V for Gain adjustment
100pF 100pF
Vctrl
Vd
RF In
RF Out
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TGA2512
Option 3: Gate Bias - With Gain Control
Recommended Chip Assembly Diagram (Con't)
All DC connections may be brought in from either side of the chip (Use Pad 4 or 11, Pad 5 or 10, and Pad 6 or 9)
0.01uF external Caps are recommended on Drain, Gate line, 10 ohm external
series R between 100pF cap and 0.01uF cap is recommended for Gate line
Source connections (Pad 2, 3, 8, 12, 13) are bonded to ground
Bias: Vd = 5V , Vctrl = 0 to +5V for Gain adjustment
Vg = Range, -0.5 to 0, typically ~ -0.1 will provide ~160mA of Id.
Vctrl
Vd
100pF 100pF 100pF
Vg
RF In
RF Out
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July 14, 2005
17
TGA2512
Equivalent DC schematic
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18
Assembly Process Notes
GaAs MMIC devices are susceptible to damage from Electrostatic Discharge. Proper precautions should
be observed during handling, assembly and test.
TGA2512
Reflow process assembly notes:
Use AuSn (80/20) solder with limited exposure to temperatures at or above 300
0
C (30 seconds max).
An alloy station or conveyor furnace with reducing atmosphere should be used.
No fluxes should be utilized.
Coefficient of thermal expansion matching is critical for long-term reliability.
Devices must be stored in a dry nitrogen atmosphere.
Component placement and adhesive attachment assembly notes:
Vacuum pencils and/or vacuum collets are the preferred method of pick up.
Air bridges must be avoided during placement.
The force impact is critical during auto placement.
Organic attachment can be used in low-power applications.
Curing should be done in a convection oven; proper exhaust is a safety concern.
Microwave or radiant curing should not be used because of differential heating.
Coefficient of thermal expansion matching is critical.
Interconnect process assembly notes:
Thermosonic ball bonding is the preferred interconnect technique.
Force, time, and ultrasonics are critical parameters.
Aluminum wire should not be used.
Maximum stage temperature is 200
0
C.