Advanced Information
TQPHT
0.5 um pHEMT Foundry Service
Features
D-Mode, -0.8 V Vp
InGaAs Active Layer pHEMT
Process
0.5 um Optical Lithography
Gates
20 V D-G Breakdown Voltage
High Density Interconnects:
2 Global
1 Local
High-Q Passives
Thin Film Resistors
High Value Capacitors
Backside Vias Optional
Based on Production 0.25 m
pHEMT and Passives Processes
TOM3 FET Models Available
Q4'02
Applications
Highly Efficient and Linear
Power Amplifiers
Low Loss Switches for Wireless
Transceivers and Basestations
High Supply Voltage Applica-
tions
Integrated RF Front Ends
LNA, SW, PA
General Description
TriQuint's 0.5 m pHEMT process is based on our production
released 0.25 m gate process. TQPHT substitutes lower cost
optical lithography in place of e-beam and adds TriQuint's
unique thick metal scheme. This process is targeted for high
gain amplifiers and high linearity and low loss in RF switch appli-
cations. The TQPHT process offers a D-Mode pHEMT with
a 0.8 V pinch off. The three metal interconnecting layers are
encapsulated in a high performance dielectric that allows wiring
flexibility, optimized die size and plastic packaging simplicity.
Precision NiCr resistors and high value MIM capacitors are in-
cluded allowing higher levels of integration, while maintaining
smaller, cost effective die sizes.
Semiconductors for Communications
www.triquint.com
TriQuint Semiconductor
2300 NE Brookwood Pkwy
Hillsboro, Oregon 97124
Phone: 503-615-9000
Fax: 503-615-8905
Email: info@triquint.com
Page 1 of 2; Rev 0.10 8/12/02
Isolation Implant
Pseudomorphic
Channel
N+
Metal 2 - 4um
Metal 1
Metal 2
Dielectric
Metal 1 - 2um
Dielectric
Dielectric
Metal 0
Nitride
Isolation Implant
Metal 1
MIM Metal
NiCr
pHEMT
NiCr Resistor
MIM Capacitor
Semi-Insulating GaAs Substrate
Isolation Implant
Pseudomorphic
Channel
N+
Metal 2 - 4um
Metal 1
Metal 2
Dielectric
Metal 1 - 2um
Dielectric
Dielectric
Metal 0
Nitride
Isolation Implant
Metal 1
MIM Metal
Isolation Implant
Pseudomorphic
Channel
N+
Metal 2 - 4um
Metal 1
Metal 2
Dielectric
Metal 1 - 2um
Dielectric
Dielectric
Metal 0
Nitride
Isolation Implant
Metal 1
MIM Metal
NiCr
pHEMT
NiCr Resistor
MIM Capacitor
Semi-Insulating GaAs Substrate
0.5 um pHEMT Device Cross-Section
Target Pre-Production
Release Date:
Q3, 2002
Advanced Information
TQPHT
0.5 um pHEMT Foundry Service
Semiconductors for Communications
www.triquint.com
TriQuint Semiconductor
2300 NE Brookwood Pkwy
Hillsboro, Oregon 97124
Phone: 503-615-9000
Fax: 503-615-8905
Email: info@triquint.com
Page 2 of 2; Rev 0.10 8/12/02
-0.8V Vp, D-Mode Target Process Details
Element
Parameter
Value
Units
D-Mode pHEMT
Vp
-0.8
V
Idss
200
mA/mm
Imax
400
mA/mm
Gm
350
mS/mm
Breakdown, Vdg
17
V
Ft @ Idss
25
GHz
Common Process Element Details
Gate Length
0.5
m
Interconnect
3
Metal Layers
MIM Caps
Value
600
pF/mm2
Resistors
NiCr
50
Ohms/sq
Bulk
350
Ohms/sq
Vias
Yes
Mask Layers
No Vias
12
With Vias
14
Fmax @ Idss
90
GHz
Coff @ Vds=0.5V
1.2
pF/mm
Ron @ Ids=Imax
4
Ohm-mm
Breakdown typ
min
40
25
V
V
Design Tool Availability
Preliminary Design Manual Now
Device Library of Circuit Elements: FETs,
Diodes, Thin Film Resistors, Capacitors,
Inductors
Parameters for TOM3 Model in ADS
Simulator
TOM3 Model for MWO Soon
Layout Library for ICED Now
Cadence Layout Library Q3'02
Rule Sets for Design Rule Check: Q3'02
Please contact your local TriQuint Semiconductor Representative/ Distributor
or Foundry Services Division Marketing for Additional information:
E-mail: sales@triquint.com Phone: (503) 615-9000 Fax: (503) 615-8905
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