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Электронный компонент: UT61L1288LS-10

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UTRON
UT61L1288
Rev. 1.0
128K X 8 BIT HIGH SPEED CMOS SRAM

UTRON
TECHNOLOGY
INC. P80077
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
1
REVISION HISTORY
REVISION DESCRIPTION
Date
Preliminary Rev. 0.1 Original.
Jan 2,2002
Rev. 1.0
1.Revised CMOS low power operating :
Operating current : 195 150mA (max.)

Standby current : 30mA (max.) 1mA(Typ.)
2.Revised power supply : 3.0~3.6V 3.15~3.6V
3.Revised DC CHARACTERISTICE
I
CC
8ns (max) : 200 150mA
I
CC
10ns (max) : 195 120mA
I
CC
12ns (max) : 190 100mA
I
CC
15ns (max) : 150 80 mA
I
SB
(max) : 30 10mA, I
SB
(typ) : NA 3mA
I
SB1
(max) : 10 3mA, I
SB1
(typ) : NA 1mA
I
SB1
(max)<1 mA for special order
4. Add order information for lead free product
May 20,2003
UTRON
UT61L1288
Rev. 1.0
128K X 8 BIT HIGH SPEED CMOS SRAM
___________________________________________________________________________________________________________
_________________________________________________________________________________________________
UTRON
TECHNOLOGY
INC. P80077
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
2
FEATURES
Fast access time :
8ns for Vcc=3.15V~3.6V
10/12/15ns for Vcc=3.0V~3.6V
CMOS low power operating :
Operating current : 150mA (max.)
Standby current : 1mA (Typ.)
Single 3.15~3.6V power supply
Operating temperature :
Commercial : 0
~70
All TTL compatible inputs and outputs
Fully static operation
Three state outputs
Package : 32-pin 8mm x 13.4mm STSOP

FUNCTIONAL BLOCK DIAGRAM
DECODER
I/O DATA
CIRCUIT
CONTROL
CIRCUIT
128K
8 bit
MEMORY
ARRAY
COLUMN I/O
A0-A16
Vcc
Vss
I/O0-I/O7
CE
OE
WE

PIN DESCRIPTION
SYMBOL DESCRIPTION
A0 - A16
Address Inputs
I/O0 - I/O7
Data Inputs/Outputs
CE
Chip enable Input
WE
Write Enable Input
OE
Output Enable Input
V
CC
Power
Supply
V
SS
Ground
NC No
Connection

GENERAL DESCRIPTION

The UT61L1288 is a 1,048,576-bit high-speed CMOS
static random access memory organized as 131,072
words by 8 bits.

The UT61L1288 operates from a single 3.15~3.6V
power supply and all inputs and outputs are fully TTL
compatible.

It is fabricated using high performance, high reliability
CMOS technology.

PIN CONFIGURATION
STSOP
Vss
A0
A1
A2
A3
I/O5
A15
IO3
WE
A4
A5
A6
Vcc
A13
OE
I/O7
I/O6
Vcc
I/O4
A12
A11
A10
A9
A7
A8
28
14
13
12
11
10
9
8
7
6
5
4
3
2
1
17
16
15
20
19
18
22
23
24
25
26
27
21
IO0
Vss
IO1
IO2
32
31
30
29
CE
A16
A14
UTRON
UT61L1288
Rev. 1.0
128K X 8 BIT HIGH SPEED CMOS SRAM

UTRON
TECHNOLOGY
INC. P80077
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
3
ABSOLUTE MAXIMUM RATINGS*
PARAMETER
SYMBOL
RATING
UNIT
Terminal Voltage with Respect to Vss
V
TERM
-0.5 to 4.6
V
Operating Temperature
Commercial
T
A
0 to 70
Storage Temperature
T
STG
-65 to 150
Power Dissipation
P
D
1
W
DC Output Current
I
OUT
50
mA
Soldering Temperature (under 10 secs)
Tsolder
260
*Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating
only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification
is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE
CE
OE
WE
I/O OPERATION
SUPPLY CURRENT
Standby
H
X
X
High - Z
I
SB
,I
SB1
Output Disable
L
H
H
High - Z
I
CC
Read
L
L
H
D
OUT
I
CC
Write
L
X
L
D
IN
I
CC
Note: H = V
IH
, L=V
IL
, X = Don't care.

DC ELECTRICAL CHARACTERISTICS
(T
A
= 0
to 70
)
PARAMETER
SYMBOL TEST CONDITION
MIN. TYP. MAX. UNIT
8
3.15
3.3
3.6
V
Power Voltage
V
CC
10/12/15
3.0
3.3
3.6
V
Input High Voltage
V
IH
2.0 - V
CC
+0.3 V
Input Low Voltage
V
IL
-0.3 - 0.8 V
Input Leakage Current
I
LI
V
SS
V
IN
V
CC
- 2
-
2
A
Output Leakage Current
I
LO
V
SS
V
I/O
V
CC
; Output Disable
- 2
-
2
A
Output High Voltage
V
OH
I
OH
= -4mA
2.4
-
-
V
Output Low Voltage
V
OL
I
OL
= 8mA
-
-
0.4
V
8
- - 150
mA
10
- - 120
mA
12 - - 100 mA
Operating Power
Supply Current
I
CC
Cycle time=min, 100%duty
I/O=0mA, CE =V
IL
15 - - 80 mA
Standby Current (TTL)
I
SB
CE =V
IH,
other pins =V
IL
or V
IH
- 3 10 mA
Standby Current (CMOS)
I
SB1
CE =V
CC
-0.2V, other pins at 0.2V
or Vcc-0.2V
- 1 3*
4
mA
Notes:
1. Overshoot : Vcc+3.0v for pulse width less than 6ns.
2. Undershoot : Vss-3.0v for pulse width less than 6ns.
3. Overshoot and Undershoot are sampled, not 100% tested.
4. I
SB1
< 1mA for special order or requirement.
UTRON
UT61L1288
Rev 1.0
128K X 8 BIT HIGH SPEED CMOS SRAM

UTRON
TECHNOLOGY
INC. P80077
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
4
CAPACITANCE
(T
A
=25
, f=1.0MHz)
PARAMETER
SYMBOL MIN.
MAX.
UNIT
Input Capacitance
C
IN
-
6
pF
Input/Output Capacitance
C
I/O
-
8
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
0V to 3.0V
Input Rise and Fall Times
3ns
Input and Output Timing Reference Levels
1.5V
Output Load
C
L
=30pF, I
OH
/I
OL
= -4mA / 8mA

AC ELECTRICAL CHARACTERISTICS
(T
A
= 0
to 70
)
(1) READ CYCLE
UT61L1288
-8
V
CC
=3.15
3.6
UT61L1288
-10
V
CC
=3.0
3.6
UT61L1288
-12
V
CC
=3.0
3.6
UT61L1288
-15
V
CC
=3.0
3.6
PARAMETER SYMBOL
MIN. MAX. MIN. MIN. MIN. MAX. MIN. MAX.
UNIT
Read Cycle Time
t
RC
8 - 10 - 12 - 15 - ns
Address Access Time
t
AA
- 8 - 10 - 12 - 15 ns
Chip Enable Access Time
t
ACE
- 8 - 10 - 12 - 15 ns
Output Enable Access Time
t
OE
- 4 - 5 - 6 - 7 ns
Chip Enable to Output in Low Z
t
CLZ*
3 - 3 - 3 - 3 - ns
Output Enable to Output in Low Z
t
OLZ*
0 - 0 - 0 - 0 - ns
Chip Disable to Output in High Z
t
CHZ*
- 4 - 5 - 6 - 7 ns
Output Disable to Output in High Z
t
OHZ*
- 4 - 5 - 6 - 7 ns
Output Hold from Address Change
t
OH
3 - 3 - 3 - 3 - ns
(2) WRITE CYCLE
UT61L1288
-8
V
CC
=3.15
3.6
UT61L1288
-10
V
CC
=3.0
3.6
UT61L1288
-12
V
CC
=3.0
3.6
UT61L1288
-15
V
CC
=3.0
3.6
PARAMETER SYMBOL
MIN. MAX. MIN. MIN. MIN. MAX. MIN. MAX.
UNIT
Write Cycle Time
t
WC
8 - 10 - 12 - 15 - ns
Address Valid to End of Write
t
AW
7 - 8 - 9 - 10 - ns
Chip Enable to End of Write
t
CW
7 - 8 - 9 - 10 - ns
Address Set-up Time
t
AS
0 - 0 - 0 - 0 - ns
Write Pulse Width
t
WP
7 - 8 - 9 - 10 - ns
Write Recovery Time
t
WR
0 - 0 - 0 - 0 - ns
Data to Write Time Overlap
t
DW
5.5 - 6 - 7 - 8 - ns
Data Hold from End of Write Time
t
DH
0 - 0 - 0 - 0 - ns
Output Active from End of Write
t
OW*
3 - 3 - 3 - 3 - ns
Write to Output in High Z
t
WHZ*
- 4 - 5 - 6 - 7 ns
*These parameters are guaranteed by device characterization, but not production tested.
UTRON
UT61L1288
Rev 1.0
128K X 8 BIT HIGH SPEED CMOS SRAM

UTRON
TECHNOLOGY
INC. P80077
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
5
TIMING WAVEFORMS
READ CYCLE 1
(Address Controlled)
(1,2)
t
RC
t
AA
Data Valid
Address
Dout
t
OH
t
OH
Previous data valid

READ CYCLE 2
(
CE
and
OE
Controlled)
(1,3,4,5)
t
RC
t
AA
t
ACE
t
OE
t
OHZ
t
CLZ
t
OH
t
OLZ
High-Z
Data Valid
High-Z
t
CHZ
Address
Dout
CE
OE
Notes :
1.
WE
is high for read cycle.
2.Device is continuously selected OE =low, CE =low
.
3.Address must be valid prior to or coincident with CE =low
,
; otherwise t
AA
is the limiting parameter.
4.t
CLZ
, t
OLZ
, t
CHZ
and t
OHZ
are specified with C
L
=5pF. Transition is measured
500mV from steady state.
5.At any given temperature and voltage condition, t
CHZ
is less than t
CLZ
, t
OHZ
is less than t
OLZ
.