UTRON
UT61L25616
Rev. 1.0
256K X 16 BIT HIGH SPEED CMOS SRAM
UTRON TECHNOLOGY INC. P80076
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
1
REVISION HISTORY
REVISION DESCRIPTION Date
Preliminary Rev. 0.1 Original.
Sep.04,2002
Preliminary Rev. 0.2 1. Revised Pin number
Oct.28,2002
Rev. 1.0
1. Revised Standby current : 10/2mA(max) 0.5mA(typ.)
2. Delete I
CC1
, I
CC2
3. Revised I
SB
: 30mA 3mA, I
SB1
:10mA 2mA,
4. Add I
SB
& I
SB1
(typ.) : 1mA & 2mA
5. Add Overshoot : V
IH
+6.0V for t
tRC /2.
Undershoot : V
IL
-2.0V for t
tRC /2.
6. Revised Data retention I
DR
(max) : 3mA 1mA
7. Add order information for lead free product
May 20,2003
UTRON
UT61L25616
Rev. 1.0
256K X 16 BIT HIGH SPEED CMOS SRAM
UTRON TECHNOLOGY INC. P80076
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
2
FEATURES
Fast access time : 10/12/15ns
CMOS Low operating power
Operating current :
260/240/220 mA (Icc max.)
Standby current : 0.5 mA (typ.)
Single 3.0V~3.6V power supply
Operating temperature :
Commercial : 0
~70
All TTL compatible inputs and outputs
Fully static operation
Three state outputs
Data retention voltage : 2V (min.)
Data byte control :
LB
(I/O1~I/O8)
UB (I/O9~I/O16)
Package : 44-pin 400mil TSOP-
II
GENERAL DESCRIPTION
The UT61L25616 is a 4,194,304-bit high speed
CMOS static random access memory organized
as 262,144 words by 16 bits. It is fabricated using
high performance and high reliability CMOS
technology.
The UT61L25616 operates from a single 3.0V ~
3.6V power supply and all inputs and outputs are
fully TTL compatible.
It is designed to allow lower and upper byte
access by data byte control (
LB
UB )
FUNCTIONAL BLOCK DIAGRAM
DECODER
I/O DATA
CIRCUIT
CONTROL
CIRCUIT
256K
16
MEMORY
ARRAY
COLUMN I/O
CE
OE
WE
A0-A17
Vcc
Vss
I/O1-I/O8
Lower Byte
I/O9-I/O16
Upper Byte
UB
LB
UTRON
UT61L25616
Rev. 1.0
256K X 16 BIT HIGH SPEED CMOS SRAM
UTRON TECHNOLOGY INC. P80076
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
3
PIN CONFIGURATION
A3
A2
A1
A0
I/O1
I/O2
I/O3
I/O4
Vcc
Vss
A5
A6
I/O16
I/O14
I/O15
I/O13
Vss
Vcc
I/O12
I/O11
I/O5
I/O6
UT61L25616
TSOP II
28
14
13
12
11
10
9
8
7
6
5
4
3
2
1
17
16
15
20
19
18
22
23
24
25
26
27
21
CE
OE
A7
A4
I/O8
I/O9
A17
A16
A15
A14
A13
I/O7
I/O10
A8
A9
A10
A12
WE
NC
34
29
30
31
32
33
44
39
40
41
42
43
35
36
37
38
UB
LB
A11
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0 - A17
Address Inputs
I/O1 - I/O16
Data Inputs/Outputs
CE
Chip Enable Input
WE
Write Enable Input
OE
Output Enable Input
LB
Lower-Byte Control
UB
Upper-Byte Control
V
CC
Power
Supply
V
SS
Ground
NC No
Connection
TRUTH TABLE
I/O OPERATION
MODE
CE
OE
WE
LB
UB
I/O1-I/O8 I/O9-I/O16
SUPPLY
CURRENT
Standby
H
X
X
X
X
X
X
H
X
H
High Z
High Z
High Z
High Z
I
SB
, I
SB1
Output Disable
L
L
H
H
H
H
L
X
X
L
High Z
High Z
High Z
High Z
I
CC
Read
L
L
L
L
L
L
H
H
H
L
H
L
H
L
L
D
OUT
High Z
D
OUT
High Z
D
OUT
D
OUT
I
CC
Write
L
L
L
X
X
X
L
L
L
L
H
L
H
L
L
D
IN
High Z
D
IN
High Z
D
IN
D
IN
I
CC
Note: H = V
IH
, L=V
IL
, X = Don't care.
UTRON
UT61L25616
Rev. 1.0
256K X 16 BIT HIGH SPEED CMOS SRAM
UTRON TECHNOLOGY INC. P80076
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
4
ABSOLUTE MAXIMUM RATINGS*
PARAMETER SYMBOL
RATING
UNIT
Terminal Voltage with Respect to V
SS
V
TERM
-0.5 to 4.6
V
Operating Temperature
T
A
0 to 70
Storage Temperature
T
STG
-65 to 150
Power Dissipation
P
D
1
W
DC Output Current
I
OUT
50
mA
Soldering Temperature (under 10 secs)
Tsolder
260
*Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a
stress rating only and functional operation of the device or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect
device reliability.
DC ELECTRICAL CHARACTERISTICS
(T
A
= 0
to 70
)
PARAMETER
SYMBOL
TEST CONDITION
MIN. TYP. MAX. UNIT
Power Voltage
Vcc
3.0 3.3
3.6
V
Input High Voltage
V
IH
*1
2.0 - V
CC
+0.3 V
Input Low Voltage
V
IL
*2
-0.3 - 0.8 V
Input Leakage Current
I
LI
V
SS
V
IN
V
CC
- 1
-
1
A
Output Leakage Current
I
LO
V
SS
V
I/O
V
CC;
Output Disabled
- 1
-
1
A
Output High Voltage
V
OH
I
OH
= -4mA
2.4
-
-
V
Output Low Voltage
V
OL
I
OL
= 8mA
-
-
0.4
V
-10
- 260 mA
-12
- 240 mA
Operating Power
Supply Current
I
CC
Cycle time=min, 100%duty,
I/O=0mA, CE =V
IL
-15 - 220 mA
Standby Current (TTL)
I
SB
CE =V
IH,
other pins =V
IL
or V
IH
-
1
3 mA
Standby Current (CMOS) I
SB1
CE =V
CC
-0.2V, other pins at 0.2V or
Vcc-0.2V
- 0.5 2 mA
Notes:
1. Overshoot : Vcc+3.0v for pulse width less than 8ns.
2. Undershoot : Vss-3.0v for pulse width less than 8ns.
3. Overshoot and Undershoot are sampled, not 100% tested.
UTRON
UT61L25616
Rev. 1.0
256K X 16 BIT HIGH SPEED CMOS SRAM
UTRON TECHNOLOGY INC. P80076
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
5
CAPACITANCE (TA=25
, f=1.0MHz)
PARAMETER
SYMBOL
MIN.
MAX
UNIT
Input Capacitance
C
IN
-
6 pF
Input/Output Capacitance
C
I/O
-
8 pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
0V to 3.0V
Input Rise and Fall Times
3ns
Input and Output Timing Reference Levels
1.5V
Output Load
C
L
= 30pF, I
OH
/I
OL
= -4mA / 8mA
AC ELECTRICAL CHARACTERISTICS
(T
A
=0
to 70
)
(1) READ CYCLE
UT61L25616-10 UT61L25616-12 UT61L25616-15
PARAMETER
SYMBOL
MIN. MAX. MIN. MAX. MIN. MAX.
UNIT
Read Cycle Time
t
RC
10 - 12 - 15 - ns
Address Access Time
t
AA
- 10 - 12 - 15 ns
Chip Enable Access Time
t
ACE
- 10 - 12 - 15 ns
Output Enable Access Time
t
OE
- 5 - 6 - 7 ns
Chip Enable to Output in Low Z
t
CLZ*
3 - 3 - 3 - ns
Output Enable to Output in Low Z
t
OLZ*
0 - 0 - 0 - ns
Chip Disable to Output in High Z
t
CHZ*
- 5 - 6 - 7 ns
Output Disable to Output in High Z
t
OHZ*
- 5 - 6 - 7 ns
Output Hold from Address Change
t
OH
3 - 3 - 3 - ns
LB
,
UB
Access Time
t
BA
- 5 - 6 - 7 ns
LB
,
UB
to High-Z Output
t
BHZ*
- 5 - 6 - 7 ns
LB
,
UB
to Low-Z Output
t
BLZ*
0 - 0 - 0 - ns
(2) WRITE CYCLE
UT61L25616-10 UT61L25616-12 UT61L25616-15
PARAMETER SYMBOL
MIN. MAX. MIN. MAX. MIN. MAX.
UNIT
Write Cycle Time
t
WC
10 - 12 - 15 - ns
Address Valid to End of Write
t
AW
8 - 9 - 10 - ns
Chip Enable to End of Write
t
CW
8 - 9 - 10 - ns
Address Set-up Time
t
AS
0 - 0 - 0 - ns
Write Pulse Width
t
WP
8 - 9 - 10 - ns
Write Recovery Time
t
WR
0 - 0 - 0 - ns
Data to Write Time Overlap
t
DW
6 - 7 - 8 - ns
Data Hold from End of Write Time
t
DH
0 - 0 - 0 - ns
Output Active from End of Write
t
OW*
3 - 3 - 3 - ns
Write to Output in High Z
t
WHZ*
- 5 - 6 - 7 ns
LB
,
UB
Valid to End of Write
t
BW
8 - 9 - 10 - ns
*These parameters are guaranteed by device characterization, but not production tested.
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