UTRON
UT62L12816
Rev. 1.4
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80050
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
1
REVISION HISTORY
REVISION DESCRIPTION
Released
Date
Preliminary Rev. 0.5
1. Original.
Mar, 2001
Rev. 1.0
1. The symbols CE# and OE# and WE# are revised as.
CE
and
OE
and
WE
.
2. Separate Industrial and Commercial SPEC.
3. Add access time 55ns range.
Jun 21, 2001
Rev. 1.1
1. The extended temperature range is revised.
-20
~80
-20
~85
Aug 24, 2001
Rev. 1.2
1. Revised Power supply
a
55ns (max.) for Vcc=2.7V~3.6V
b
70/100ns (max.) for Vcc=2.5V~3.6V
2. Revised block diagram
3. Revised DC ELECTRICAL CHARACTERISTICS
a
Revised
V
IH
as 2.2V
b
Revised standby current I
SB1
of LL-version
Typical : 3uA 2uA
Maximum : 25uA 20uA
4. Revised AC ELECTRICAL CHARACTERISTICS
c
Revised symbol name t
HZB
as t
BHZ
d
Revised symbol name t
LZB
as t
BLZ
e
Revised symbol name t
PWB
as t
BW
f
Revised
t
BLZ
as 10ns (min.)
g
Revised
t
OH
as 10ns (min.)
5. Revised waveforms
6. Revised 48-pin TFBGA package outline dimension
h
Rev. 1.1 ball diameter=0.3mm
i
Rev. 1.2 ball diameter=0.35mm
Apr 15, 2002
Rev. 1.3
Order information : add 100ns parts
Aug 05, 2002
Rev. 1.4
Add order information for lead free product
May 09, 2003
UTRON
UT62L12816
Rev. 1.4
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80050
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
2
FEATURES
Fast access time :
55ns (max.) for Vcc=2.7V~3.6V
70/100ns (max.) for Vcc=2.5V~3.6V
CMOS low power operating
Operating current : 45/35/25mA (Icc max.)
Standby current : 20uA (typ.) L-version
2uA (typ.) LL-version
Single 2.5V~3.6V power supply
Operating temperature :
Commercial : 0
~70
Extended : -20
~85
All TTL compatible inputs and outputs
Fully static operation
Three state outputs
Data retention voltage : 1.5V (min.)
Data byte control :
LB
(I/O1~I/O8)
UB (I/O9~I/O16)
Package : 44-pin 400mil TSOP-
48-pin 6mm 8mm TFBGA
GENERAL DESCRIPTION
The UT62L12816 is a 2,097,152-bit low power CMOS
static random access memory organized as 131,072
words by 16 bits.
The UT62L12816 operates from a single 2.5V~3.6V
power supply and all inputs and outputs are fully TTL
compatible.
The UT62L12816 is designed for low power system
applications.
FUNCTIONAL BLOCK DIAGRAM
DECODER
I/O DATA
CIRCUIT
CONTROL
CIRCUIT
128K
16
MEMORY
ARRAY
COLUMN I/O
CE
OE
WE
A0-A16
Vcc
Vss
I/O1-I/O8
Lower Byte
I/O9-I/O16
Upper Byte
UB
LB
UTRON
UT62L12816
Rev. 1.4
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80050
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
3
PIN CONFIGURATION
A1
A2
A3
A4
I/O16
I/O1
I/O2
I/O3
Vcc
Vss
NC
A16
I/O15
I/O13
I/O14
I/O12
Vss
Vcc
I/O11
I/O10
I/O4
I/O5
TSOP II
28
14
13
12
11
10
9
8
7
6
5
4
3
2
1
17
16
15
20
19
18
22
23
24
25
26
27
21
A15
A0
I/O7
I/O8
A5
A6
A7
A8
A9
I/O6
I/O9
A14
A13
A12
A10
NC
34
29
30
31
32
33
44
39
40
41
42
43
35
36
37
38
A11
CE
WE
LB
UB
OE
LB
A0
OE
A1
NC
A2
I/O9
A3
UB
A4
I/O1
CE
I/O10
A5
I/O11
A6
I/O3
I/O2
Vss
NC
I/O12
A7
Vcc
I/O4
Vcc
NC
I/O13
A16
Vss
I/O5
I/O15
A14
I/O14
A15
I/O7
I/O6
I/O16
A12
NC
A13
I/O8
WE
NC
A9
A8
A10
NC
A11
1
2
3
4
5
6
H
G
C
D
E
F
A
B
TFBGA
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0 - A16
Address Inputs
I/O1 - I/O16
Data Inputs/Outputs
CE
Chip Enable Input
WE
Write Enable Input
OE
Output Enable Input
LB
Lower Byte Control
UB
Upper Byte Control
V
CC
Power
Supply
V
SS
Ground
NC No
Connection
UTRON
UT62L12816
Rev. 1.4
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80050
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
4
TRUTH TABLE
I/O OPERATION
MODE
CE
OE
WE
LB
UB
I/O1-I/O8 I/O9-I/O16
SUPPLY CURRENT
Standby
H
X
X
X
X
X
X
H
X
H
High Z
High Z
High Z
High Z
I
SB
, I
SB1
Output Disable
L
L
H
H
H
H
L
X
X
L
High Z
High Z
High Z
High Z
I
CC
,I
CC1
,I
CC2
Read
L
L
L
L
L
L
H
H
H
L
H
L
H
L
L
D
OUT
High Z
D
OUT
High Z
D
OUT
D
OUT
I
CC
,I
CC1
,I
CC2
Write
L
L
L
X
X
X
L
L
L
L
H
L
H
L
L
D
IN
High Z
D
IN
High Z
D
IN
D
IN
I
CC
,I
CC1
,I
CC2
Note: H = V
IH
, L=V
IL
, X = Don't care.
ABSOLUTE MAXIMUM RATINGS*
PARAMETER SYMBOL
RATING
UNIT
Terminal Voltage with Respect to V
SS
V
TERM
-0.5 to 4.6
V
Commercial
T
A
0 to 70
Operating Temperature
Extended
T
A
-20 to 85
Storage Temperature
T
STG
-65 to +150
Power Dissipation
P
D
1
W
DC Output Current
I
OUT
50
mA
Soldering Temperature (under 10 secs)
Tsolder
260
*Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 2.5V~3.6V, T
A
= 0
to 70
/ -20
to 85
(E))
PARAMETER SYMBOL
TEST
CONDITION
MIN.
TYP.
MAX.
UNIT
55 2.7 3.0 3.6 V
Power Voltage
V
CC
70/100
2.5 -- 3.6 V
Input High Voltage
V
IH
*1
2.2
- V
CC
+0.3 V
Input Low Voltage
V
IL
*2
-0.2 - 0.6 V
Input Leakage Current
I
LI
V
SS
V
IN
V
CC
-
1
-
1
A
Output Leakage Current
I
LO
V
SS
V
I/O
V
CC;
Output Disable
- 1
-
1
A
Output High Voltage
V
OH
I
OH
= -1mA
2.2
-
-
V
Output Low Voltage
V
OL
I
OL
= 2.1mA
-
-
0.4
V
55 - 30 45
mA
70 - 25 35
mA
Operating Power
Supply Current
I
CC
Cycle time=min, 100%duty
I
I/O
=0mA,
CE
=V
IL
100 - 20 25 mA
Icc1
TCycle=
1s
- 4 5
mA
Average Operation
Current
Icc2
100%duty, I
I/O=
0mA
CE
0.2V,
other pins at 0.2V or Vcc-0.2V
TCycle=
500ns
- 8 10
mA
Standby Current (TTL)
I
SB
CE
=V
IH,
other pins =V
IL
or V
IH
- 0.3 0.5
mA
-L - 20 80
A
Standby Current (CMOS)
I
SB1
CE
=V
CC
-0.2V
other pins at 0.2V or Vcc-0.2V
-LL - 2 20 A
Notes:
1. Overshoot : Vcc+3.0v for pulse width less than 10ns.
2. Undershoot : Vss-3.0v for pulse width less than 10ns.
3. Overshoot and Undershoot are sampled, not 100% tested.
UTRON
UT62L12816
Rev. 1.4
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80050
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
5
CAPACITANCE
(T
A
=25
, f=1.0MHz)
PARAMETER
SYMBOL
MIN.
MAX
UNIT
Input Capacitance
C
IN
-
6 pF
Input/Output Capacitance
C
I/O
-
8 pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
0V to 3.0V
Input Rise and Fall Times
5ns
Input and Output Timing Reference Levels
1.5V
Output Load
C
L
= 30pF, I
OH
/I
OL
= -1mA/2.1mA
AC ELECTRICAL CHARACTERISTICS
( T
A
=0
to 70
/ -20
to 85
(E))
(1) READ CYCLE
UT62L12816-55
V
CC
=2.7V~3.6V
UT62L12816-70
V
CC
=2.5V~3.6V
UT62L12816-100
V
CC
=2.5V~3.6V
PARAMETER
SYMBOL
MIN. MAX. MIN. MAX. MIN. MAX.
UNIT
Read Cycle Time
t
RC
55 - 70 - 100 - ns
Address Access Time
t
AA
- 55 - 70 - 100
ns
Chip Enable Access Time
t
ACE
- 55 - 70 - 100
ns
Output Enable Access Time
t
OE
- 30 - 35 - 50
ns
Chip Enable to Output in Low Z
t
CLZ*
10 - 10 - 10 - ns
Output Enable to Output in Low Z
t
OLZ*
5 - 5 - 5 -
ns
Chip Disable to Output in High Z
t
CHZ*
- 20 - 25 - 30
ns
Output Disable to Output in High Z
t
OHZ*
- 20 - 25 - 30
ns
Output Hold from Address Change
t
OH
10 - 10 - 10 - ns
LB
,
UB
Access Time
t
BA
- 55 - 70 - 100
ns
LB
,
UB
to High-Z Output
t
BHZ
- 25 - 30 - 40
ns
LB
,
UB
to Low-Z Output
t
BLZ
10 - 10 - 10 - ns
(2) WRITE CYCLE
UT62L12816-55
V
CC
=2.7V~3.6V
UT62L12816-70
V
CC
=2.5V~3.6V
UT62L12816-100
V
CC
=2.5V~3.6V
PARAMETER
SYMBOL
MIN. MAX. MIN. MAX. MIN. MAX.
UNIT
Write Cycle Time
t
WC
55 - 70 - 100 - ns
Address Valid to End of Write
t
AW
50 - 60 - 80 - ns
Chip Enable to End of Write
t
CW
50 - 60 - 80 - ns
Address Set-up Time
t
AS
0 - 0 - 0 -
ns
Write Pulse Width
t
WP
45 - 55 - 70 - ns
Write Recovery Time
t
WR
0 - 0 - 0 -
ns
Data to Write Time Overlap
t
DW
25 - 30 - 40 - ns
Data Hold from End of Write Time
t
DH
0 - 0 - 0 -
ns
Output Active from End of Write
t
OW*
5 - 5 - 5 -
ns
Write to Output in High Z
t
WHZ*
- 30 - 30 - 40
ns
LB
,
UB
Valid to End of Write
t
BW
45 - 60 - 80 - ns
*These parameters are guaranteed by device characterization, but not production tested.
UTRON
UT62L12816
Rev. 1.4
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80050
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
6
TIMING WAVEFORMS
READ CYCLE 1
(Address Controlled)
(1,2)
t
RC
t
AA
Data Valid
Address
Dout
t
OH
t
OH
Previous data valid
READ CYCLE 2
(
CE
and
OE
Controlled)
(1,3,4,5)
t
RC
t
AA
t
ACE
t
BLZ
t
OE
t
OHZ
t
CLZ
t
BHZ
t
OH
t
OLZ
High-Z
Data Valid
High-Z
t
BA
t
CHZ
Address
Dout
CE
LB , UB
OE
Notes :
1.
WE
is high for read cycle.
2.Device is continuously selected OE =low, CE =low,
LB
or UB =low
.
3.Address must be valid prior to or coincident with CE =low
,
LB
or UB =low transition; otherwise t
AA
is the limiting parameter.
4.t
CLZ
, t
BLZ
, t
OLZ
, t
CHZ
, t
BHZ
and t
OHZ
are specified with C
L
=5pF. Transition is measured
500mV from steady state.
5.At any given temperature and voltage condition, t
CHZ
is less than t
CLZ
, t
BHZ
is less than t
BLZ
, t
OHZ
is less than t
OLZ
.
UTRON
UT62L12816
Rev. 1.4
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80050
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
7
WRITE CYCLE 1
(
WE
Controlled)
(1,2,3,5,6)
t
WC
t
AW
t
CW
t
AS
t
WP
t
BW
t
WHZ
t
OW
t
WR
High-Z
(4)
(4)
Address
CE
WE
LB , UB
Dout
Din
Data Valid
t
DW
t
DH
WRITE CYCLE 2
(
CE
Controlled)
(1,2,5,6)
t
W C
t
A W
t
C W
t
A S
t
W R
t
W P
t
B W
t
W H Z
t
D W
t
D H
Data Valid
High-Z
(4)
Address
CE
W E
LB , UB
Dout
Din
UTRON
UT62L12816
Rev. 1.4
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80050
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
8
WRITE CYCLE 3
(
LB
, UB
Controlled)
(1,2,5,6)
t
WC
t
AW
t
AS
t
WR
t
CW
t
WP
t
BW
t
WHZ
t
DW
t
DH
Data Valid
Address
CE
WE
LB , UB
Dout
Din
High-Z
Notes :
1.
WE
, CE ,
LB
, UB must be high during all address transitions.
2.A write occurs during the overlap of a low CE , low
WE
,
LB
or UB =low.
3.During a
WE
controlled write cycle with OE low, t
WP
must be greater than t
WHZ
+t
DW
to allow the drivers to turn off and data to be placed
on the bus.
4.During this period, I/O pins are in the output state, and input signals must not be applied.
5.If the CE ,
LB
, UB low transition occurs simultaneously with or after
WE
low transition, the outputs remain in a high impedance state.
6.t
OW
and t
WHZ
are specified with C
L
= 5pF. Transition is measured
500mV from steady state.
UTRON
UT62L12816
Rev. 1.4
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80050
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
9
DATA RETENTION CHARACTERISTICS
(T
A
= 0
to 70
/ -20
to 85
(E))
PARAMETER SYMBOL
TEST
CONDITION
MIN.
TYP.
MAX.
UNIT
Vcc for Data Retention
V
DR
CE
V
CC
-0.2V
1.5 - 3.6 V
- L
-
1
50
A
Data Retention Current
I
DR
Vcc=1.5V
CE
V
CC
-0.2V
- LL
-
0.5
20
A
Chip Disable to Data
Retention Time
t
CDR
See Data Retention
Waveforms (below)
0 - - ms
Recovery Time
t
R
5
-
-
ms
DATA RETENTION WAVEFORM
Low Vcc Data Retention Waveform (1)
(
CE
controlled)
V
DR
1.5V
CE
V
CC
-0.2V
V
cc(min.)
V
cc(min.)
V
IH
V
IH
V
CC
t
R
t
CDR
CE
Low Vcc Data Retention Waveform (2)
(
LB
,
UB
controlled)
V
DR
1.5V
LB,UB
V
CC
-0.2V
V
cc(min.)
V
cc(min.)
V
IH
V
IH
V
CC
t
R
t
CDR
LB,UB
UTRON
UT62L12816
Rev. 1.4
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80050
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
10
PACKAGE OUTLINE DIMENSION
44-pin 400mil TSOP-
Package Outline Dimension
DIMENSIONS IN MILLMETERS
DIMENSIONS IN INCHS
SYMBOLS
MIN. NOM. MAX. MIN. NOM. MAX.
A 1.00 - 1.20
0.039 - 0.047
A1 0.05 - 0.15
0.002 - 0.006
A2 0.95 1.00 1.05 0.037 0.039 0.041
b 0.30 0.35 0.45 0.012 0.014 0.018
c 0.12 - 0.21
0.0047 - 0.083
D 18.313 18.415 18.517 0.721 0.725 0.728
E 11.854 11.836 11.838 0.460 0.466 0.470
E1 10.058 10.180 10.282 0.398 0.400 0.404
e - 0.800 - - 0.0315 -
L 0.40 0.50 0.60 0.0157 0.020 0.0236
2D - 0.805 - - 0.0317 -
y 0.00 - 0.076
0.000 - 0.003
0
o
- 5
o
0
o
- 5
o
UTRON
UT62L12816
Rev. 1.4
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80050
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
11
48-pin 6mm 8mm TFBGA Package Outline Dimension
UTRON
UT62L12816
Rev. 1.4
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80050
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
12
ORDERING INFORMATION
COMMERCIAL TEMPERATURE
PART NO.
ACCESS TIME
(ns)
STANDBY CURRENT
(A) TYP.
PACKAGE
UT62L12816MC-55L 55
20
44 PIN TSOP-
UT62L12816MC-55LL 55
2
44 PIN TSOP-
UT62L12816MC-70L 70
20
44 PIN TSOP-
UT62L12816MC-70LL 70
2
44 PIN TSOP-
UT62L12816MC-100L 100
20
44 PIN TSOP-
UT62L12816MC-100LL 100
2 44 PIN TSOP-
UT62L12816BS-55L
55
20
48 PIN TFBGA
UT62L12816BS-55LL
55
2
48 PIN TFBGA
UT62L12816BS-70L
70
20
48 PIN TFBGA
UT62L12816BS-70LL
70
2
48 PIN TFBGA
UT62L12816BS-100L
100
20
48 PIN TFBGA
UT62L12816BS-100LL
100
2
48 PIN TFBGA
EXTENDED TEMPERATURE
PART NO.
ACCESS TIME
(ns)
STANDBY CURRENT
(A) TYP.
PACKAGE
UT62L12816MC-55LE 55
20
44 PIN TSOP-
UT62L12816MC-55LLE 55
2 44 PIN TSOP-
UT62L12816MC-70LE 70
20
44 PIN TSOP-
UT62L12816MC-70LLE 70
2 44 PIN TSOP-
UT62L12816MC-100LE 100
20 44 PIN TSOP-
UT62L12816MC-100LLE 100
2 44 PIN TSOP-
UT62L12816BS-55LE
55
20
48 PIN TFBGA
UT62L12816BS-55LLE
55
2
48 PIN TFBGA
UT62L12816BS-70LE
70
20
48 PIN TFBGA
UT62L12816BS-70LLE
70
2
48 PIN TFBGA
UT62L12816BS-100LE
100
20
48 PIN TFBGA
UT62L12816BS-100LLE
100
2
48 PIN TFBGA
UTRON
UT62L12816
Rev. 1.4
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80050
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
13
ORDERING INFORMATION (for lead free product)
COMMERCIAL TEMPERATURE
PART NO.
ACCESS TIME
(ns)
STANDBY CURRENT
(A) TYP.
PACKAGE
UT62L12816MCL-55L 55
20
44 PIN TSOP-
UT62L12816MCL-55LL 55
2 44 PIN TSOP-
UT62L12816MCL-70L 70
20
44 PIN TSOP-
UT62L12816MCL-70LL 70
2 44 PIN TSOP-
UT62L12816MCL-100L 100
20 44 PIN TSOP-
UT62L12816MCL-100LL 100
2 44 PIN TSOP-
UT62L12816BSL-55L
55
20
48 PIN TFBGA
UT62L12816BSL-55LL
55
2
48 PIN TFBGA
UT62L12816BSL-70L
70
20
48 PIN TFBGA
UT62L12816BSL-70LL
70
2
48 PIN TFBGA
UT62L12816BSL-100L
100
20
48 PIN TFBGA
UT62L12816BSL-100LL
100
2
48 PIN TFBGA
EXTENDED TEMPERATURE
PART NO.
ACCESS TIME
(ns)
STANDBY CURRENT
(A) TYP.
PACKAGE
UT62L12816MCL-55LE 55
20
44 PIN TSOP-
UT62L12816MCL-55LLE 55
2 44 PIN TSOP-
UT62L12816MCL-70LE 70
20
44 PIN TSOP-
UT62L12816MCL-70LLE 70
2 44 PIN TSOP-
UT62L12816MCL-100LE 100
20 44 PIN TSOP-
UT62L12816MCL-100LLE 100
2 44 PIN TSOP-
UT62L12816BSL-55LE
55
20
48 PIN TFBGA
UT62L12816BSL-55LLE
55
2
48 PIN TFBGA
UT62L12816BSL-70LE
70
20
48 PIN TFBGA
UT62L12816BSL-70LLE
70
2
48 PIN TFBGA
UT62L12816BSL-100LE
100
20
48 PIN TFBGA
UT62L12816BSL-100LLE
100
2
48 PIN TFBGA
UTRON
UT62L12816
Rev. 1.4
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80050
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
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