UTRON
UT62L12816(I)
Rev. 1.1
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80049
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
1
REVISION HISTORY
REVISION DESCRIPTION DATE
Preliminary Rev. 0.5
Original.
Mar, 2001
Preliminary Rev. 0.6
1. The symbols CE# and OE# and WE# are revised as. CE
and OE and
WE
.
2. Separate Industrial and Consumer SPEC.
3. Add access time 55ns range.
Jun 21,2001
Preliminary Rev. 0.7
1. Revised Vcc range
a
55ns (max.) for Vcc=2.7V~3.6V
b
70/100ns (max.) for Vcc=2.5V~3.6V
2. Revised block diagram
3. Revised DC ELECTRICAL CHARACTERISTICS
c
Revised standby current
I
SB1
=20/3uA(max.) for T
A
=0
~50
I
SB2
=80/10uA(max.) for T
A
=-40
~85
d
Revised
Icc=35/30/25mA(max.)
4. Revised AC ELECTRICAL CHARACTERISTICS
e
Revised symbol name t
HZB
as t
BHZ
f
Revised symbol name t
LZB
as t
BLZ
g
Revised symbol name t
PWB
as t
BW
5. Revised waveforms
6. Revised I
DR
=50/5uA(max.)
Nov 6, 2001
Rev. 1.0
1. Revised DC ELECTRICAL CHARACTERISTICS
a
Revised
V
IH
as 2.2V
2. Revised AC ELECTRICAL CHARACTERISTICS
b
Revised
t
BLZ
as 10ns (min.)
3. Revised 48-pin TFBGA package outline dimension
c
Rev.
0.7
ball diameter=0.3mm
d
Rev.
1.0
ball diameter=0.35mm
Apr 23,2002
Rev. 1.1
Add order information for lead free product
May 09,2003
UTRON
UT62L12816(I)
Rev. 1.1
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80049
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
2
FEATURES
Fast access time :
55ns (max.) for Vcc=2.7V~3.6V
70/100ns (max.) for Vcc=2.5V~3.6V
CMOS low power operating
Operating current : 35/30/25mA (Icc max.)
Standby current :
20uA(max.) Lversion,0
T
A
50
3uA(max.)
LL-version,0
T
A
50
Single 2.5V~3.6V power supply
Operating temperature:
Industrial : -40
~85
All TTL compatible inputs and outputs
Fully static operation
Three state outputs
Data retention voltage : 1.5V (min.)
Data byte control :
LB
(I/O1~I/O8)
UB (I/O9~I/O16)
Package : 44-pin 400mil TSOP-
48-pin 6mm 8mm TFBGA
GENERAL DESCRIPTION
The UT62L12816(I) is a 2,097,152-bit low power CMOS
static random access memory organized as 131,072
words by 16 bits.
The UT62L12816(I) operates from a wide range of
2.5V~ 3.6V supply voltage and all inputs and outputs
are fully TTL compatible.
The UT62L12816(I) is designed for low power system
applications.
FUNCTIONAL BLOCK DIAGRAM
DECODER
I/O DATA
CIRCUIT
CONTROL
CIRCUIT
128K
16
MEMORY
ARRAY
COLUMN I/O
CE
OE
WE
A0-A16
Vcc
Vss
I/O1-I/O8
Lower Byte
I/O9-I/O16
Upper Byte
UB
LB
UTRON
UT62L12816(I)
Rev. 1.1
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80049
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
3
PIN CONFIGURATION
A1
A2
A3
A4
I/O16
I/O1
I/O2
I/O3
Vcc
Vss
NC
A16
I/O15
I/O13
I/O14
I/O12
Vss
Vcc
I/O11
I/O10
I/O4
I/O5
TSOP II
28
14
13
12
11
10
9
8
7
6
5
4
3
2
1
17
16
15
20
19
18
22
23
24
25
26
27
21
A15
A0
I/O7
I/O8
A5
A6
A7
A8
A9
I/O6
I/O9
A14
A13
A12
A10
NC
34
29
30
31
32
33
44
39
40
41
42
43
35
36
37
38
A11
CE
WE
LB
UB
OE
LB
A0
OE
A1
NC
A2
I/O9
A3
UB
A4
I/O1
CE
I/O10
A5
I/O11
A6
I/O3
I/O2
Vss
NC
I/O12
A7
Vcc
I/O4
Vcc
NC
I/O13
A16
Vss
I/O5
I/O15
A14
I/O14
A15
I/O7
I/O6
I/O16
A12
NC
A13
I/O8
WE
NC
A9
A8
A10
NC
A11
1
2
3
4
5
6
H
G
C
D
E
F
A
B
TFBGA
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0 - A16
Address Inputs
I/O1 - I/O16
Data Inputs/Outputs
CE
Chip Enable Input
WE
Write Enable Input
OE
Output Enable Input
LB
Lower Byte Control
UB
Upper Byte Control
V
CC
Power
Supply
V
SS
Ground
NC No
Connection
TRUTH TABLE
I/O OPERATION
MODE
CE
OE
WE
LB
UB
I/O1-I/O8 I/O9-I/O16
SUPPLY CURRENT
Standby
H
X
X
X
X
X
X
H
X
H
High Z
High Z
High Z
High Z
I
SB
, I
SB1,
I
SB2
Output Disable
L
L
H
H
H
H
L
X
X
L
High Z
High Z
High Z
High Z
I
CC
,I
CC1
,I
CC2
Read
L
L
L
L
L
L
H
H
H
L
H
L
H
L
L
D
OUT
High Z
D
OUT
High Z
D
OUT
D
OUT
I
CC
,I
CC1
,I
CC2
Write
L
L
L
X
X
X
L
L
L
L
H
L
H
L
L
D
IN
High Z
D
IN
High Z
D
IN
D
IN
I
CC
,I
CC1
,I
CC2
Note: H = VIH, L=VIL, X = Don't care.
UTRON
UT62L12816(I)
Rev. 1.1
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80049
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
4
ABSOLUTE MAXIMUM RATINGS*
PARAMETER SYMBOL
RATING
UNIT
Terminal Voltage with Respect to V
SS
V
TERM
-0.3 to Vcc+0.3V
V
Operating Temperature
Industrial
T
A
-40 to 85
Storage Temperature
T
STG
-65 to 150
Power Dissipation
P
D
1
W
DC Output Current
I
OUT
50
mA
Soldering Temperature (under 10 secs)
Tsolder
260
*Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 2.5V~3.6V, T
A
= -40
to 85
)
PARAMETER SYMBOL
TEST
CONDITION
MIN.
TYP.
MAX.
UNIT
55 2.7V
3.0V
3.6V
V
Power Voltage
Vcc
70/100 2.5V -
3.6V
V
Input High Voltage
V
IH
*1
2.2 - V
CC
+0.3 V
Input Low Voltage
V
IL
*2
-0.3 - 0.6
V
Input Leakage Current
I
LI
V
SS
V
IN
V
CC
-
1
-
1
A
Output Leakage Current
I
LO
V
SS
V
I/O
V
CC;
Output Disable
- 1
-
1
A
Output High Voltage
V
OH
I
OH
= -1mA , (I
OH
= -0.5mA when Vcc<2.7V)
2.2
-
-
V
Output Low Voltage
V
OL
I
OL
= 2.1mA
-
-
0.4
V
55
- 20 35 mA
70
- 18 30 mA
Operating Power
Supply Current
I
CC
Cycle time=min, 100%duty
I/O=0mA,
CE
=V
IL
100 - 15 25 mA
Icc1 TCycle=
1s
- 4 5 mA
Average Operation
Current
Icc2
100%duty, I
I/O=
0mA
CE
0.2V,
other pins at 0.2V or Vcc-0.2V
TCycle=
500ns
- 8 10 mA
Standby Current (TTL)
I
SB
CE
=V
IH,
other pins =V
IL
or V
IH
- 0.3 0.5 mA
-L - - 20 A
I
SB1
CE
=V
CC
-0.2V, T
A
= 0
to 50
other pins at 0.2V or Vcc-0.2V
-LL
- - 3 A
-L
- - 80 A
Standby Current (CMOS)
I
SB2
CE
=V
CC
-0.2V, T
A
= -40
to 85
other pins at 0.2V or Vcc-0.2V
-LL
- - 10 A
Notes:
1. Overshoot : Vcc+3.0v for pulse width less than 10ns.
2. Undershoot : Vss-3.0v for pulse width less than 10ns.
3. Overshoot and Undershoot are sampled, not 100% tested.
UTRON
UT62L12816(I)
Rev. 1.1
128K X 16 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80049
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
5
CAPACITANCE
(T
A
=25
, f=1.0MHz
)
PARAMETER
SYMBOL
MIN.
MAX
UNIT
Input Capacitance
C
IN
-
6 pF
Input/Output Capacitance
C
I/O
-
8 pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
0V to 3.0V
Input Rise and Fall Times
5ns
Input and Output Timing Reference Levels
1.5V
Output Load
C
L
= 30pF, I
OH
/ I
OL
= -1mA/2.1mA
AC ELECTRICAL CHARACTERISTICS
(T
A
= -40
to 85
)
(1) READ CYCLE
UT62L12816(I)-55
V
CC
=2.7V~3.6V
UT62L12816(I)-70
V
CC
=2.5V~3.6V
UT62L12816(I)-100
V
CC
=2.5V~3.6V
PARAMETER
SYMBOL
MIN. MAX. MIN. MAX. MIN. MAX.
UNIT
Read Cycle Time
t
RC
55 - 70 - 100 -
ns
Address Access Time
t
AA
- 55 - 70 - 100
ns
Chip Enable Access Time
t
ACE
- 55 - 70 - 100
ns
Output Enable Access Time
t
OE
- 30 - 35 - 50
ns
Chip Enable to Output in Low Z
t
CLZ*
10 - 10 - 10 -
ns
Output Enable to Output in Low Z
t
OLZ*
5 - 5 - 5 -
ns
Chip Disable to Output in High Z
t
CHZ*
- 20 - 25 - 30
ns
Output Disable to Output in High Z
t
OHZ*
- 20 - 25 - 30
ns
Output Hold from Address Change
t
OH
10 - 10 - 10 -
ns
LB
,
UB
Access Time
t
BA
- 55 - 70 - 100
ns
LB
,
UB
to High-Z Output
t
BHZ
- 25 - 30 - 40
ns
LB
,
UB
to Low-Z Output
t
BLZ
10 - 10 - 10 -
ns
(2) WRITE CYCLE
UT62L12816(I)-55
V
CC
=2.7V~3.6V
UT62L12816(I)-70
V
CC
=2.5V~3.6V
UT62L12816(I)-100
V
CC
=2.5V~3.6V
PARAMETER
SYMBOL
MIN. MAX. MIN. MAX. MIN. MAX.
UNIT
Write Cycle Time
t
WC
55 - 70 - 100 -
ns
Address Valid to End of Write
t
AW
50 - 60 - 80 -
ns
Chip Enable to End of Write
t
CW
50 - 60 - 80 -
ns
Address Set-up Time
t
AS
0 - 0 - 0 -
ns
Write Pulse Width
t
WP
45 - 55 - 70 -
ns
Write Recovery Time
t
WR
0 - 0 - 0 -
ns
Data to Write Time Overlap
t
DW
25 - 30 - 40 -
ns
Data Hold from End of Write Time
t
DH
0 - 0 - 0 -
ns
Output Active from End of Write
t
OW*
5 - 5 - 5 -
ns
Write to Output in High Z
t
WHZ*
- 30 - 30 - 40
ns
LB
,
UB
Valid to End of Write
t
BW
45 - 60 - 80 -
ns
* These parameters are guaranteed by device characterization, but not production tested.
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