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Электронный компонент: VT82C691

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VT82C691
Preliminary Revision 1.0 July 16, 1998
-i-
Revision History
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EVISION
H
ISTORY
Document Release
Date
Revision
Initials
0.1
11/11/97
Initial internal release based on Apollo MVP3 Data Sheet Revision 0.5
Replaced CPU interface pin descriptions from Apollo P6 Data Sheet
DH
0.2
12/15/97
Incorporated changes based on internal document review
Added preliminary pinouts
Updated mechanical specification to reflect 492-ball BGA
DH
0.3
12/18/97
Updated pinouts to proposed pinout
DH
0.4
1/30/98
Updated pinouts to final pinout
Fixed CPU/DRAM Frequency strapping options (moved to MECC0 and 2)
DH
0.5
2/13/98
Updated feature bullets
Fixed GTLREF pin number in pin descriptions
Moved strapping options from HA to MECC (PCLK description, Rx68-69)
Updated register and bit definitions:
Added Rx2C Subsystem Vendor ID and Rx2E Subsystem ID
Added clarifying note on Rx50[7]
Redefined Rx51 all bits
Added Rx52[7] (strap MECC4) GTL pullup enable
Added Rx6B[3-1] suspend refresh rate
Changed Rx6C[7] to reserved / do not program
Added Rx6D[7] MAB output disable
Removed Rx70[5] (no function) and added new bits Rx70[3,0], Rx73[4]
Swapped 0/1 bit definition for Rx78[5]
Added RxF0-F7 BIOS Scratch Registers
DH
0.6
2/17/98
Removed internal CPU frequency comment in feature bullets
Added BIOS scratch registers to register summary tables
Fixed typos in Rx51[5] and Rx70[0]
DH
1.0
7/16/98
Changed 586B to 596 in Apollo Pro Chipset
Removed DDR, Virtual Channel, and ESDRAM feature bullets
Fixed feature bullet / overview errors regarding writeback & EDO timing
Changed Device 0 Rx78[4] to "Reserved, Do Not Program"
Updated AGP spec support from 1.0 to 2.0
DH
VT82C691
Preliminary Revision 1.0 July 16, 1998
-ii-
Table of Contents
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ABLE OF
C
ONTENTS
REVISION HISTORY........................................................................................................................................................................I
TABLE OF CONTENTS .................................................................................................................................................................. II
LIST OF FIGURES..........................................................................................................................................................................III
LIST OF TABLES ...........................................................................................................................................................................IV
APOLLO PRO ................................................................................................................................................................................... 1
OVERVIEW ....................................................................................................................................................................................... 4
PINOUTS VT82C691 APOLLO PRO........................................................................................................................................... 6
PIN DESCRIPTIONS ........................................................................................................................................................................ 9
REGISTERS ..................................................................................................................................................................................... 17
R
EGISTER
O
VERVIEW
................................................................................................................................................................. 17
M
ISCELLANEOUS
I/O................................................................................................................................................................... 20
C
ONFIGURATION
S
PACE
I/O ....................................................................................................................................................... 20
R
EGISTER
D
ESCRIPTIONS
............................................................................................................................................................ 21
Device 0 Header Registers - Host Bridge ............................................................................................................................ 21
Device 0 Configuration Registers - Host Bridge ................................................................................................................ 23
Host CPU Control ................................................................................................................................................................................. 23
DRAM Control ..................................................................................................................................................................................... 24
PCI Bus #1 Control............................................................................................................................................................................... 30
GART / Graphics Aperture Control ...................................................................................................................................................... 33
AGP Control ......................................................................................................................................................................................... 35
Device 1 Header Registers - PCI-to-PCI Bridge ................................................................................................................ 37
Device 1 Configuration Registers - PCI-to-PCI Bridge..................................................................................................... 40
PCI Bus #2 Control............................................................................................................................................................................... 40
ELECTRICAL SPECIFICATIONS ............................................................................................................................................... 41
A
BSOLUTE
M
AXIMUM
R
ATINGS
................................................................................................................................................. 41
DC C
HARACTERISTICS
................................................................................................................................................................ 41
AC T
IMING
S
PECIFICATIONS
...................................................................................................................................................... 41
MECHANICAL SPECIFICATIONS ............................................................................................................................................. 47
VT82C691
Preliminary Revision 1.0 July 16, 1998
-iii-
List of Figures
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IST OF
F
IGURES
FIGURE 1. APOLLO PRO SYSTEM BLOCK DIAGRAM USING THE VT82C596 MOBILE SOUTH BRIDGE.............. 4
FIGURE 2. VT82C691 BALL DIAGRAM (TOP VIEW).............................................................................................................. 6
FIGURE 3. VT82C691 PIN LIST (NUMERICAL ORDER) ........................................................................................................ 7
FIGURE 4. VT82C691 PIN LIST (ALPHABETICAL ORDER).................................................................................................. 8
FIGURE 5. GRAPHICS APERTURE ADDRESS TRANSLATION ......................................................................................... 33
FIGURE 8. MECHANICAL SPECIFICATIONS - 492-PIN BALL GRID ARRAY PACKAGE ........................................... 47