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Электронный компонент: VSC9180

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VSC9180
F E A T U R E S :
Parallel to Serial Transmit
4
Receives 16 or 4-Bit Parallel LVDS/LVPECL Inputs Operating
at 155MHz or 622MHz into Internal FIFO using Source
Synchronous Timing
4
16-Bit 155MHz Bus or 4-Bit 622MHz Bus is Bit Multiplexed
to Serial 2.5GHz Output
4
Retimes Four Serial STS-12/STM-4 Inputs and Deskews up
to +/- 3 Bytes of Skew using the A1/A2 Boundaries
4
Byte Interleaves Four Serial STS-12/STM-4 Inputs to Create
an STS-48 like Signal
4
Clear Channel Non-SONET/SDH Capability and Support for
Both SONET/SDH and G.709 OTU1 Frames
Serial to Parallel Receive
4
Dual 2.5Gb/s Frequency Synchronous Serial CML Inputs
with Onboard Clock and Data Recovery
4
Onboard Frame Alignment of Received Signals and Large
Internal FIFO for Tolerance of up to +/-75ns of Serial
Backplane Skew
4
Realignment of Incoming Signals Allows Hitless Selection of
Incoming Channel for Maintenance Purposes, and Prevents
Downstream Devices from Having to Reframe in a Failure
Condition

VSC9180 Arapahoe - 2.5G SONET/SDH Backplane Transceiver
4
Hardware Based Switch Over within Receipt of Two or Four Errored
Frame Boundaries
4
Loss of Signal, Loss of Alignment, and Loss of Frame Alarm Indication
4
Received Frame Pointer Output
4
Programmable BER Threshold Monitors Based on B1 Parity Monitoring
of Both Serial Inputs
4
Returns 16 or 4-Bit Parallel LVDS Bit De-multiplexed Outputs Operating
at 155MHz or 622MHz with Recovered Bus Clock (Non Interleave Mode)
4
Returns Quad STS-12/STM-4 Outputs Operating at 622 Mb/s (Inter-
leave Mode)
4
Clear Channel Non-SONET/SDH Capability and Support for Both
SONET/SDH and G.709 OTU1 Frames
Special Features
4
4-Bit or 16-Bit Parallel Bus Loopback with Output Bus Clock
4
Parallel Loopback also Allows Quad STS-12/STM-4 Retime, Realign, and
Loopback Output
4
Serial Loopback with Hitless Input Selection and Realignment
4
Onboard Discrete CMU and CRU to Accommodate Non-synchronous
TX/RX Applications
TIMESTREAM PRODUCT FAMILY
PB-VSC9180-001
741 Calle Plano
Camarillo, CA 93012
Tel: 805.388.3700
Fax: 805.388.7565
www.vitesse.com
Your Partner for Success.
For more information on Vitesse Products visit the Vitesse web site
at www.vitesse.com or contact Vitesse Sales at (800) VITESSE
or sales@vitesse.com
2002 Vitesse Semiconductor Corporation
The VSC9180 is a multi-rate SONET/SDH
transceiver with support for working and
protection hitless backplane 1+1 protection.
It is designed to serialize four STS-12/STM-
4 signals, or byte interleaved SONET/SDH
data from 4-bit 622MHz or 16-bit 155MHz parallel buses onto
redundant 2.5Gb/s serial backplane outputs. It also receives two
synchronous and serial STS-48/STM-16 signals, recovers the
clock, deskews them and then allows hitless selection between
the two. Selection criteria can be derived from BER monitoring,
in-frame status or signal integrity monitoring. The selected
signal is deserialized to a 4-bit 622MHz bus, a 16-bit 155MHz bus
or quad STS-12's operating at 622Mb/s.
G E N E R A L D E S C R I P T I O N :
VSC9180 Arapahoe - 2.5G SONET/SDH Backplane Transceiver
The VSC9180 can serialize a 4-bit or 16-bit byte interleaved
STS-48/STM-16 bus to working and protection 2.5Gb/s I/O
(Non Interleave mode). Alternatively it can recover four serial
STS-12 backplane signals, re-align them, and interleave them
to form a serial STS-48 signal (Interleave mode). Interleave
mode allows the VSC9180 to be used to add 2.5Gb/s
backplane connectivity to the VSC9182 40G STS-1 TSI switch,
or act as a transponder between existing serial STS-48/STM-
16 signals to serial STS-12/STM-4 backplane architectures.
TOH transparency is preserved and B1 parity is intelligently
recalculated for compatibility with the backplane BER
monitoring of adjacent devices.
VSC9180
Dual
2.5GHz
CDR
DMX
A1/A2
Align
Deinter-
leave
RXDATA[15:0]+/-
2:1
RXINB+/-
RXINA+/-
TXDATA[15:0]+/-
STS-12/STM-4
Phase Alignment
STS-48/STM-16
Interleaver
CMU
TXOUTA+/-
TXOUTB+/-
[3:0]
2:1
[15:0]
[15:0]
16-bit 155MHz
4-bit 622MHz
Retiming FIFO
[15:0]
DMX
MUX
MUX
B
E
R
ASIC
TimeStream
VSC918X
VSC9180
TimeStream
VSC9182
40G TSI
VSC9180
VSC9180
x16
4-bit
16-bit
Byte Interleaved
SONET/SDH Bus
4 x
STS-12
TimeStream Backplane
W/P STS-48
2.5Gb/s I/O
W/P STS-48
2.5Gb/s I/O
64 x
STS-12
TimeStream Backplane
STS-48
I/O
V S C 9 1 8 0 A R C H I T E C T U R E S :
V S C 9 1 8 0 B L O C K D I A G R A M :