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Электронный компонент: EDI7F33512C-150

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White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Sept. 2002 Rev. 4A
ECO #15528
EDI7F33512C
EDI7F33512C-BNC: 512Kx32 80 PIN SIMM
512Kx32, 2x512Kx32 and 4x512Kx32 Densities
Based on AMDs - AM290F040 Flash Device
Fast Read Access Time - 80-150ns
5- Volt-Only Reprogramming
Sector Erase Architecture
Uniform sectors of 64 Kbytes each
Any combination of sectors can be erased
Also supports full chip erase
Sector Protection
Hardware method that disables any combination of sectors
from write or erase operations
Embedded Erase Algorithms
Automatically preprograms and erases the chip or any com-
bination of sectors
Embedded Program Algorithms
Automatically programs and verifies data at specified ad-
dress
Data Polling and Toggle Bit feature for detection of program or
erase cycle completion
Low Power Dissipation
40mA per Device Active Current
10A per Device CMOS Standby Current
Typical Endurance >100,000 Cycles
Single 5 Volt 10% Supply
CMOS and TTL Compatible Inputs and Outputs
Commercial and Industrial Temperature Range
Package
80 Pin SIMM (JEDEC)
The EDI7F33512, EDI7F233512 and EDI7F433512 are organized
as 512Kx32 and 2x512Kx32 and 4x512Kx32 respectively. The
modules are based on AMD's AM29F040 - 512Kx8 Flash Device
in TSOP packages which are mounted on an FR4 substrate.
The modules offer access times between 80 and 150ns allowing
for operation of high-speed microprocessors without wait states.
BLOCK DIAGRAMS
EDI7F433512C-BNC: 4x512Kx32 80 PIN SIMM
EDI7F233512C-BNC: 2x512Kx32 80 PIN SIMM
512Kx32 Flash
DESCRIPTION
FEATURES
FIG. 1
512K
X 8
DQ0-DQ7
DQ8-DQ15
DQ16-DQ23
DQ24-DQ31
512K
512K
512K
512K
512K
512K
512K
X 8
X 8
X 8
X 8
X 8
X 8
X 8
G\
W1\
W2\
W3\
A0-A18
E1\
E0\
W0\
512K
X 8
DQ0-DQ7
DQ8-DQ15
DQ16-DQ23
DQ24-DQ31
E\
G
W0
W1
W2
W3
512K
512K
512K
X 8
X 8
X 8
\
\
\
\
\
A0-A18
A0-A18
G\
W1\
W2\
W3\
X8
512K
X8
512K
X8
512K
X8
512K
DQ0-DQ7
X8
512K
X8
512K
X8
512K
X8
512K
X8
512K
X8
512K
X8
512K
X8
512K
DQ8-DQ15
DQ16-DQ23
DQ24-DQ31
X8
512K
X8
512K
X8
512K
X8
512K
E3\
E2\
E1\
E0\
W0\
2
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Sept. 2002 Rev. 4A
ECO #15528
EDI7F33512C
PIN CONFIGURATIONS
A0-A18
Address input
E0\-E3\
Chip Enable
W0\-W3\
Write Enable
G\
Output Enable
DQ0-DQ31
Data Input/Output
PD
Presence Detect
VCC
Power 5V10%
VSS
Ground
NC
No Connect
CAPACITANCE
(f=1.0MHz, VIN = VCC or VSS)
512K
2x512K
4x512K
Parameter
Sym
Max
Max
Max
Units
Address Lines
CA
35
70
140
pF
Data lines
CDQ
15
30
60
pF
Chip & Write
CC
15
30
60
pF
Enable Lines
Output Enable lines
CG
35
70
140
pF
*TBD
Simm Density
Pin
2Mb
4Mb
8Mb
21
NC
NC
E3\
22
NC
NC
E2\
23
NC
E1\
E1\
24
E0\
E0\
E0\
Presence Detect Pin Out
Pin
512K
2x512K 4x512K
PD1
VSS
NC
VSS
PD2
VSS
NC
NC
PD3
VSS
NC
NC
PD4
NC
VSS
VSS
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
#
Name
#
Name
#
Name
#
Name
1
VSS
21
*
41
A11
61
DQ9
2
VCC
22
*
42
A10
62
DQ8
3
NC
23
*
43
A9
63
DQ7
4
G\
24
*
44
A8
64
DQ6
5
W0\
25
VSS
45
A7
65
DQ5
6
W1\
26
DQ29
461
A6
66
DQ4
7
NC
27
DQ30
47
A5
67
DQ3
8
DQ16
28
DQ31
48
A4
68
DQ2
9
DQ17
29
W2\
49
A3
69
DQ1
10
DQ18
30
NC
50
A2
70
DQ0
11
DQ19
31
NC
51
A1
71
NC
12
DQ20
32
NC
52
AO
72
VCC
13
DQ21
33
NC
53
W3\
73
PD1
14
DQ22
34
A18
54
VSS
74
PD2
15
DQ23
35
A17
55
DQ15
75
PD3
16
DQ24
36
A16
56
DQ14
76
PD4
17
DQ25
37
A15
57
DQ13
77
PD5
18
DQ26
38
A14
58
DQ12
78
PD6
19
DQ27
39
A13
59
DQ11
79
PD7
20
DQ28
40
A12
60
DQ10
80
VSS
3
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
Sept. 2002 Rev. 4A
ECO #15528
EDI7F33512C
ORDERING INFORMATION
Part Number
Speed
Package
(ns)
EDI7F233512C80BNC
80
367
EDI7F233512C90BNC
90
367
EDI7F233512C100BNC
100
367
EDI7F233512C120BNC
120
367
EDI7F233512C150BNC
150
367
Part Number
Speed
Package
(ns)
EDI7F433512C80BNC
80
368
EDI7F433512C90BNC
90
368
EDI7F433512C100BNC
100
368
EDI7F433512C120BNC
120
368
EDI7F433512C150BNC
150
368
Part Number
Speed
Package
(ns)
EDI7F33512C80BNC
80
366
EDI7F33512C90BNC
90
366
EDI7F33512C100BNC
100
366
EDI7F33512C120BNC
120
366
EDI7F33512C150BNC
150
366
P1
4.150
0.250
0.050 TYP.
4.655 MAX.
4.384
0.400
0.250
2.245
2.192
0.062 R
0.062 R
R4
0.120
MAX.
0.125
MIN.
0.705
MAX.
P1
4.384
0.250
2.245
2.192
REV. #
0.050
TYP.
4.150
0.062 R(2X)
0.400
0.705
MAX.
0.250
MAX.
0.125
MIN.
R4
R1 R3
R2
0.170
0.125 DIA (2x)
4.655 MAX.
J6
J1
J5
J7
J2
J3
J4
P1
0.125
0.200
MAX.
MIN.
0.400
0.250
0.050 TYP.
4.150
2.245
2.192
0.062 R. (2x)
0.125 DIA (2x)
4.655 MAX.
4.384
1.135
0.250
0.062 R.
ALL DIMENSIONS ARE IN INCHES
DATASHEET APPROVALS
ECO#
EDI PART NO.
NEW REV
DATE

APPROVAL:
INITIAL
DATE
CORRECTION ON PAGES
JUAN GUZMAN

MUKESH TRIVEDI

PAUL MARIEN

LARRY WINROTH

DAVE KELLY
MARK DOWNEY

DAVE HARRISON

TONY LEE

BOB KHEDERIAN

LUIS ESTELLA
YES
NO
LINE
:________
WILL THIS DATASHEET GO ON THE WEB?
FAMILY:
____________
PROD.TYPE:
________
ORG:___________
IS THIS A NEW DATASHEET?
DENSITY:________
SPEED:__________
WILL THIS DATASHEET REPLACE AN EXISTING
PKG:____________
DATASHEET THAT'S ALREADY ON THE WEB?
VOLTAGE:________

IF YES, WHAT DATASHEET IS IT REPLACING?

WHAT SECTION SHOULD THIS DATASHEET BE
PLACED IN ON THE WEB?


AFTER REVIEWING OR MAKING CORRECTIONS ON THE DATASHEET (S)
PLEASE SIGN-OFF ON THIS SHEET AND ,MAKE YOUR CORRECTIONS ON
THE ORIGINAL COPY(S).

AFTER REVIEWING THE DATA SHEET, TEST ENGINEERING WILL COMPLETE THE SECTION BELOW.

TEST PROGRAM CHANGE REQUIRED:
YES:_________NO____________DATE:___________

TEST ENGINEER SIGNATURE___________________

IF YES, DO NOT RELEASE DATA SHEET UNTIL TEST PROGRAM CHANGE IS COMPLETED.
TEST PROGRAM CHANGE COMPLETION DATE:__________
TEST PROGRAM NAME AND REVISION_________________
TEST ENGINEER SIGNATURE__________________________


FO-00342R1.DOC
ECO# 14942
SHEET 1 OF
1
9/25/02
9/26/02
9/27/02
L.K.
M.A.
EDI7F33512C
15528
4A
9/24/02