EDI8F3232C
32Kx32 SRAM Module
1
EDI8F3232C Rev. 6 1/98 ECO #9601
Features
Pin Configurations and Block Diagram
32Kx32 Static RAM
CMOS, High Speed Module
The EDI8F3232C is a high speed megabit Static RAM
module organized as 32Kx32. This module is constructed
from four 32Kx8 Static RAMs in SOJ packages on an epoxy
laminate (FR4) board.
Four chip enables (E-E3) are used to independently
enable the four bytes. Reading or writing can be executed
on individual bytes or any combination of multiple bytes
through proper use of selects.
The EDI8F3232C is offered in both 64 lead SIMM and 64
pin ZIP packages, which enables one megabit of memory
to be placed in less than 1.2 square inches of board space.
All inputs and outputs are TTL compatible and operate from
a single 5V supply. Fully asynchronous circuitry is used,
requiring no clocks or refreshing for operation and providing
equal access and cycle times for ease of use.
A-A14
W
G
E
E1
E2
E3
DQ-DQ7
DQ8-DQ15
DQ16-DQ23
DQ24-DQ31
15
8
8
8
8
32Kx32 bit CMOS Static
Random Access Memory
Access Times 12, 15, 20, and 25ns
Individual Byte Selects
Output Enable Function
Fully Static, No Clocks
TTL Compatible I/O
High Density Packaging
64 Pin SIMM, No. 54
64 Pin ZIP, No. 57
JEDEC Standard Pinout
Common Data Inputs and Outputs
Single +5V (10%) Supply Operation
ZIP
SIMM
Pin Names
Pin Names
A0-A14
Address Inputs
E-E3
Chip Enable
W
Write Enable
G
Output Enable
DQ-DQ31
Common Data Input/Output
VCC
Power (+5V10%)
VSS
Ground
NC
No Connection
VSS
PD2
DQ8
DQ9
DQ10
DQ11
A
A1
A2
DQ12
DQ13
DQ14
DQ15
VSS
NC
E1
E3
NC
G
DQ24
DQ25
DQ26
DQ27
A3
A4
A5
VCC
A6
DQ28
DQ29
DQ30
DQ31
PD1
DQ
DQ1
DQ2
DQ3
VCC
A7
A8
A9
DQ4
DQ5
DQ6
DQ7
W
A14
E
E2
NC
VSS
DQ16
DQ17
DQ18
DQ19
A10
A11
A12
A13
DQ20
DQ21
DQ22
DQ23
VSS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
Electronic Designs Incorporated
One Research Drive Westborough, MA 01581USA 508-366-5151 FAX 508-836-4850
Electronic Designs Europe Ltd. Shelley House, The Avenue Lightwater, Surrey GU18 5RF
United Kingdom 01276 472637 FAX: 01276 473748
http://www.electronic-designs.com
PD1=Open
PD2 = VSS
VSS
PD2
DQ8
DQ9
DQ10
DQ11
A
A1
A2
DQ12
DQ13
DQ14
DQ15
VSS
NC
E1
E3
NC
G
DQ24
DQ25
DQ26
DQ27
A3
A4
A5
VCC
A6
DQ28
DQ29
DQ30
DQ31
PD1
DQ
DQ1
DQ2
DQ3
VCC
A7
A8
A9
DQ4
DQ5
DQ6
DQ7
W
A14
E
E2
NC
VSS
DQ16
DQ17
DQ18
DQ19
A10
A11
A12
A13
DQ20
DQ21
DQ22
DQ23
VSS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
2
EDI8F3232C Rev. 6 1/98 ECO #9601
EDI8F3232C
32Kx32 SRAM Module
Absolute Maximum Ratings*
Recommended DC Operating Conditions
DC Electrical Characteristics
Parameter
Sym
Conditions
Min
Typ*
Max
Units
Operating Power
ICC1
W, E = VIL, II/O = 0mA,
12ns
--
640
mA
Supply Current
Min Cycle
15ns
--
600
mA
20ns
--
560
mA
25ns
--
520
mA
Standby (TTL) Power
ICC2
E
VIH, VIN
VIL
--
225
mA
Supply Current
VIN
VIH
Full Standby Power
ICC3
E
VCC-0.2V
--
80
mA
Supply Current
VIN
VCC-0.2V or
CMOS
VIN
0.2V
Input Leakage Current
ILI
VIN = 0V to VCC
--
--
20
A
Output Leakage Current
ILO
V I/O = 0V to VCC
--
--
20
A
Output High Voltage
VOH
IOH =-4.0mA
2.4
--
--
V
Output Low Voltage
VOL
IOL = 8.0mA
--
--
0.4
V
Capacitance
(f=1.0MHz, VIN=VCC or VSS)
Parameter
Sym
Max
Unit
Parameter
Sym
Max
Unit
Address LInes
CI
60
pF
Data Lines
CD/Q
20
pF
Chip Enable Line
CC
20
pF
Control Lines
CW
60
pF
These parameters are sampled, not 100% tested.
AC Test Conditions
*Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions greater than those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
Parameter
Sym
Min
Typ
Max Units
Supply Voltage
VCC
4.5
5.0
5.5
V
Supply Voltage
VSS
0
0
0
V
Input High Voltage
VIH
2.2
--
6.0
V
Input Low Voltage
VIL
-0.3
--
0.8
V
(note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF)
Voltage on any pin relative to VSS
-0.5V to 7.0V
Operating Temperature TA (Ambient)
Commercial
0C to +70C
Industrial
-40C to +85C
Storage Temperature
Plastic
-55C to +125C
Power Dissipation
4 Watts
Output Current.
20 mA
Input Pulse Levels
VSS to 3.0V
Input Rise and Fall Times
5ns
Input and Output Timing Levels
1.5V
Output Load
1TTL, CL =30pF
*Typical: TA = 25C, VCC = 5.0V
G
E
W
Mode
Output
Power
X
H
X
Standby
High Z
ICC2, ICC3
H
L
H
Output Deselect High Z
ICC1
L
L
H
Read
DOUT
ICC1
X
L
L
Write
DIN
ICC1
Truth Table
EDI8F3232C
32Kx32 SRAM Module
3
EDI8F3232C Rev. 6 1/98 ECO #9601
AC Characteristics Read Cycle
Symbol
12ns
15ns
20ns
25ns
Parameter
JEDEC
Alt.
Min
Max
Min
Max
Min
Max
Min
Max Units
Read Cycle Time
TAVAV
TRC
12
15
20
25
ns
Address Access Time
TAVQV
TAA
12
15
20
25
ns
Chip Enable Access Time
TELQV
TACS
12
15
20
25
ns
Chip Enable to Output in Low Z (1)
TELQX
TCLZ
5
5
5
5
ns
Chip Disable to Output in High Z (1)
TEHQZ
TCHZ
0
5
0
9
0
11
0
13
ns
Output Hold from Address Change
TAVQX
TOH
3
3
3
3
ns
Output Enable to Output Valid
TGLQV
TOE
6
8
10
12
ns
Output Enable to Output in Low Z (1)
TGLQX
TOLZ
0
0
0
0
ns
Output Disable to Output in High Z(1)
TGHQZ
TOHZ
0
5
0
8
0
10
0
10
ns
Read Cycle 1 - W High, G, E Low
Note 1: Parameter guaranteed, but not tested.
TAVAV
TAVQV
TAVQX
DATA 2
A
Q
ADDRESS 1
ADDRESS 2
DATA 1
TGHQZ
TELQV
TELQX
E
G
Q
TEHQZ
A
TAVAV
TGLQV
TGLQX
TAVQV
Read Cycle 2 - W High
4
EDI8F3232C Rev. 6 1/98 ECO #9601
EDI8F3232C
32Kx32 SRAM Module
AC Characteristics Write Cycle
Note 1: Parameter guaranteed, but not tested.
Write Cycle 1 - W Controlled
A
E
W
D
Q
TAVAV
TELWH
T A V W H
T W L W H
T A V W L
T D V W H
T W H D X
TWHQX
HIGH Z
TWLQZ
DATA VALID
TWHAX
Write Cycle 2 - E Controlled
A
W
E
D
Q
TAVAV
TAVEL
TEHAX
TDVEH
TEHDX
TELEH
TAVEH
DATA VALID
HIGH Z
TWLEH
Symbol
12ns
15ns
20ns
25ns
Parameter
JEDEC
Alt.
Min Max
Min Max
Min
Max
Min
Max Units
Write Cycle Time
TAVAV TWC
12
15
20
25
ns
Chip Enable to End of Write
TELWH TCW
10
12
13
15
ns
TELEH
TCW
10
12
13
15
ns
Address Setup Time
TAVWL
TAS
0
0
0
0
ns
TAVEL
TAS
0
0
0
0
ns
Address Valid to End of Write
TAVWH TAW
10
12
13
15
ns
TAVEH
TAW
10
12
13
15
ns
Write Pulse Width
TWLWH TWP
10
11
12
15
ns
TWLEH TWP
10
11
12
15
ns
Write Recovery Time
TWHAX TWR
0
0
0
0
ns
TEHAX TWR
0
0
0
0
ns
Data Hold Time
TWHDX TDH
0
0
0
0
ns
TEHDX
TDH
0
0
0
0
ns
Write to Output in High Z (1)
TWLQZ TWHZ
0
3
0
3
0
3
0
5
ns
Data to Write Time
TDVWH TDW
7
8
9
10
ns
TDVEH TDW
7
8
9
10
ns
Output Active from End of Write (1)
TWHQX TWLZ
0
0
0
0
ns
EDI8F3232C
32Kx32 SRAM Module
5
EDI8F3232C Rev. 6 1/98 ECO #9601
Part Number
Speed
Package
(ns)
No.
EDI8F3232C12MMC
12
54
EDI8F3232C15MMC
15
54
EDI8F3232C20MMC
20
54
EDI8F3232C25MMC
25
54
EDI8F3232C12MZC
12
57
EDI8F3232C15MZC
15
57
EDI8F3232C20MZC
20
57
EDI8F3232C25MZC
25
57
Note: To order an Industrial grade product change the last C in the suffix to I,
eg. EDI8F3232C25MZC becomes EDI8F3232C25MZI.
Package No. 54
64 Pin SIMM Module
Package Description
0.520
MAX
3.584
0.050
TYP
0.213
MAX
0.250
TYP
0.400
0.250
0.080
P64
0.62R
3.855
31 x 0.050
1.550 Ref.
P1
0.125
Dia. Typ.
(2 Plcs.)
0.400
0.125
MIN
Package No. 57
64 Pin ZIP Module
0.100
Typ
0.530
MAX
3.660
3.640
0.130
0.120
0.050
0.022
0.018
0.250
TYP
0.050
0.165
0.135
0.100
Typ
0.008
0.014
0.050
Typ
0.225
MAX
Ordering Information
PDF 
ZIP